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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [lib/] [libcpu/] [sh/] [sh7045/] [include/] [sh7_pfc.h] - Blame information for rev 1765

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1 1026 ivang
/*
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 * Bit values for the pin function controller of the Hitachi SH704x
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 *
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 * From Hitachi tutorials
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 *
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 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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 *           Bernd Becker (becker@faw.uni-ulm.de)
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 *
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 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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 *
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 *
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 *  COPYRIGHT (c) 1998.
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 *  On-Line Applications Research Corporation (OAR).
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 *
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 *  The license and distribution terms for this file may be
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 *  found in the file LICENSE in this distribution or at
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 *  http://www.OARcorp.com/rtems/license.html.
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 *
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 *  sh7_pfc.h,v 1.3 2001/10/12 21:00:52 joel Exp
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 */
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#ifndef _sh7_pfc_h
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#define _sh7_pfc_h
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#include <rtems/score/iosh7045.h>
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/*
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 * Port A IO Registers (PAIORH, PAIORL)
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 *    1 => OUTPUT
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 *    0 => INPUT
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 */
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#define PAIORH     PFC_PAIORH
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#define PAIORL     PFC_PAIORL
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/* PAIORH */
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#define PA23IOR    0x0080
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#define PA22IOR    0x0040
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#define PA21IOR    0x0020
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#define PA20IOR    0x0010
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#define PA19IOR    0x0008
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#define PA18IOR    0x0004
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#define PA17IOR    0x0002
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#define PA16IOR    0x0001
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/* PAIORL */
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#define PA15IOR    0x8000
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#define PA14IOR    0x4000
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#define PA13IOR    0x2000
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#define PA12IOR    0x1000
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#define PA11IOR    0x0800
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#define PA10IOR    0x0400
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#define PA9IOR     0x0200
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#define PA8IOR     0x0100
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#define PA7IOR     0x0080
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#define PA6IOR     0x0040
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#define PA5IOR     0x0020
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#define PA4IOR     0x0010
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#define PA3IOR     0x0008
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#define PA2IOR     0x0004
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#define PA1IOR     0x0002
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#define PA0IOR     0x0001
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/*
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 * Port A Control Registers (PACRH, PACRL1, PACRL2)
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 * and mode bits
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 */
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#define PACRH      PFC_PACRH
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#define PACRL1     PFC_PACRL1
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#define PACRL2     PFC_PACRL2
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/* PACRH */
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#define PA23MD0    0x4000
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#define PA22MD0    0x1000
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#define PA21MD0    0x0400
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#define PA20MD0    0x0100
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#define PA19MD1    0x0080
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#define PA19MD0    0x0040
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#define PA18MD1    0x0020
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#define PA18MD0    0x0010
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#define PA17MD0    0x0004
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#define PA16MD0    0x0001
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/* PACRL1 */
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#define PA15MD0    0x4000
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#define PA14MD0    0x1000
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#define PA13MD0    0x0400
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#define PA12MD0    0x0100
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#define PA11MD0    0x0040
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#define PA10MD0    0x0010
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#define PA9MD1     0x0008
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#define PA9MD0     0x0004
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#define PA8MD1     0x0002
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#define PA8MD0     0x0001
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/* PACRL2 */
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#define PA7MD1     0x8000
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#define PA7MD0     0x4000
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#define PA6MD1     0x2000
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#define PA6MD0     0x1000
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#define PA5MD1     0x0800
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#define PA5MD0     0x0400
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#define PA4MD0     0x0100
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#define PA3MD0     0x0040
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#define PA2MD1     0x0020
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#define PA2MD0     0x0010
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#define PA1MD0     0x0004
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#define PA0MD0     0x0001
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#define PA_TXD1    PA4MD0
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#define PA_RXD1    PA3MD0
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#define PA_TXD0    PA1MD0
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#define PA_RXD0    PA0MD0
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/*
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 * Port B IO Register (PBIOR)
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 */
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#define PBIOR      PFC_PBIOR
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#define PB15IOR    0x8000
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#define PB14IOR    0x4000
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#define PB13IOR    0x2000
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#define PB12IOR    0x1000
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#define PB11IOR    0x0800
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#define PB10IOR    0x0400
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#define PB9IOR     0x0200
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#define PB8IOR     0x0100
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#define PB7IOR     0x0080
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#define PB6IOR     0x0040
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#define PB5IOR     0x0020
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#define PB4IOR     0x0010
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#define PB3IOR     0x0008
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#define PB2IOR     0x0004
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#define PB1IOR     0x0002
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#define PB0IOR     0x0001
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/*
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 * Port B Control Register (PBCR1)
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 */
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#define PBCR1      PFC_PBCR1
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#define PB15MD1    0x8000
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#define PB15MD0    0x4000
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#define PB14MD1    0x2000
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#define PB14MD0    0x1000
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#define PB13MD1    0x0800
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#define PB13MD0    0x0400
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#define PB12MD1    0x0200
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#define PB12MD0    0x0100
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#define PB11MD1    0x0080
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#define PB11MD0    0x0040
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#define PB10MD1    0x0020
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#define PB10MD0    0x0010
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#define PB9MD1     0x0008
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#define PB9MD0     0x0004
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#define PB8MD1     0x0002
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#define PB8MD0     0x0001
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#define PB15MD     PB15MD1|PB14MD0
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#define PB14MD     PB14MD1|PB14MD0
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#define PB13MD     PB13MD1|PB13MD0
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#define PB12MD     PB12MD1|PB12MD0
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#define PB11MD     PB11MD1|PB11MD0
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#define PB10MD     PB10MD1|PB10MD0
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#define PB9MD      PB9MD1|PB9MD0
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#define PB8MD      PB8MD1|PB8MD0
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#define PB_TXD1    PB11MD1
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#define PB_RXD1    PB10MD1
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#define PB_TXD0    PB9MD1
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#define PB_RXD0    PB8MD1
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/*
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 * Port B Control Register (PBCR2)
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 */
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#define PBCR2      PFC_PBCR2
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#define PB7MD1     0x8000
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#define PB7MD0     0x4000
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#define PB6MD1     0x2000
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#define PB6MD0     0x1000
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#define PB5MD1     0x0800
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#define PB5MD0     0x0400
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#define PB4MD1     0x0200
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#define PB4MD0     0x0100
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#define PB3MD1     0x0080
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#define PB3MD0     0x0040
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#define PB2MD1     0x0020
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#define PB2MD0     0x0010
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#define PB1MD1     0x0008
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#define PB1MD0     0x0004
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#define PB0MD1     0x0002
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#define PB0MD0     0x0001
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#define PB7MD      PB7MD1|PB7MD0
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#define PB6MD      PB6MD1|PB6MD0
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#define PB5MD      PB5MD1|PB5MD0
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#define PB4MD      PB4MD1|PB4MD0
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#define PB3MD      PB3MD1|PB3MD0
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#define PB2MD      PB2MD1|PB2MD0
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#define PB1MD      PB1MD1|PB1MD0
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#define PB0MD      PB0MD1|PB0MD0
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#endif /* _sh7_pfc_h */

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