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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [libchip/] [network/] [cs8900.h] - Blame information for rev 1780

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1 1026 ivang
/*
2
  ------------------------------------------------------------------------
3
  cs8900.h,v 1.2 2001/03/02 18:17:22 joel Exp
4
  ------------------------------------------------------------------------
5
 
6
  My Right Boot, a boot ROM for embedded hardware.
7
 
8
  Copyright Cybertec Pty Ltd, 2000
9
  All rights reserved Cybertec Pty Ltd, 2000
10
 
11
  COPYRIGHT (c) 1989-1998.
12
  On-Line Applications Research Corporation (OAR).
13
 
14
  The license and distribution terms for this file may be
15
  found in the file LICENSE in this distribution or at
16
  http://www.OARcorp.com/rtems/license.html.
17
 
18
  ------------------------------------------------------------------------
19
 
20
  CS8900 net boot driver.
21
 
22
 */
23
 
24
#if !defined(_CS8900_H_)
25
#define _CS8900_H_
26
 
27
#include <rtems.h>
28
#include <rtems/error.h>
29
#include <rtems/rtems_bsdnet.h>
30
 
31
#include <sys/param.h>
32
#include <sys/mbuf.h>
33
#include <sys/socket.h>
34
#include <sys/sockio.h>
35
 
36
#include <net/if.h>
37
 
38
#include <netinet/in.h>
39
#include <netinet/if_ether.h>
40
 
41
#define ET_MINLEN 60
42
 
43
/*
44
 * CS8900 device register definitions
45
 */
46
 
47
/*
48
 * Crystal ESIA product id.
49
 */
50
 
51
#define CS8900_ESIA_ID             (0x630e)
52
 
53
/*
54
 * IO Registers.
55
 */
56
 
57
#define CS8900_IO_RX_TX_DATA_PORT0 (0x0000)
58
#define CS8900_IO_TX_TX_DATA_PORT1 (0x0002)
59
#define CS8900_IO_TxCMD            (0x0004)
60
#define CS8900_IO_TxLength         (0x0006)
61
#define CS8900_IO_ISQ              (0x0008)
62
#define CS8900_IO_PACKET_PAGE_PTR  (0x000a)
63
#define CS8900_IO_PP_DATA_PORT0    (0x000c)
64
#define CS8900_IO_PP_DATA_PORT1    (0x000e)
65
 
66
/*
67
 * Packet Page Registers.
68
 */
69
 
70
/*
71
 * Bus Interface Registers.
72
 */
73
 
74
#define CS8900_PP_PROD_ID          (0x0000)
75
#define CS8900_PP_IO_BASE          (0x0020)
76
#define CS8900_PP_INT              (0x0022)
77
#define CS8900_PP_DMA_CHANNEL      (0x0024)
78
#define CS8900_PP_DMA_SOF          (0x0026)
79
#define CS8900_PP_DMA_FRM_CNT      (0x0028)
80
#define CS8900_PP_DMA_RX_BCNT      (0x002a)
81
#define CS8900_PP_MEM_BASE         (0x002c)
82
#define CS8900_PP_BPROM_BASE       (0x0030)
83
#define CS8900_PP_BPROM_AMASK      (0x0034)
84
#define CS8900_PP_EEPROM_CMD       (0x0040)
85
#define CS8900_PP_EEPROM_DATA      (0x0042)
86
#define CS8900_PP_RX_FRAME_BCNT    (0x0050)
87
 
88
/*
89
 * Configuration and Control Registers.
90
 */
91
 
92
#define CS8900_PP_RxCFG            (0x0102)
93
#define CS8900_PP_RxCTL            (0x0104)
94
#define CS8900_PP_TxCFG            (0x0106)
95
#define CS8900_PP_TxCMD_READ       (0x0108)
96
#define CS8900_PP_BufCFG           (0x010a)
97
#define CS8900_PP_LineCFG          (0x0112)
98
#define CS8900_PP_SelfCTL          (0x0114)
99
#define CS8900_PP_BusCTL           (0x0116)
100
#define CS8900_PP_TestCTL          (0x0118)
101
 
102
/*
103
 * Status and Event Registers.
104
 */
105
 
106
#define CS8900_PP_ISQ              (0x0120)
107
#define CS8900_PP_RxEvent          (0x0124)
108
#define CS8900_PP_TxEvent          (0x0128)
109
#define CS8900_PP_BufEvent         (0x012c)
110
#define CS8900_PP_RxMISS           (0x0130)
111
#define CS8900_PP_TxCol            (0x0132)
112
#define CS8900_PP_LineST           (0x0134)
113
#define CS8900_PP_SelfST           (0x0136)
114
#define CS8900_PP_BusST            (0x0138)
115
#define CS8900_PP_TDR              (0x013c)
116
 
117
/*
118
 * Initiate Transmit Registers.
119
 */
120
 
121
#define CS8900_PP_TxCMD            (0x0144)
122
#define CS8900_PP_TxLength         (0x0146)
123
 
124
/*
125
 * Address Filter Registers.
126
 */
127
 
128
#define CS8900_PP_LAF              (0x0150)
129
#define CS8900_PP_IA               (0x0158)
130
 
131
/*
132
 * Frame Location.
133
 */
134
 
135
#define CS8900_PP_RxStatus         (0x0400)
136
#define CS8900_PP_RxLength         (0x0402)
137
#define CS8900_PP_RxFrameLoc       (0x0404)
138
#define CS8900_PP_TxFrameLoc       (0x0a00)
139
 
140
/*
141
 * Bit Definitions of Registers.
142
 */
143
 
144
/*
145
 * IO Packet Page Pointer.
146
 */
147
 
148
#define CS8900_PPP_AUTO_INCREMENT             (0x8000)
149
 
150
/*
151
 * Reg 3. Receiver Configuration.
152
 */
153
 
154
#define CS8900_RX_CONFIG_SKIP_1               (1 << 6)
155
#define CS8900_RX_CONFIG_STREAM_ENABLE        (1 << 7)
156
#define CS8900_RX_CONFIG_RX_OK                (1 << 8)
157
#define CS8900_RX_CONFIG_RX_DMA               (1 << 9)
158
#define CS8900_RX_CONFIG_RX_AUTO_DMA          (1 << 10)
159
#define CS8900_RX_CONFIG_BUFFER_CRC           (1 << 11)
160
#define CS8900_RX_CONFIG_CRC_ERROR            (1 << 12)
161
#define CS8900_RX_CONFIG_RUNT                 (1 << 13)
162
#define CS8900_RX_CONFIG_EXTRA_DATA           (1 << 14)
163
 
164
/*
165
 * Reg 4. Receiver Event.
166
 */
167
 
168
#define CS8900_RX_EVENT_HASH_IA_MATCH         (1 << 6)
169
#define CS8900_RX_EVENT_DRIBBLE_BITS          (1 << 7)
170
#define CS8900_RX_EVENT_RX_OK                 (1 << 8)
171
#define CS8900_RX_EVENT_HASHED                (1 << 9)
172
#define CS8900_RX_EVENT_IA                    (1 << 10)
173
#define CS8900_RX_EVENT_BROADCAST             (1 << 11)
174
#define CS8900_RX_EVENT_CRC_ERROR             (1 << 12)
175
#define CS8900_RX_EVENT_RUNT                  (1 << 13)
176
#define CS8900_RX_EVENT_EXTRA_DATA            (1 << 14)
177
 
178
/*
179
 * Reg 5. Receiver Control.
180
 */
181
 
182
#define CS8900_RX_CTRL_HASH_IA_MATCH          (1 << 6)
183
#define CS8900_RX_CTRL_PROMISCUOUS            (1 << 7)
184
#define CS8900_RX_CTRL_RX_OK                  (1 << 8)
185
#define CS8900_RX_CTRL_MULTICAST              (1 << 9)
186
#define CS8900_RX_CTRL_INDIVIDUAL             (1 << 10)
187
#define CS8900_RX_CTRL_BROADCAST              (1 << 11)
188
#define CS8900_RX_CTRL_CRC_ERROR              (1 << 12)
189
#define CS8900_RX_CTRL_RUNT                   (1 << 13)
190
#define CS8900_RX_CTRL_EXTRA_DATA             (1 << 14)
191
 
192
/*
193
 * Reg 7. Transmit Configuration.
194
 */
195
 
196
#define CS8900_TX_CONFIG_LOSS_OF_CARRIER      (1 << 6)
197
#define CS8900_TX_CONFIG_SQ_ERROR             (1 << 7)
198
#define CS8900_TX_CONFIG_TX_OK                (1 << 8)
199
#define CS8900_TX_CONFIG_OUT_OF_WINDOW        (1 << 9)
200
#define CS8900_TX_CONFIG_JABBER               (1 << 10)
201
#define CS8900_TX_CONFIG_ANY_COLLISION        (1 << 11)
202
#define CS8900_TX_CONFIG_16_COLLISION         (1 << 15)
203
 
204
/*
205
 * Reg 8. Transmit Event.
206
 */
207
 
208
#define CS8900_TX_EVENT_LOSS_OF_CARRIER       (1 << 6)
209
#define CS8900_TX_EVENT_SQ_ERROR              (1 << 7)
210
#define CS8900_TX_EVENT_TX_OK                 (1 << 8)
211
#define CS8900_TX_EVENT_OUT_OF_WINDOW         (1 << 9)
212
#define CS8900_TX_EVENT_JABBER                (1 << 10)
213
#define CS8900_TX_EVENT_16_COLLISIONS         (1 << 15)
214
 
215
/*
216
 * Reg 9. Transmit Command Status.
217
 */
218
 
219
#define CS8900_TX_CMD_STATUS_TX_START_5       (0 << 6)
220
#define CS8900_TX_CMD_STATUS_TX_START_381     (1 << 6)
221
#define CS8900_TX_CMD_STATUS_TX_START_1021    (2 << 6)
222
#define CS8900_TX_CMD_STATUS_TX_START_ENTIRE  (3 << 6)
223
#define CS8900_TX_CMD_STATUS_FORCE            (1 << 8)
224
#define CS8900_TX_CMD_STATUS_ONE_COLLISION    (1 << 9)
225
#define CS8900_TX_CMD_STATUS_INHIBIT_CRC      (1 << 12)
226
#define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED  (1 << 13)
227
 
228
/*
229
 * Reg B. Buffer Configuration.
230
 */
231
 
232
#define CS8900_BUFFER_CONFIG_SW_INT           (1 << 6)
233
#define CS8900_BUFFER_CONFIG_RX_DMA_DONE      (1 << 7)
234
#define CS8900_BUFFER_CONFIG_RDY_FOR_TX       (1 << 8)
235
#define CS8900_BUFFER_CONFIG_TX_UNDERRUN      (1 << 9)
236
#define CS8900_BUFFER_CONFIG_RX_MISSED        (1 << 10)
237
#define CS8900_BUFFER_CONFIG_RX_128_BYTES     (1 << 11)
238
#define CS8900_BUFFER_CONFIG_TX_COL_OVF       (1 << 12)
239
#define CS8900_BUFFER_CONFIG_RX_MISSED_OVF    (1 << 13)
240
#define CS8900_BUFFER_CONFIG_RX_DEST_MATCH    (1 << 15)
241
 
242
/*
243
 * Reg C. Buffer Event.
244
 */
245
 
246
#define CS8900_BUFFER_EVENT_SW_INT            (1 << 6)
247
#define CS8900_BUFFER_EVENT_RX_DMA_DONE       (1 << 7)
248
#define CS8900_BUFFER_EVENT_RDY_FOR_TX        (1 << 8)
249
#define CS8900_BUFFER_EVENT_TX_UNDERRUN       (1 << 9)
250
#define CS8900_BUFFER_EVENT_RX_MISSED         (1 << 10)
251
#define CS8900_BUFFER_EVENT_RX_128_BYTES      (1 << 11)
252
#define CS8900_BUFFER_EVENT_RX_DEST_MATCH     (1 << 15)
253
 
254
/*
255
 * Reg 13. Line Control.
256
 */
257
 
258
#define CS8900_LINE_CTRL_RX_ON               (1 << 6)
259
#define CS8900_LINE_CTRL_TX_ON               (1 << 7)
260
#define CS8900_LINE_CTRL_AUI                 (1 << 8)
261
#define CS8900_LINE_CTRL_10BASET             (0 << 9)
262
#define CS8900_LINE_CTRL_AUTO_AUI_10BASET    (1 << 9)
263
#define CS8900_LINE_CTRL_MOD_BACKOFF         (1 << 11)
264
#define CS8900_LINE_CTRL_POLARITY_DISABLED   (1 << 12)
265
#define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13)
266
#define CS8900_LINE_CTRL_LO_RX_SQUELCH       (1 << 14)
267
 
268
/*
269
 * Reg 14. Line Status.
270
 */
271
 
272
#define CS8900_LINE_STATUS_LINK_OK           (1 << 7)
273
#define CS8900_LINE_STATUS_AUI               (1 << 8)
274
#define CS8900_LINE_STATUS_10_BASE_T         (1 << 9)
275
#define CS8900_LINE_STATUS_POLARITY_OK       (1 << 12)
276
#define CS8900_LINE_STATUS_CRS               (1 << 14)
277
 
278
/*
279
 * Reg 15. Self Control.
280
 */
281
 
282
#define CS8900_SELF_CTRL_RESET              (1 << 6)
283
#define CS8900_SELF_CTRL_SW_SUSPEND         (1 << 8)
284
#define CS8900_SELF_CTRL_HW_SLEEP           (1 << 9)
285
#define CS8900_SELF_CTRL_HW_STANDBY         (1 << 10)
286
#define CS8900_SELF_CTRL_HC0E               (1 << 12)
287
#define CS8900_SELF_CTRL_HC1E               (1 << 13)
288
#define CS8900_SELF_CTRL_HCB0               (1 << 14)
289
#define CS8900_SELF_CTRL_HCB1               (1 << 15)
290
 
291
/*
292
 * Reg 16. Self Status.
293
 */
294
 
295
#define CS8900_SELF_STATUS_3_3_V            (1 << 6)
296
#define CS8900_SELF_STATUS_INITD            (1 << 7)
297
#define CS8900_SELF_STATUS_SIBUST           (1 << 8)
298
#define CS8900_SELF_STATUS_EEPROM_PRESENT   (1 << 9)  
299
#define CS8900_SELF_STATUS_EEPROM_OK        (1 << 10)
300
#define CS8900_SELF_STATUS_EL_PRESENT       (1 << 11)
301
#define CS8900_SELF_STATUS_EE_SIZE          (1 << 12)
302
 
303
/*
304
 * Reg 17. Bus Control.
305
 */
306
 
307
#define CS8900_BUS_CTRL_RESET_RX_DMA        (1 << 6)
308
#define CS8900_BUS_CTRL_USE_SA              (1 << 9)
309
#define CS8900_BUS_CTRL_MEMORY_ENABLE       (1 << 10)
310
#define CS8900_BUS_CTRL_DMA_BURST           (1 << 11)
311
#define CS8900_BUS_CTRL_IOCHRDYE            (1 << 12)
312
#define CS8900_BUS_CTRL_RX_DMA_SIZE         (1 << 13)
313
#define CS8900_BUS_CTRL_ENABLE_INT          (1 << 15)
314
 
315
/*
316
 * Reg 18. Bus Status.
317
 */
318
 
319
#define CS8900_BUS_STATUS_TX_BID_ERROR      (1 << 7)
320
#define CS8900_BUS_STATUS_RDY_FOR_TX_NOW    (1 << 8)
321
 
322
/*
323
 * Trace for debugging the isq processing. Define to 1 to enable.
324
 */
325
#define CS8900_TRACE      0
326
#define CS8900_TRACE_SIZE (400)
327
 
328
/*
329
 * Stats, more for debugging than anything else.
330
 */
331
 
332
typedef struct
333
{
334
  unsigned long rx_packets;     /* total packets received         */
335
  unsigned long tx_packets;     /* total packets transmitted      */
336
  unsigned long rx_bytes;       /* total bytes received           */
337
  unsigned long tx_bytes;       /* total bytes transmitted        */
338
  unsigned long rx_interrupts;  /* total number of rx interrupts  */
339
  unsigned long tx_interrupts;  /* total number of tx interrupts  */
340
 
341
  /* detailed rx errors: */
342
  unsigned long rx_dropped;     /* no mbufs in queue              */
343
  unsigned long rx_no_mbufs;    /* no mbufs                       */
344
  unsigned long rx_no_clusters; /* no clusters                    */
345
  unsigned long rx_oversize_errors;
346
  unsigned long rx_crc_errors;    /* recved pkt with crc error    */
347
  unsigned long rx_runt_errors;
348
  unsigned long rx_missed_errors; /* receiver missed packet       */
349
 
350
  /* detailed tx errors */
351
  unsigned long tx_ok;
352
  unsigned long tx_collisions;
353
  unsigned long tx_bid_errors;
354
  unsigned long tx_wait_for_rdy4tx;
355
  unsigned long tx_rdy4tx;
356
  unsigned long tx_underrun_errors;
357
  unsigned long tx_dropped;
358
  unsigned long tx_resends;
359
 
360
  /* interrupt watch dog */
361
  unsigned long int_swint_req;
362
  unsigned long int_swint_res;
363
  unsigned long int_lockup;
364
 
365
  unsigned long interrupts;
366
 
367
} eth_statistics;
368
 
369
/*
370
 * CS8900 device structure
371
 */
372
 
373
typedef struct
374
{
375
  /*
376
   * Device number.
377
   */
378
 
379
  int dev;
380
 
381
  /*
382
   * The bsdnet information structure.
383
   */
384
 
385
  struct arpcom arpcom;
386
 
387
  /*
388
   * Driver state and resources.
389
   */
390
 
391
  int            accept_bcast;
392
  int            tx_active;
393
 
394
  rtems_id       rx_task;
395
  rtems_id       tx_task;
396
 
397
  /*
398
   * The queues. FIXME : these should be changed to be mbuf lists.
399
   */
400
  struct mbuf    *rx_ready_head;
401
  struct mbuf    *rx_ready_tail;
402
  int            rx_ready_len;
403
 
404
  struct mbuf    *rx_loaded_head;
405
  struct mbuf    *rx_loaded_tail;
406
  int            rx_loaded_len;
407
 
408
#if CS8900_TRACE
409
  unsigned short trace_key[CS8900_TRACE_SIZE];
410
  unsigned long  trace_var[CS8900_TRACE_SIZE];
411
  unsigned long  trace_time[CS8900_TRACE_SIZE];
412
  int            trace_in;
413
#endif
414
 
415
  /*
416
   * Standard(!) ethernet statistics
417
   */
418
 
419
  eth_statistics eth_stats;
420
 
421
} cs8900_device;
422
 
423
/*
424
 * Link is active, and RX count.
425
 */
426
 
427
int           cs8900_link_active (int dev);
428
int           cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
429
                                    int                          attaching);
430
rtems_isr     cs8900_interrupt (rtems_vector_number v, void *cs);
431
 
432
/*
433
 * Functions Users Provide to implement the driver.
434
 */
435
 
436
void           cs8900_attach_interrupt (int dev, cs8900_device *cs);
437
void           cs8900_detach_interrupt (int dev);
438
void           cs8900_get_mac_addr (int dev, unsigned char *mac_address);
439
void           cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data);
440
unsigned short cs8900_io_get_reg (int dev, unsigned short reg);
441
void           cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data);
442
unsigned short cs8900_mem_get_reg (int dev, unsigned long reg);
443
void           cs8900_put_data_block (int dev, int len, unsigned char *data);
444
unsigned short cs8900_get_data_block (int dev, unsigned char *data);
445
void           cs8900_tx_load (int dev, struct mbuf *m);
446
 
447
#endif

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