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[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [libchip/] [network/] [pci.h] - Blame information for rev 1765

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1 1026 ivang
/*
2
 *
3
 *      PCI defines and function prototypes
4
 *      Copyright 1994, Drew Eckhardt
5
 *      Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6
 *
7
 *      For more information, please consult the following manuals (look at
8
 *      http://www.pcisig.com/ for how to get them):
9
 *
10
 *      PCI BIOS Specification
11
 *      PCI Local Bus Specification
12
 *      PCI to PCI Bridge Specification
13
 *      PCI System Design Guide
14
 *
15
 * pci.h,v 1.1 2002/07/16 22:37:13 joel Exp
16
 */
17
 
18
#ifndef RTEMS_PCI_H
19
#define RTEMS_PCI_H
20
 
21
/*
22
 * Under PCI, each device has 256 bytes of configuration address space,
23
 * of which the first 64 bytes are standardized as follows:
24
 */
25
#define PCI_VENDOR_ID           0x00    /* 16 bits */
26
#define PCI_DEVICE_ID           0x02    /* 16 bits */
27
#define PCI_COMMAND             0x04    /* 16 bits */
28
#define  PCI_COMMAND_IO         0x1     /* Enable response in I/O space */
29
#define  PCI_COMMAND_MEMORY     0x2     /* Enable response in Memory space */
30
#define  PCI_COMMAND_MASTER     0x4     /* Enable bus mastering */
31
#define  PCI_COMMAND_SPECIAL    0x8     /* Enable response to special cycles */
32
#define  PCI_COMMAND_INVALIDATE 0x10    /* Use memory write and invalidate */
33
#define  PCI_COMMAND_VGA_PALETTE 0x20   /* Enable palette snooping */
34
#define  PCI_COMMAND_PARITY     0x40    /* Enable parity checking */
35
#define  PCI_COMMAND_WAIT       0x80    /* Enable address/data stepping */
36
#define  PCI_COMMAND_SERR       0x100   /* Enable SERR */
37
#define  PCI_COMMAND_FAST_BACK  0x200   /* Enable back-to-back writes */
38
 
39
#define PCI_STATUS              0x06    /* 16 bits */
40
#define  PCI_STATUS_66MHZ       0x20    /* Support 66 Mhz PCI 2.1 bus */
41
#define  PCI_STATUS_UDF         0x40    /* Support User Definable Features */
42
 
43
#define  PCI_STATUS_FAST_BACK   0x80    /* Accept fast-back to back */
44
#define  PCI_STATUS_PARITY      0x100   /* Detected parity error */
45
#define  PCI_STATUS_DEVSEL_MASK 0x600   /* DEVSEL timing */
46
#define  PCI_STATUS_DEVSEL_FAST 0x000   
47
#define  PCI_STATUS_DEVSEL_MEDIUM 0x200
48
#define  PCI_STATUS_DEVSEL_SLOW 0x400
49
#define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
50
#define  PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
51
#define  PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
52
#define  PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
53
#define  PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
54
 
55
#define PCI_CLASS_REVISION      0x08    /* High 24 bits are class, low 8
56
                                           revision */
57
#define PCI_REVISION_ID         0x08    /* Revision ID */
58
#define PCI_CLASS_PROG          0x09    /* Reg. Level Programming Interface */
59
#define PCI_CLASS_DEVICE        0x0a    /* Device class */
60
 
61
#define PCI_CACHE_LINE_SIZE     0x0c    /* 8 bits */
62
#define PCI_LATENCY_TIMER       0x0d    /* 8 bits */
63
#define PCI_HEADER_TYPE         0x0e    /* 8 bits */
64
#define  PCI_HEADER_TYPE_NORMAL 0
65
#define  PCI_HEADER_TYPE_BRIDGE 1
66
#define  PCI_HEADER_TYPE_CARDBUS 2
67
 
68
#define PCI_BIST                0x0f    /* 8 bits */
69
#define PCI_BIST_CODE_MASK      0x0f    /* Return result */
70
#define PCI_BIST_START          0x40    /* 1 to start BIST, 2 secs or less */
71
#define PCI_BIST_CAPABLE        0x80    /* 1 if BIST capable */
72
 
73
/*
74
 * Base addresses specify locations in memory or I/O space.
75
 * Decoded size can be determined by writing a value of
76
 * 0xffffffff to the register, and reading it back.  Only
77
 * 1 bits are decoded.
78
 */
79
#define PCI_BASE_ADDRESS_0      0x10    /* 32 bits */
80
#define PCI_BASE_ADDRESS_1      0x14    /* 32 bits [htype 0,1 only] */
81
#define PCI_BASE_ADDRESS_2      0x18    /* 32 bits [htype 0 only] */
82
#define PCI_BASE_ADDRESS_3      0x1c    /* 32 bits */
83
#define PCI_BASE_ADDRESS_4      0x20    /* 32 bits */
84
#define PCI_BASE_ADDRESS_5      0x24    /* 32 bits */
85
#define  PCI_BASE_ADDRESS_SPACE 0x01    /* 0 = memory, 1 = I/O */
86
#define  PCI_BASE_ADDRESS_SPACE_IO 0x01
87
#define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
88
#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
89
#define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00    /* 32 bit address */
90
#define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02    /* Below 1M */
91
#define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04    /* 64 bit address */
92
#define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08    /* prefetchable? */
93
#define  PCI_BASE_ADDRESS_MEM_MASK      (~0x0fUL)
94
#define  PCI_BASE_ADDRESS_IO_MASK       (~0x03UL)
95
/* bit 1 is reserved if address_space = 1 */
96
 
97
/* Header type 0 (normal devices) */
98
#define PCI_CARDBUS_CIS         0x28
99
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
100
#define PCI_SUBSYSTEM_ID        0x2e  
101
#define PCI_ROM_ADDRESS         0x30    /* Bits 31..11 are address, 10..1 reserved */
102
#define  PCI_ROM_ADDRESS_ENABLE 0x01
103
#define PCI_ROM_ADDRESS_MASK    (~0x7ffUL)
104
 
105
/* 0x34-0x3b are reserved */
106
#define PCI_INTERRUPT_LINE      0x3c    /* 8 bits */
107
#define PCI_INTERRUPT_PIN       0x3d    /* 8 bits */
108
#define PCI_MIN_GNT             0x3e    /* 8 bits */
109
#define PCI_MAX_LAT             0x3f    /* 8 bits */
110
 
111
/* Header type 1 (PCI-to-PCI bridges) */
112
#define PCI_PRIMARY_BUS         0x18    /* Primary bus number */
113
#define PCI_SECONDARY_BUS       0x19    /* Secondary bus number */
114
#define PCI_SUBORDINATE_BUS     0x1a    /* Highest bus number behind the bridge */
115
#define PCI_SEC_LATENCY_TIMER   0x1b    /* Latency timer for secondary interface */
116
#define PCI_IO_BASE             0x1c    /* I/O range behind the bridge */
117
#define PCI_IO_LIMIT            0x1d
118
#define  PCI_IO_RANGE_TYPE_MASK 0x0f    /* I/O bridging type */
119
#define  PCI_IO_RANGE_TYPE_16   0x00
120
#define  PCI_IO_RANGE_TYPE_32   0x01
121
#define  PCI_IO_RANGE_MASK      ~0x0f
122
#define PCI_SEC_STATUS          0x1e    /* Secondary status register, only bit 14 used */
123
#define PCI_MEMORY_BASE         0x20    /* Memory range behind */
124
#define PCI_MEMORY_LIMIT        0x22
125
#define  PCI_MEMORY_RANGE_TYPE_MASK 0x0f
126
#define  PCI_MEMORY_RANGE_MASK  ~0x0f
127
#define PCI_PREF_MEMORY_BASE    0x24    /* Prefetchable memory range behind */
128
#define PCI_PREF_MEMORY_LIMIT   0x26
129
#define  PCI_PREF_RANGE_TYPE_MASK 0x0f
130
#define  PCI_PREF_RANGE_TYPE_32 0x00
131
#define  PCI_PREF_RANGE_TYPE_64 0x01
132
#define  PCI_PREF_RANGE_MASK    ~0x0f
133
#define PCI_PREF_BASE_UPPER32   0x28    /* Upper half of prefetchable memory range */
134
#define PCI_PREF_LIMIT_UPPER32  0x2c
135
#define PCI_IO_BASE_UPPER16     0x30    /* Upper half of I/O addresses */
136
#define PCI_IO_LIMIT_UPPER16    0x32
137
/* 0x34-0x3b is reserved */
138
#define PCI_ROM_ADDRESS1        0x38    /* Same as PCI_ROM_ADDRESS, but for htype 1 */
139
/* 0x3c-0x3d are same as for htype 0 */
140
#define PCI_BRIDGE_CONTROL      0x3e
141
#define  PCI_BRIDGE_CTL_PARITY  0x01    /* Enable parity detection on secondary interface */
142
#define  PCI_BRIDGE_CTL_SERR    0x02    /* The same for SERR forwarding */
143
#define  PCI_BRIDGE_CTL_NO_ISA  0x04    /* Disable bridging of ISA ports */
144
#define  PCI_BRIDGE_CTL_VGA     0x08    /* Forward VGA addresses */
145
#define  PCI_BRIDGE_CTL_MASTER_ABORT 0x20  /* Report master aborts */
146
#define  PCI_BRIDGE_CTL_BUS_RESET 0x40  /* Secondary bus reset */
147
#define  PCI_BRIDGE_CTL_FAST_BACK 0x80  /* Fast Back2Back enabled on secondary interface */
148
 
149
/* Header type 2 (CardBus bridges) */
150
/* 0x14-0x15 reserved */
151
#define PCI_CB_SEC_STATUS       0x16    /* Secondary status */
152
#define PCI_CB_PRIMARY_BUS      0x18    /* PCI bus number */
153
#define PCI_CB_CARD_BUS         0x19    /* CardBus bus number */
154
#define PCI_CB_SUBORDINATE_BUS  0x1a    /* Subordinate bus number */
155
#define PCI_CB_LATENCY_TIMER    0x1b    /* CardBus latency timer */
156
#define PCI_CB_MEMORY_BASE_0    0x1c
157
#define PCI_CB_MEMORY_LIMIT_0   0x20
158
#define PCI_CB_MEMORY_BASE_1    0x24
159
#define PCI_CB_MEMORY_LIMIT_1   0x28
160
#define PCI_CB_IO_BASE_0        0x2c
161
#define PCI_CB_IO_BASE_0_HI     0x2e
162
#define PCI_CB_IO_LIMIT_0       0x30
163
#define PCI_CB_IO_LIMIT_0_HI    0x32
164
#define PCI_CB_IO_BASE_1        0x34
165
#define PCI_CB_IO_BASE_1_HI     0x36
166
#define PCI_CB_IO_LIMIT_1       0x38
167
#define PCI_CB_IO_LIMIT_1_HI    0x3a
168
#define  PCI_CB_IO_RANGE_MASK   ~0x03
169
/* 0x3c-0x3d are same as for htype 0 */
170
#define PCI_CB_BRIDGE_CONTROL   0x3e
171
#define  PCI_CB_BRIDGE_CTL_PARITY       0x01    /* Similar to standard bridge control register */
172
#define  PCI_CB_BRIDGE_CTL_SERR         0x02
173
#define  PCI_CB_BRIDGE_CTL_ISA          0x04
174
#define  PCI_CB_BRIDGE_CTL_VGA          0x08
175
#define  PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
176
#define  PCI_CB_BRIDGE_CTL_CB_RESET     0x40    /* CardBus reset */
177
#define  PCI_CB_BRIDGE_CTL_16BIT_INT    0x80    /* Enable interrupt for 16-bit cards */
178
#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100  /* Prefetch enable for both memory regions */
179
#define  PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
180
#define  PCI_CB_BRIDGE_CTL_POST_WRITES  0x400
181
#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
182
#define PCI_CB_SUBSYSTEM_ID     0x42
183
#define PCI_CB_LEGACY_MODE_BASE 0x44    /* 16-bit PC Card legacy mode base address (ExCa) */
184
/* 0x48-0x7f reserved */
185
 
186
/* Device classes and subclasses */
187
 
188
#define PCI_CLASS_NOT_DEFINED           0x0000
189
#define PCI_CLASS_NOT_DEFINED_VGA       0x0001
190
 
191
#define PCI_BASE_CLASS_STORAGE          0x01
192
#define PCI_CLASS_STORAGE_SCSI          0x0100
193
#define PCI_CLASS_STORAGE_IDE           0x0101
194
#define PCI_CLASS_STORAGE_FLOPPY        0x0102
195
#define PCI_CLASS_STORAGE_IPI           0x0103
196
#define PCI_CLASS_STORAGE_RAID          0x0104
197
#define PCI_CLASS_STORAGE_OTHER         0x0180
198
 
199
#define PCI_BASE_CLASS_NETWORK          0x02
200
#define PCI_CLASS_NETWORK_ETHERNET      0x0200
201
#define PCI_CLASS_NETWORK_TOKEN_RING    0x0201
202
#define PCI_CLASS_NETWORK_FDDI          0x0202
203
#define PCI_CLASS_NETWORK_ATM           0x0203
204
#define PCI_CLASS_NETWORK_OTHER         0x0280
205
 
206
#define PCI_BASE_CLASS_DISPLAY          0x03
207
#define PCI_CLASS_DISPLAY_VGA           0x0300
208
#define PCI_CLASS_DISPLAY_XGA           0x0301
209
#define PCI_CLASS_DISPLAY_OTHER         0x0380
210
 
211
#define PCI_BASE_CLASS_MULTIMEDIA       0x04
212
#define PCI_CLASS_MULTIMEDIA_VIDEO      0x0400
213
#define PCI_CLASS_MULTIMEDIA_AUDIO      0x0401
214
#define PCI_CLASS_MULTIMEDIA_OTHER      0x0480
215
 
216
#define PCI_BASE_CLASS_MEMORY           0x05
217
#define  PCI_CLASS_MEMORY_RAM           0x0500
218
#define  PCI_CLASS_MEMORY_FLASH         0x0501
219
#define  PCI_CLASS_MEMORY_OTHER         0x0580
220
 
221
#define PCI_BASE_CLASS_BRIDGE           0x06
222
#define  PCI_CLASS_BRIDGE_HOST          0x0600
223
#define  PCI_CLASS_BRIDGE_ISA           0x0601
224
#define  PCI_CLASS_BRIDGE_EISA          0x0602
225
#define  PCI_CLASS_BRIDGE_MC            0x0603
226
#define  PCI_CLASS_BRIDGE_PCI           0x0604
227
#define  PCI_CLASS_BRIDGE_PCMCIA        0x0605
228
#define  PCI_CLASS_BRIDGE_NUBUS         0x0606
229
#define  PCI_CLASS_BRIDGE_CARDBUS       0x0607
230
#define  PCI_CLASS_BRIDGE_OTHER         0x0680
231
 
232
#define PCI_BASE_CLASS_COMMUNICATION    0x07
233
#define PCI_CLASS_COMMUNICATION_SERIAL  0x0700
234
#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
235
#define PCI_CLASS_COMMUNICATION_OTHER   0x0780
236
 
237
#define PCI_BASE_CLASS_SYSTEM           0x08
238
#define PCI_CLASS_SYSTEM_PIC            0x0800
239
#define PCI_CLASS_SYSTEM_DMA            0x0801
240
#define PCI_CLASS_SYSTEM_TIMER          0x0802
241
#define PCI_CLASS_SYSTEM_RTC            0x0803
242
#define PCI_CLASS_SYSTEM_OTHER          0x0880
243
 
244
#define PCI_BASE_CLASS_INPUT            0x09
245
#define PCI_CLASS_INPUT_KEYBOARD        0x0900
246
#define PCI_CLASS_INPUT_PEN             0x0901
247
#define PCI_CLASS_INPUT_MOUSE           0x0902
248
#define PCI_CLASS_INPUT_OTHER           0x0980
249
 
250
#define PCI_BASE_CLASS_DOCKING          0x0a
251
#define PCI_CLASS_DOCKING_GENERIC       0x0a00
252
#define PCI_CLASS_DOCKING_OTHER         0x0a01
253
 
254
#define PCI_BASE_CLASS_PROCESSOR        0x0b
255
#define PCI_CLASS_PROCESSOR_386         0x0b00
256
#define PCI_CLASS_PROCESSOR_486         0x0b01
257
#define PCI_CLASS_PROCESSOR_PENTIUM     0x0b02
258
#define PCI_CLASS_PROCESSOR_ALPHA       0x0b10
259
#define PCI_CLASS_PROCESSOR_POWERPC     0x0b20
260
#define PCI_CLASS_PROCESSOR_CO          0x0b40
261
 
262
#define PCI_BASE_CLASS_SERIAL           0x0c
263
#define PCI_CLASS_SERIAL_FIREWIRE       0x0c00
264
#define PCI_CLASS_SERIAL_ACCESS         0x0c01
265
#define PCI_CLASS_SERIAL_SSA            0x0c02
266
#define PCI_CLASS_SERIAL_USB            0x0c03
267
#define PCI_CLASS_SERIAL_FIBER          0x0c04
268
 
269
#define PCI_CLASS_OTHERS                0xff
270
 
271
/*
272
 * Vendor and card ID's: sort these numerically according to vendor
273
 * (and according to card ID within vendor). Send all updates to
274
 * <linux-pcisupport@cck.uni-kl.de>.
275
 */
276
#define PCI_VENDOR_ID_COMPAQ            0x0e11
277
#define PCI_DEVICE_ID_COMPAQ_1280       0x3033
278
#define PCI_DEVICE_ID_COMPAQ_TRIFLEX    0x4000
279
#define PCI_DEVICE_ID_COMPAQ_SMART2P    0xae10
280
#define PCI_DEVICE_ID_COMPAQ_NETEL100   0xae32
281
#define PCI_DEVICE_ID_COMPAQ_NETEL10    0xae34
282
#define PCI_DEVICE_ID_COMPAQ_NETFLEX3I  0xae35
283
#define PCI_DEVICE_ID_COMPAQ_NETEL100D  0xae40
284
#define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43
285
#define PCI_DEVICE_ID_COMPAQ_NETEL100I  0xb011
286
#define PCI_DEVICE_ID_COMPAQ_THUNDER    0xf130
287
#define PCI_DEVICE_ID_COMPAQ_NETFLEX3B  0xf150
288
 
289
#define PCI_VENDOR_ID_NCR               0x1000
290
#define PCI_DEVICE_ID_NCR_53C810        0x0001
291
#define PCI_DEVICE_ID_NCR_53C820        0x0002
292
#define PCI_DEVICE_ID_NCR_53C825        0x0003
293
#define PCI_DEVICE_ID_NCR_53C815        0x0004
294
#define PCI_DEVICE_ID_NCR_53C860        0x0006
295
#define PCI_DEVICE_ID_NCR_53C896        0x000b
296
#define PCI_DEVICE_ID_NCR_53C895        0x000c
297
#define PCI_DEVICE_ID_NCR_53C885        0x000d
298
#define PCI_DEVICE_ID_NCR_53C875        0x000f
299
#define PCI_DEVICE_ID_NCR_53C875J       0x008f
300
 
301
#define PCI_VENDOR_ID_ATI               0x1002
302
#define PCI_DEVICE_ID_ATI_68800         0x4158
303
#define PCI_DEVICE_ID_ATI_215CT222      0x4354
304
#define PCI_DEVICE_ID_ATI_210888CX      0x4358
305
#define PCI_DEVICE_ID_ATI_215GB         0x4742
306
#define PCI_DEVICE_ID_ATI_215GD         0x4744
307
#define PCI_DEVICE_ID_ATI_215GI         0x4749
308
#define PCI_DEVICE_ID_ATI_215GP         0x4750
309
#define PCI_DEVICE_ID_ATI_215GQ         0x4751
310
#define PCI_DEVICE_ID_ATI_215GT         0x4754
311
#define PCI_DEVICE_ID_ATI_215GTB        0x4755
312
#define PCI_DEVICE_ID_ATI_210888GX      0x4758
313
#define PCI_DEVICE_ID_ATI_215LG         0x4c47
314
#define PCI_DEVICE_ID_ATI_264LT         0x4c54
315
#define PCI_DEVICE_ID_ATI_264VT         0x5654
316
 
317
#define PCI_VENDOR_ID_VLSI              0x1004
318
#define PCI_DEVICE_ID_VLSI_82C592       0x0005
319
#define PCI_DEVICE_ID_VLSI_82C593       0x0006
320
#define PCI_DEVICE_ID_VLSI_82C594       0x0007
321
#define PCI_DEVICE_ID_VLSI_82C597       0x0009
322
#define PCI_DEVICE_ID_VLSI_82C541       0x000c
323
#define PCI_DEVICE_ID_VLSI_82C543       0x000d
324
#define PCI_DEVICE_ID_VLSI_82C532       0x0101
325
#define PCI_DEVICE_ID_VLSI_82C534       0x0102
326
#define PCI_DEVICE_ID_VLSI_82C535       0x0104
327
#define PCI_DEVICE_ID_VLSI_82C147       0x0105
328
#define PCI_DEVICE_ID_VLSI_VAS96011     0x0702
329
 
330
#define PCI_VENDOR_ID_ADL               0x1005
331
#define PCI_DEVICE_ID_ADL_2301          0x2301
332
 
333
#define PCI_VENDOR_ID_NS                0x100b
334
#define PCI_DEVICE_ID_NS_87415          0x0002
335
#define PCI_DEVICE_ID_NS_87410          0xd001
336
 
337
#define PCI_VENDOR_ID_TSENG             0x100c
338
#define PCI_DEVICE_ID_TSENG_W32P_2      0x3202
339
#define PCI_DEVICE_ID_TSENG_W32P_b      0x3205
340
#define PCI_DEVICE_ID_TSENG_W32P_c      0x3206
341
#define PCI_DEVICE_ID_TSENG_W32P_d      0x3207
342
#define PCI_DEVICE_ID_TSENG_ET6000      0x3208
343
 
344
#define PCI_VENDOR_ID_WEITEK            0x100e
345
#define PCI_DEVICE_ID_WEITEK_P9000      0x9001
346
#define PCI_DEVICE_ID_WEITEK_P9100      0x9100
347
 
348
#define PCI_VENDOR_ID_DEC               0x1011
349
#define PCI_DEVICE_ID_DEC_BRD           0x0001
350
#define PCI_DEVICE_ID_DEC_TULIP         0x0002
351
#define PCI_DEVICE_ID_DEC_TGA           0x0004
352
#define PCI_DEVICE_ID_DEC_TULIP_FAST    0x0009
353
#define PCI_DEVICE_ID_DEC_TGA2          0x000D
354
#define PCI_DEVICE_ID_DEC_FDDI          0x000F
355
#define PCI_DEVICE_ID_DEC_TULIP_PLUS    0x0014
356
#define PCI_DEVICE_ID_DEC_21142         0x0019
357
#define PCI_DEVICE_ID_DEC_21052         0x0021
358
#define PCI_DEVICE_ID_DEC_21150         0x0022
359
#define PCI_DEVICE_ID_DEC_21152         0x0024
360
 
361
#define PCI_VENDOR_ID_CIRRUS            0x1013
362
#define PCI_DEVICE_ID_CIRRUS_7548       0x0038
363
#define PCI_DEVICE_ID_CIRRUS_5430       0x00a0
364
#define PCI_DEVICE_ID_CIRRUS_5434_4     0x00a4
365
#define PCI_DEVICE_ID_CIRRUS_5434_8     0x00a8
366
#define PCI_DEVICE_ID_CIRRUS_5436       0x00ac
367
#define PCI_DEVICE_ID_CIRRUS_5446       0x00b8
368
#define PCI_DEVICE_ID_CIRRUS_5480       0x00bc
369
#define PCI_DEVICE_ID_CIRRUS_5464       0x00d4
370
#define PCI_DEVICE_ID_CIRRUS_5465       0x00d6
371
#define PCI_DEVICE_ID_CIRRUS_6729       0x1100
372
#define PCI_DEVICE_ID_CIRRUS_6832       0x1110
373
#define PCI_DEVICE_ID_CIRRUS_7542       0x1200
374
#define PCI_DEVICE_ID_CIRRUS_7543       0x1202
375
#define PCI_DEVICE_ID_CIRRUS_7541       0x1204
376
 
377
#define PCI_VENDOR_ID_IBM               0x1014
378
#define PCI_DEVICE_ID_IBM_FIRE_CORAL    0x000a
379
#define PCI_DEVICE_ID_IBM_TR            0x0018
380
#define PCI_DEVICE_ID_IBM_82G2675       0x001d
381
#define PCI_DEVICE_ID_IBM_MCA           0x0020
382
#define PCI_DEVICE_ID_IBM_82351         0x0022
383
#define PCI_DEVICE_ID_IBM_SERVERAID     0x002e
384
#define PCI_DEVICE_ID_IBM_TR_WAKE       0x003e
385
#define PCI_DEVICE_ID_IBM_MPIC          0x0046
386
#define PCI_DEVICE_ID_IBM_3780IDSP      0x007d
387
#define PCI_DEVICE_ID_IBM_MPIC_2        0xffff
388
 
389
#define PCI_VENDOR_ID_WD                0x101c
390
#define PCI_DEVICE_ID_WD_7197           0x3296
391
 
392
#define PCI_VENDOR_ID_AMD               0x1022
393
#define PCI_DEVICE_ID_AMD_LANCE         0x2000
394
#define PCI_DEVICE_ID_AMD_SCSI          0x2020
395
 
396
#define PCI_VENDOR_ID_TRIDENT           0x1023
397
#define PCI_DEVICE_ID_TRIDENT_9397      0x9397
398
#define PCI_DEVICE_ID_TRIDENT_9420      0x9420
399
#define PCI_DEVICE_ID_TRIDENT_9440      0x9440
400
#define PCI_DEVICE_ID_TRIDENT_9660      0x9660
401
#define PCI_DEVICE_ID_TRIDENT_9750      0x9750
402
 
403
#define PCI_VENDOR_ID_AI                0x1025
404
#define PCI_DEVICE_ID_AI_M1435          0x1435
405
 
406
#define PCI_VENDOR_ID_MATROX            0x102B
407
#define PCI_DEVICE_ID_MATROX_MGA_2      0x0518
408
#define PCI_DEVICE_ID_MATROX_MIL        0x0519
409
#define PCI_DEVICE_ID_MATROX_MYS        0x051A
410
#define PCI_DEVICE_ID_MATROX_MIL_2      0x051b
411
#define PCI_DEVICE_ID_MATROX_MIL_2_AGP  0x051f
412
#define PCI_DEVICE_ID_MATROX_MGA_IMP    0x0d10
413
 
414
#define PCI_VENDOR_ID_CT                0x102c
415
#define PCI_DEVICE_ID_CT_65545          0x00d8
416
#define PCI_DEVICE_ID_CT_65548          0x00dc
417
#define PCI_DEVICE_ID_CT_65550          0x00e0
418
#define PCI_DEVICE_ID_CT_65554          0x00e4
419
#define PCI_DEVICE_ID_CT_65555          0x00e5
420
 
421
#define PCI_VENDOR_ID_MIRO              0x1031
422
#define PCI_DEVICE_ID_MIRO_36050        0x5601
423
 
424
#define PCI_VENDOR_ID_NEC               0x1033
425
#define PCI_DEVICE_ID_NEC_PCX2          0x0046
426
 
427
#define PCI_VENDOR_ID_FD                0x1036
428
#define PCI_DEVICE_ID_FD_36C70          0x0000
429
 
430
#define PCI_VENDOR_ID_SI                0x1039
431
#define PCI_DEVICE_ID_SI_5591_AGP       0x0001
432
#define PCI_DEVICE_ID_SI_6202           0x0002
433
#define PCI_DEVICE_ID_SI_503            0x0008
434
#define PCI_DEVICE_ID_SI_ACPI           0x0009
435
#define PCI_DEVICE_ID_SI_5597_VGA       0x0200
436
#define PCI_DEVICE_ID_SI_6205           0x0205
437
#define PCI_DEVICE_ID_SI_501            0x0406
438
#define PCI_DEVICE_ID_SI_496            0x0496
439
#define PCI_DEVICE_ID_SI_601            0x0601
440
#define PCI_DEVICE_ID_SI_5107           0x5107
441
#define PCI_DEVICE_ID_SI_5511           0x5511
442
#define PCI_DEVICE_ID_SI_5513           0x5513
443
#define PCI_DEVICE_ID_SI_5571           0x5571
444
#define PCI_DEVICE_ID_SI_5591           0x5591
445
#define PCI_DEVICE_ID_SI_5597           0x5597
446
#define PCI_DEVICE_ID_SI_7001           0x7001
447
 
448
#define PCI_VENDOR_ID_HP                0x103c
449
#define PCI_DEVICE_ID_HP_J2585A         0x1030
450
#define PCI_DEVICE_ID_HP_J2585B         0x1031
451
 
452
#define PCI_VENDOR_ID_PCTECH            0x1042
453
#define PCI_DEVICE_ID_PCTECH_RZ1000     0x1000
454
#define PCI_DEVICE_ID_PCTECH_RZ1001     0x1001
455
#define PCI_DEVICE_ID_PCTECH_SAMURAI_0  0x3000
456
#define PCI_DEVICE_ID_PCTECH_SAMURAI_1  0x3010
457
#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
458
 
459
#define PCI_VENDOR_ID_DPT               0x1044   
460
#define PCI_DEVICE_ID_DPT               0xa400  
461
 
462
#define PCI_VENDOR_ID_OPTI              0x1045
463
#define PCI_DEVICE_ID_OPTI_92C178       0xc178
464
#define PCI_DEVICE_ID_OPTI_82C557       0xc557
465
#define PCI_DEVICE_ID_OPTI_82C558       0xc558
466
#define PCI_DEVICE_ID_OPTI_82C621       0xc621
467
#define PCI_DEVICE_ID_OPTI_82C700       0xc700
468
#define PCI_DEVICE_ID_OPTI_82C701       0xc701
469
#define PCI_DEVICE_ID_OPTI_82C814       0xc814
470
#define PCI_DEVICE_ID_OPTI_82C822       0xc822
471
#define PCI_DEVICE_ID_OPTI_82C825       0xd568
472
 
473
#define PCI_VENDOR_ID_SGS               0x104a
474
#define PCI_DEVICE_ID_SGS_2000          0x0008
475
#define PCI_DEVICE_ID_SGS_1764          0x0009
476
 
477
#define PCI_VENDOR_ID_BUSLOGIC                0x104B
478
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
479
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER    0x1040
480
#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT     0x8130
481
 
482
#define PCI_VENDOR_ID_TI                0x104c
483
#define PCI_DEVICE_ID_TI_TVP4010        0x3d04
484
#define PCI_DEVICE_ID_TI_TVP4020        0x3d07
485
#define PCI_DEVICE_ID_TI_PCI1130        0xac12
486
#define PCI_DEVICE_ID_TI_PCI1031        0xac13
487
#define PCI_DEVICE_ID_TI_PCI1131        0xac15
488
#define PCI_DEVICE_ID_TI_PCI1250        0xac16
489
#define PCI_DEVICE_ID_TI_PCI1220        0xac17
490
 
491
#define PCI_VENDOR_ID_OAK               0x104e
492
#define PCI_DEVICE_ID_OAK_OTI107        0x0107
493
 
494
/* Winbond have two vendor IDs! See 0x10ad as well */
495
#define PCI_VENDOR_ID_WINBOND2          0x1050
496
#define PCI_DEVICE_ID_WINBOND2_89C940   0x0940
497
 
498
#define PCI_VENDOR_ID_MOTOROLA          0x1057
499
#define PCI_DEVICE_ID_MOTOROLA_MPC105   0x0001
500
#define PCI_DEVICE_ID_MOTOROLA_MPC106   0x0002
501
#define PCI_DEVICE_ID_MOTOROLA_RAVEN    0x4801
502
 
503
#define PCI_VENDOR_ID_PROMISE           0x105a
504
#define PCI_DEVICE_ID_PROMISE_20246     0x4d33
505
#define PCI_DEVICE_ID_PROMISE_5300      0x5300
506
 
507
#define PCI_VENDOR_ID_N9                0x105d
508
#define PCI_DEVICE_ID_N9_I128           0x2309
509
#define PCI_DEVICE_ID_N9_I128_2         0x2339
510
#define PCI_DEVICE_ID_N9_I128_T2R       0x493d
511
 
512
#define PCI_VENDOR_ID_UMC               0x1060
513
#define PCI_DEVICE_ID_UMC_UM8673F       0x0101
514
#define PCI_DEVICE_ID_UMC_UM8891A       0x0891
515
#define PCI_DEVICE_ID_UMC_UM8886BF      0x673a
516
#define PCI_DEVICE_ID_UMC_UM8886A       0x886a
517
#define PCI_DEVICE_ID_UMC_UM8881F       0x8881
518
#define PCI_DEVICE_ID_UMC_UM8886F       0x8886
519
#define PCI_DEVICE_ID_UMC_UM9017F       0x9017
520
#define PCI_DEVICE_ID_UMC_UM8886N       0xe886
521
#define PCI_DEVICE_ID_UMC_UM8891N       0xe891
522
 
523
#define PCI_VENDOR_ID_X                 0x1061
524
#define PCI_DEVICE_ID_X_AGX016          0x0001
525
 
526
#define PCI_VENDOR_ID_PICOP             0x1066
527
#define PCI_DEVICE_ID_PICOP_PT86C52X    0x0001
528
#define PCI_DEVICE_ID_PICOP_PT80C524    0x8002
529
 
530
#define PCI_VENDOR_ID_APPLE             0x106b
531
#define PCI_DEVICE_ID_APPLE_BANDIT      0x0001
532
#define PCI_DEVICE_ID_APPLE_GC          0x0002
533
#define PCI_DEVICE_ID_APPLE_HYDRA       0x000e
534
 
535
#define PCI_VENDOR_ID_NEXGEN            0x1074
536
#define PCI_DEVICE_ID_NEXGEN_82C501     0x4e78
537
 
538
#define PCI_VENDOR_ID_QLOGIC            0x1077
539
#define PCI_DEVICE_ID_QLOGIC_ISP1020    0x1020
540
#define PCI_DEVICE_ID_QLOGIC_ISP1022    0x1022
541
 
542
#define PCI_VENDOR_ID_CYRIX             0x1078
543
#define PCI_DEVICE_ID_CYRIX_5510        0x0000
544
#define PCI_DEVICE_ID_CYRIX_PCI_MASTER  0x0001
545
#define PCI_DEVICE_ID_CYRIX_5520        0x0002
546
#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
547
#define PCI_DEVICE_ID_CYRIX_5530_SMI    0x0101
548
#define PCI_DEVICE_ID_CYRIX_5530_IDE    0x0102
549
#define PCI_DEVICE_ID_CYRIX_5530_AUDIO  0x0103
550
#define PCI_DEVICE_ID_CYRIX_5530_VIDEO  0x0104
551
 
552
#define PCI_VENDOR_ID_LEADTEK           0x107d
553
#define PCI_DEVICE_ID_LEADTEK_805       0x0000
554
 
555
#define PCI_VENDOR_ID_CONTAQ            0x1080
556
#define PCI_DEVICE_ID_CONTAQ_82C599     0x0600
557
#define PCI_DEVICE_ID_CONTAQ_82C693     0xc693
558
 
559
#define PCI_VENDOR_ID_FOREX             0x1083
560
 
561
#define PCI_VENDOR_ID_OLICOM            0x108d
562
#define PCI_DEVICE_ID_OLICOM_OC3136     0x0001
563
#define PCI_DEVICE_ID_OLICOM_OC2315     0x0011
564
#define PCI_DEVICE_ID_OLICOM_OC2325     0x0012
565
#define PCI_DEVICE_ID_OLICOM_OC2183     0x0013
566
#define PCI_DEVICE_ID_OLICOM_OC2326     0x0014
567
#define PCI_DEVICE_ID_OLICOM_OC6151     0x0021
568
 
569
#define PCI_VENDOR_ID_SUN               0x108e
570
#define PCI_DEVICE_ID_SUN_EBUS          0x1000
571
#define PCI_DEVICE_ID_SUN_HAPPYMEAL     0x1001
572
#define PCI_DEVICE_ID_SUN_SIMBA         0x5000
573
#define PCI_DEVICE_ID_SUN_PBM           0x8000
574
#define PCI_DEVICE_ID_SUN_SABRE         0xa000
575
 
576
#define PCI_VENDOR_ID_CMD               0x1095
577
#define PCI_DEVICE_ID_CMD_640           0x0640
578
#define PCI_DEVICE_ID_CMD_643           0x0643
579
#define PCI_DEVICE_ID_CMD_646           0x0646
580
#define PCI_DEVICE_ID_CMD_647           0x0647
581
#define PCI_DEVICE_ID_CMD_670           0x0670
582
 
583
#define PCI_VENDOR_ID_VISION            0x1098
584
#define PCI_DEVICE_ID_VISION_QD8500     0x0001
585
#define PCI_DEVICE_ID_VISION_QD8580     0x0002
586
 
587
#define PCI_VENDOR_ID_BROOKTREE         0x109e
588
#define PCI_DEVICE_ID_BROOKTREE_848     0x0350
589
#define PCI_DEVICE_ID_BROOKTREE_849A    0x0351
590
#define PCI_DEVICE_ID_BROOKTREE_8474    0x8474
591
 
592
#define PCI_VENDOR_ID_SIERRA            0x10a8
593
#define PCI_DEVICE_ID_SIERRA_STB        0x0000
594
 
595
#define PCI_VENDOR_ID_ACC               0x10aa
596
#define PCI_DEVICE_ID_ACC_2056          0x0000
597
 
598
#define PCI_VENDOR_ID_WINBOND           0x10ad
599
#define PCI_DEVICE_ID_WINBOND_83769     0x0001
600
#define PCI_DEVICE_ID_WINBOND_82C105    0x0105
601
#define PCI_DEVICE_ID_WINBOND_83C553    0x0565
602
 
603
#define PCI_VENDOR_ID_DATABOOK          0x10b3
604
#define PCI_DEVICE_ID_DATABOOK_87144    0xb106
605
 
606
#define PCI_VENDOR_ID_PLX               0x10b5
607
#define PCI_DEVICE_ID_PLX_9050          0x9050
608
#define PCI_DEVICE_ID_PLX_9060          0x9060
609
#define PCI_DEVICE_ID_PLX_9060ES        0x906E
610
#define PCI_DEVICE_ID_PLX_9060SD        0x906D
611
#define PCI_DEVICE_ID_PLX_9080          0x9080
612
 
613
#define PCI_VENDOR_ID_MADGE             0x10b6
614
#define PCI_DEVICE_ID_MADGE_MK2         0x0002
615
#define PCI_DEVICE_ID_MADGE_C155S       0x1001
616
 
617
#define PCI_VENDOR_ID_3COM              0x10b7
618
#define PCI_DEVICE_ID_3COM_3C339        0x3390
619
#define PCI_DEVICE_ID_3COM_3C590        0x5900
620
#define PCI_DEVICE_ID_3COM_3C595TX      0x5950
621
#define PCI_DEVICE_ID_3COM_3C595T4      0x5951
622
#define PCI_DEVICE_ID_3COM_3C595MII     0x5952
623
#define PCI_DEVICE_ID_3COM_3C900TPO     0x9000
624
#define PCI_DEVICE_ID_3COM_3C900COMBO   0x9001
625
#define PCI_DEVICE_ID_3COM_3C905TX      0x9050
626
#define PCI_DEVICE_ID_3COM_3C905T4      0x9051
627
#define PCI_DEVICE_ID_3COM_3C905B_TX    0x9055
628
 
629
#define PCI_VENDOR_ID_SMC               0x10b8
630
#define PCI_DEVICE_ID_SMC_EPIC100       0x0005
631
 
632
#define PCI_VENDOR_ID_AL                0x10b9
633
#define PCI_DEVICE_ID_AL_M1445          0x1445
634
#define PCI_DEVICE_ID_AL_M1449          0x1449
635
#define PCI_DEVICE_ID_AL_M1451          0x1451
636
#define PCI_DEVICE_ID_AL_M1461          0x1461
637
#define PCI_DEVICE_ID_AL_M1489          0x1489
638
#define PCI_DEVICE_ID_AL_M1511          0x1511
639
#define PCI_DEVICE_ID_AL_M1513          0x1513
640
#define PCI_DEVICE_ID_AL_M1521          0x1521
641
#define PCI_DEVICE_ID_AL_M1523          0x1523
642
#define PCI_DEVICE_ID_AL_M1531          0x1531
643
#define PCI_DEVICE_ID_AL_M1533          0x1533
644
#define PCI_DEVICE_ID_AL_M3307          0x3307
645
#define PCI_DEVICE_ID_AL_M4803          0x5215
646
#define PCI_DEVICE_ID_AL_M5219          0x5219
647
#define PCI_DEVICE_ID_AL_M5229          0x5229
648
#define PCI_DEVICE_ID_AL_M5237          0x5237
649
#define PCI_DEVICE_ID_AL_M7101          0x7101
650
 
651
#define PCI_VENDOR_ID_MITSUBISHI        0x10ba
652
 
653
#define PCI_VENDOR_ID_SURECOM           0x10bd
654
#define PCI_DEVICE_ID_SURECOM_NE34      0x0e34
655
 
656
#define PCI_VENDOR_ID_NEOMAGIC          0x10c8
657
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
658
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
659
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
660
#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
661
 
662
#define PCI_VENDOR_ID_ASP               0x10cd
663
#define PCI_DEVICE_ID_ASP_ABP940        0x1200
664
#define PCI_DEVICE_ID_ASP_ABP940U       0x1300
665
#define PCI_DEVICE_ID_ASP_ABP940UW      0x2300
666
 
667
#define PCI_VENDOR_ID_MACRONIX          0x10d9
668
#define PCI_DEVICE_ID_MACRONIX_MX98713  0x0512
669
#define PCI_DEVICE_ID_MACRONIX_MX987x5  0x0531
670
 
671
#define PCI_VENDOR_ID_CERN              0x10dc
672
#define PCI_DEVICE_ID_CERN_SPSB_PMC     0x0001
673
#define PCI_DEVICE_ID_CERN_SPSB_PCI     0x0002
674
#define PCI_DEVICE_ID_CERN_HIPPI_DST    0x0021
675
#define PCI_DEVICE_ID_CERN_HIPPI_SRC    0x0022
676
 
677
#define PCI_VENDOR_ID_NVIDIA            0x10de
678
 
679
#define PCI_VENDOR_ID_IMS               0x10e0
680
#define PCI_DEVICE_ID_IMS_8849          0x8849
681
 
682
#define PCI_VENDOR_ID_TEKRAM2           0x10e1
683
#define PCI_DEVICE_ID_TEKRAM2_690c      0x690c
684
 
685
#define PCI_VENDOR_ID_TUNDRA            0x10e3
686
#define PCI_DEVICE_ID_TUNDRA_CA91C042   0x0000
687
 
688
#define PCI_VENDOR_ID_AMCC              0x10e8
689
#define PCI_DEVICE_ID_AMCC_MYRINET      0x8043
690
#define PCI_DEVICE_ID_AMCC_PARASTATION  0x8062
691
#define PCI_DEVICE_ID_AMCC_S5933        0x807d
692
#define PCI_DEVICE_ID_AMCC_S5933_HEPC3  0x809c
693
 
694
#define PCI_VENDOR_ID_INTERG            0x10ea
695
#define PCI_DEVICE_ID_INTERG_1680       0x1680
696
#define PCI_DEVICE_ID_INTERG_1682       0x1682
697
 
698
#define PCI_VENDOR_ID_REALTEK           0x10ec
699
#define PCI_DEVICE_ID_REALTEK_8029      0x8029
700
#define PCI_DEVICE_ID_REALTEK_8129      0x8129
701
#define PCI_DEVICE_ID_REALTEK_8139      0x8139
702
 
703
#define PCI_VENDOR_ID_TRUEVISION        0x10fa
704
#define PCI_DEVICE_ID_TRUEVISION_T1000  0x000c
705
 
706
#define PCI_VENDOR_ID_INIT              0x1101
707
#define PCI_DEVICE_ID_INIT_320P         0x9100
708
#define PCI_DEVICE_ID_INIT_360P         0x9500
709
 
710
#define PCI_VENDOR_ID_TTI               0x1103
711
#define PCI_DEVICE_ID_TTI_HPT343        0x0003
712
 
713
#define PCI_VENDOR_ID_VIA               0x1106
714
#define PCI_DEVICE_ID_VIA_82C505        0x0505
715
#define PCI_DEVICE_ID_VIA_82C561        0x0561
716
#define PCI_DEVICE_ID_VIA_82C586_1      0x0571
717
#define PCI_DEVICE_ID_VIA_82C576        0x0576
718
#define PCI_DEVICE_ID_VIA_82C585        0x0585
719
#define PCI_DEVICE_ID_VIA_82C586_0      0x0586
720
#define PCI_DEVICE_ID_VIA_82C595        0x0595
721
#define PCI_DEVICE_ID_VIA_82C597_0      0x0597
722
#define PCI_DEVICE_ID_VIA_82C926        0x0926
723
#define PCI_DEVICE_ID_VIA_82C416        0x1571
724
#define PCI_DEVICE_ID_VIA_82C595_97     0x1595
725
#define PCI_DEVICE_ID_VIA_82C586_2      0x3038
726
#define PCI_DEVICE_ID_VIA_82C586_3      0x3040
727
#define PCI_DEVICE_ID_VIA_86C100A       0x6100
728
#define PCI_DEVICE_ID_VIA_82C597_1      0x8597
729
 
730
#define PCI_VENDOR_ID_VORTEX            0x1119
731
#define PCI_DEVICE_ID_VORTEX_GDT60x0    0x0000
732
#define PCI_DEVICE_ID_VORTEX_GDT6000B   0x0001
733
#define PCI_DEVICE_ID_VORTEX_GDT6x10    0x0002
734
#define PCI_DEVICE_ID_VORTEX_GDT6x20    0x0003
735
#define PCI_DEVICE_ID_VORTEX_GDT6530    0x0004
736
#define PCI_DEVICE_ID_VORTEX_GDT6550    0x0005
737
#define PCI_DEVICE_ID_VORTEX_GDT6x17    0x0006
738
#define PCI_DEVICE_ID_VORTEX_GDT6x27    0x0007
739
#define PCI_DEVICE_ID_VORTEX_GDT6537    0x0008
740
#define PCI_DEVICE_ID_VORTEX_GDT6557    0x0009
741
#define PCI_DEVICE_ID_VORTEX_GDT6x15    0x000a
742
#define PCI_DEVICE_ID_VORTEX_GDT6x25    0x000b
743
#define PCI_DEVICE_ID_VORTEX_GDT6535    0x000c
744
#define PCI_DEVICE_ID_VORTEX_GDT6555    0x000d
745
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP  0x0100
746
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP  0x0101
747
#define PCI_DEVICE_ID_VORTEX_GDT6537RP  0x0102
748
#define PCI_DEVICE_ID_VORTEX_GDT6557RP  0x0103
749
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP  0x0104
750
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP  0x0105
751
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
752
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
753
#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
754
#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
755
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
756
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
757
#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
758
#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
759
#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
760
#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
761
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
762
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
763
 
764
#define PCI_VENDOR_ID_EF                0x111a
765
#define PCI_DEVICE_ID_EF_ATM_FPGA       0x0000
766
#define PCI_DEVICE_ID_EF_ATM_ASIC       0x0002
767
 
768
#define PCI_VENDOR_ID_FORE              0x1127
769
#define PCI_DEVICE_ID_FORE_PCA200PC     0x0210
770
#define PCI_DEVICE_ID_FORE_PCA200E      0x0300
771
 
772
#define PCI_VENDOR_ID_IMAGINGTECH       0x112f
773
#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
774
 
775
#define PCI_VENDOR_ID_PHILIPS           0x1131
776
#define PCI_DEVICE_ID_PHILIPS_SAA7145   0x7145
777
#define PCI_DEVICE_ID_PHILIPS_SAA7146   0x7146
778
 
779
#define PCI_VENDOR_ID_CYCLONE           0x113c
780
#define PCI_DEVICE_ID_CYCLONE_SDK       0x0001
781
 
782
#define PCI_VENDOR_ID_ALLIANCE          0x1142
783
#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
784
#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
785
#define PCI_DEVICE_ID_ALLIANCE_AT24     0x6424
786
#define PCI_DEVICE_ID_ALLIANCE_AT3D     0x643d
787
 
788
#define PCI_VENDOR_ID_SK                0x1148
789
#define PCI_DEVICE_ID_SK_FP             0x4000
790
#define PCI_DEVICE_ID_SK_TR             0x4200
791
#define PCI_DEVICE_ID_SK_GE             0x4300
792
 
793
#define PCI_VENDOR_ID_VMIC              0x114a
794
#define PCI_DEVICE_ID_VMIC_VME          0x7587
795
 
796
#define PCI_VENDOR_ID_DIGI              0x114f
797
#define PCI_DEVICE_ID_DIGI_EPC          0x0002
798
#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH  0x0003
799
#define PCI_DEVICE_ID_DIGI_XEM          0x0004
800
#define PCI_DEVICE_ID_DIGI_XR           0x0005
801
#define PCI_DEVICE_ID_DIGI_CX           0x0006
802
#define PCI_DEVICE_ID_DIGI_XRJ          0x0009
803
#define PCI_DEVICE_ID_DIGI_EPCJ         0x000a
804
#define PCI_DEVICE_ID_DIGI_XR_920       0x0027
805
 
806
#define PCI_VENDOR_ID_MUTECH            0x1159
807
#define PCI_DEVICE_ID_MUTECH_MV1000     0x0001
808
 
809
#define PCI_VENDOR_ID_RENDITION         0x1163
810
#define PCI_DEVICE_ID_RENDITION_VERITE  0x0001
811
#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
812
 
813
#define PCI_VENDOR_ID_TOSHIBA           0x1179
814
#define PCI_DEVICE_ID_TOSHIBA_601       0x0601
815
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95   0x060a
816
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97   0x060f
817
 
818
#define PCI_VENDOR_ID_RICOH             0x1180
819
#define PCI_DEVICE_ID_RICOH_RL5C465     0x0465
820
#define PCI_DEVICE_ID_RICOH_RL5C466     0x0466
821
#define PCI_DEVICE_ID_RICOH_RL5C475     0x0475
822
#define PCI_DEVICE_ID_RICOH_RL5C478     0x0478
823
 
824
#define PCI_VENDOR_ID_ARTOP             0x1191
825
#define PCI_DEVICE_ID_ARTOP_ATP8400     0x0004
826
#define PCI_DEVICE_ID_ARTOP_ATP850UF    0x0005
827
 
828
#define PCI_VENDOR_ID_ZEITNET           0x1193
829
#define PCI_DEVICE_ID_ZEITNET_1221      0x0001
830
#define PCI_DEVICE_ID_ZEITNET_1225      0x0002
831
 
832
#define PCI_VENDOR_ID_OMEGA             0x119b
833
#define PCI_DEVICE_ID_OMEGA_82C092G     0x1221
834
 
835
#define PCI_VENDOR_ID_LITEON            0x11ad
836
#define PCI_DEVICE_ID_LITEON_LNE100TX   0x0002
837
 
838
#define PCI_VENDOR_ID_NP                0x11bc
839
#define PCI_DEVICE_ID_NP_PCI_FDDI       0x0001
840
 
841
#define PCI_VENDOR_ID_ATT               0x11c1
842
#define PCI_DEVICE_ID_ATT_L56XMF        0x0440
843
 
844
#define PCI_VENDOR_ID_SPECIALIX         0x11cb
845
#define PCI_DEVICE_ID_SPECIALIX_IO8     0x2000
846
#define PCI_DEVICE_ID_SPECIALIX_XIO     0x4000
847
#define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
848
 
849
#define PCI_VENDOR_ID_AURAVISION        0x11d1
850
#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
851
 
852
#define PCI_VENDOR_ID_IKON              0x11d5
853
#define PCI_DEVICE_ID_IKON_10115        0x0115
854
#define PCI_DEVICE_ID_IKON_10117        0x0117
855
 
856
#define PCI_VENDOR_ID_ZORAN             0x11de
857
#define PCI_DEVICE_ID_ZORAN_36057       0x6057
858
#define PCI_DEVICE_ID_ZORAN_36120       0x6120
859
 
860
#define PCI_VENDOR_ID_KINETIC           0x11f4
861
#define PCI_DEVICE_ID_KINETIC_2915      0x2915
862
 
863
#define PCI_VENDOR_ID_COMPEX            0x11f6
864
#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
865
#define PCI_DEVICE_ID_COMPEX_RL2000     0x1401
866
 
867
#define PCI_VENDOR_ID_RP               0x11fe
868
#define PCI_DEVICE_ID_RP32INTF         0x0001
869
#define PCI_DEVICE_ID_RP8INTF          0x0002
870
#define PCI_DEVICE_ID_RP16INTF         0x0003
871
#define PCI_DEVICE_ID_RP4QUAD          0x0004
872
#define PCI_DEVICE_ID_RP8OCTA          0x0005
873
#define PCI_DEVICE_ID_RP8J             0x0006
874
#define PCI_DEVICE_ID_RPP4             0x000A
875
#define PCI_DEVICE_ID_RPP8             0x000B
876
#define PCI_DEVICE_ID_RP8M             0x000C
877
 
878
#define PCI_VENDOR_ID_CYCLADES          0x120e
879
#define PCI_DEVICE_ID_CYCLOM_Y_Lo       0x0100
880
#define PCI_DEVICE_ID_CYCLOM_Y_Hi       0x0101
881
#define PCI_DEVICE_ID_CYCLOM_Z_Lo       0x0200
882
#define PCI_DEVICE_ID_CYCLOM_Z_Hi       0x0201
883
 
884
#define PCI_VENDOR_ID_ESSENTIAL         0x120f
885
#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER      0x0001
886
 
887
#define PCI_VENDOR_ID_O2                0x1217
888
#define PCI_DEVICE_ID_O2_6729           0x6729
889
#define PCI_DEVICE_ID_O2_6730           0x673a
890
#define PCI_DEVICE_ID_O2_6832           0x6832
891
#define PCI_DEVICE_ID_O2_6836           0x6836
892
 
893
#define PCI_VENDOR_ID_3DFX              0x121a
894
#define PCI_DEVICE_ID_3DFX_VOODOO       0x0001
895
#define PCI_DEVICE_ID_3DFX_VOODOO2      0x0002
896
 
897
#define PCI_VENDOR_ID_SIGMADES          0x1236
898
#define PCI_DEVICE_ID_SIGMADES_6425     0x6401
899
 
900
#define PCI_VENDOR_ID_CCUBE             0x123f
901
 
902
#define PCI_VENDOR_ID_DIPIX             0x1246
903
 
904
#define PCI_VENDOR_ID_STALLION          0x124d
905
#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
906
#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
907
#define PCI_DEVICE_ID_STALLION_EIOPCI   0x0003
908
 
909
#define PCI_VENDOR_ID_OPTIBASE          0x1255
910
#define PCI_DEVICE_ID_OPTIBASE_FORGE    0x1110
911
#define PCI_DEVICE_ID_OPTIBASE_FUSION   0x1210
912
#define PCI_DEVICE_ID_OPTIBASE_VPLEX    0x2110
913
#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC  0x2120
914
#define PCI_DEVICE_ID_OPTIBASE_VQUEST   0x2130
915
 
916
#define PCI_VENDOR_ID_SATSAGEM          0x1267
917
#define PCI_DEVICE_ID_SATSAGEM_PCR2101  0x5352
918
#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
919
 
920
#define PCI_VENDOR_ID_HUGHES            0x1273
921
#define PCI_DEVICE_ID_HUGHES_DIRECPC    0x0002
922
 
923
#define PCI_VENDOR_ID_ENSONIQ           0x1274
924
#define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI  0x5000
925
 
926
#define PCI_VENDOR_ID_ALTEON            0x12ae
927
#define PCI_DEVICE_ID_ALTEON_ACENIC     0x0001
928
 
929
#define PCI_VENDOR_ID_PICTUREL          0x12c5
930
#define PCI_DEVICE_ID_PICTUREL_PCIVST   0x0081
931
 
932
#define PCI_VENDOR_ID_NVIDIA_SGS        0x12d2
933
#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
934
 
935
#define PCI_VENDOR_ID_CBOARDS           0x1307
936
#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
937
 
938
#define PCI_VENDOR_ID_SYMPHONY          0x1c1c
939
#define PCI_DEVICE_ID_SYMPHONY_101      0x0001
940
 
941
#define PCI_VENDOR_ID_TEKRAM            0x1de1
942
#define PCI_DEVICE_ID_TEKRAM_DC290      0xdc29
943
 
944
#define PCI_VENDOR_ID_3DLABS            0x3d3d
945
#define PCI_DEVICE_ID_3DLABS_300SX      0x0001
946
#define PCI_DEVICE_ID_3DLABS_500TX      0x0002
947
#define PCI_DEVICE_ID_3DLABS_DELTA      0x0003
948
#define PCI_DEVICE_ID_3DLABS_PERMEDIA   0x0004
949
#define PCI_DEVICE_ID_3DLABS_MX         0x0006
950
 
951
#define PCI_VENDOR_ID_AVANCE            0x4005
952
#define PCI_DEVICE_ID_AVANCE_ALG2064    0x2064
953
#define PCI_DEVICE_ID_AVANCE_2302       0x2302
954
 
955
#define PCI_VENDOR_ID_NETVIN            0x4a14
956
#define PCI_DEVICE_ID_NETVIN_NV5000SC   0x5000
957
 
958
#define PCI_VENDOR_ID_S3                0x5333
959
#define PCI_DEVICE_ID_S3_PLATO_PXS      0x0551
960
#define PCI_DEVICE_ID_S3_ViRGE          0x5631
961
#define PCI_DEVICE_ID_S3_TRIO           0x8811
962
#define PCI_DEVICE_ID_S3_AURORA64VP     0x8812
963
#define PCI_DEVICE_ID_S3_TRIO64UVP      0x8814
964
#define PCI_DEVICE_ID_S3_ViRGE_VX       0x883d
965
#define PCI_DEVICE_ID_S3_868            0x8880
966
#define PCI_DEVICE_ID_S3_928            0x88b0
967
#define PCI_DEVICE_ID_S3_864_1          0x88c0
968
#define PCI_DEVICE_ID_S3_864_2          0x88c1
969
#define PCI_DEVICE_ID_S3_964_1          0x88d0
970
#define PCI_DEVICE_ID_S3_964_2          0x88d1
971
#define PCI_DEVICE_ID_S3_968            0x88f0
972
#define PCI_DEVICE_ID_S3_TRIO64V2       0x8901
973
#define PCI_DEVICE_ID_S3_PLATO_PXG      0x8902
974
#define PCI_DEVICE_ID_S3_ViRGE_DXGX     0x8a01
975
#define PCI_DEVICE_ID_S3_ViRGE_GX2      0x8a10
976
#define PCI_DEVICE_ID_S3_ViRGE_MX       0x8c01
977
#define PCI_DEVICE_ID_S3_ViRGE_MXP      0x8c02
978
#define PCI_DEVICE_ID_S3_ViRGE_MXPMV    0x8c03
979
#define PCI_DEVICE_ID_S3_SONICVIBES     0xca00
980
 
981
#define PCI_VENDOR_ID_INTEL             0x8086
982
#define PCI_DEVICE_ID_INTEL_82375       0x0482
983
#define PCI_DEVICE_ID_INTEL_82424       0x0483
984
#define PCI_DEVICE_ID_INTEL_82378       0x0484
985
#define PCI_DEVICE_ID_INTEL_82430       0x0486
986
#define PCI_DEVICE_ID_INTEL_82434       0x04a3
987
#define PCI_DEVICE_ID_INTEL_82092AA_0   0x1221
988
#define PCI_DEVICE_ID_INTEL_82092AA_1   0x1222
989
#define PCI_DEVICE_ID_INTEL_7116        0x1223
990
#define PCI_DEVICE_ID_INTEL_82596       0x1226
991
#define PCI_DEVICE_ID_INTEL_82865       0x1227
992
#define PCI_DEVICE_ID_INTEL_82557       0x1229
993
#define PCI_DEVICE_ID_INTEL_82437       0x122d
994
#define PCI_DEVICE_ID_INTEL_82371FB_0   0x122e
995
#define PCI_DEVICE_ID_INTEL_82371FB_1   0x1230
996
#define PCI_DEVICE_ID_INTEL_82371MX     0x1234
997
#define PCI_DEVICE_ID_INTEL_82437MX     0x1235
998
#define PCI_DEVICE_ID_INTEL_82441       0x1237
999
#define PCI_DEVICE_ID_INTEL_82380FB     0x124b
1000
#define PCI_DEVICE_ID_INTEL_82439       0x1250
1001
#define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
1002
#define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
1003
#define PCI_DEVICE_ID_INTEL_82371SB_2   0x7020
1004
#define PCI_DEVICE_ID_INTEL_82437VX     0x7030
1005
#define PCI_DEVICE_ID_INTEL_82439TX     0x7100
1006
#define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
1007
#define PCI_DEVICE_ID_INTEL_82371AB     0x7111
1008
#define PCI_DEVICE_ID_INTEL_82371AB_2   0x7112
1009
#define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
1010
#define PCI_DEVICE_ID_INTEL_82443LX_0   0x7180
1011
#define PCI_DEVICE_ID_INTEL_82443LX_1   0x7181
1012
#define PCI_DEVICE_ID_INTEL_82443BX_0   0x7190
1013
#define PCI_DEVICE_ID_INTEL_82443BX_1   0x7191
1014
#define PCI_DEVICE_ID_INTEL_82443BX_2   0x7192
1015
#define PCI_DEVICE_ID_INTEL_P6          0x84c4
1016
#define PCI_DEVICE_ID_INTEL_82450GX     0x84c5
1017
 
1018
#define PCI_VENDOR_ID_KTI               0x8e2e
1019
#define PCI_DEVICE_ID_KTI_ET32P2        0x3000
1020
 
1021
#define PCI_VENDOR_ID_ADAPTEC           0x9004
1022
#define PCI_DEVICE_ID_ADAPTEC_7810      0x1078
1023
#define PCI_DEVICE_ID_ADAPTEC_7850      0x5078
1024
#define PCI_DEVICE_ID_ADAPTEC_7855      0x5578
1025
#define PCI_DEVICE_ID_ADAPTEC_5800      0x5800
1026
#define PCI_DEVICE_ID_ADAPTEC_1480A     0x6075
1027
#define PCI_DEVICE_ID_ADAPTEC_7860      0x6078
1028
#define PCI_DEVICE_ID_ADAPTEC_7861      0x6178
1029
#define PCI_DEVICE_ID_ADAPTEC_7870      0x7078
1030
#define PCI_DEVICE_ID_ADAPTEC_7871      0x7178
1031
#define PCI_DEVICE_ID_ADAPTEC_7872      0x7278
1032
#define PCI_DEVICE_ID_ADAPTEC_7873      0x7378
1033
#define PCI_DEVICE_ID_ADAPTEC_7874      0x7478
1034
#define PCI_DEVICE_ID_ADAPTEC_7895      0x7895
1035
#define PCI_DEVICE_ID_ADAPTEC_7880      0x8078
1036
#define PCI_DEVICE_ID_ADAPTEC_7881      0x8178
1037
#define PCI_DEVICE_ID_ADAPTEC_7882      0x8278
1038
#define PCI_DEVICE_ID_ADAPTEC_7883      0x8378
1039
#define PCI_DEVICE_ID_ADAPTEC_7884      0x8478
1040
#define PCI_DEVICE_ID_ADAPTEC_1030      0x8b78
1041
 
1042
#define PCI_VENDOR_ID_ADAPTEC2          0x9005
1043
#define PCI_DEVICE_ID_ADAPTEC2_2940U2   0x0010
1044
#define PCI_DEVICE_ID_ADAPTEC2_7890     0x001f
1045
#define PCI_DEVICE_ID_ADAPTEC2_3940U2   0x0050
1046
#define PCI_DEVICE_ID_ADAPTEC2_7896     0x005f
1047
 
1048
#define PCI_VENDOR_ID_ATRONICS          0x907f
1049
#define PCI_DEVICE_ID_ATRONICS_2015     0x2015
1050
 
1051
#define PCI_VENDOR_ID_HOLTEK            0x9412
1052
#define PCI_DEVICE_ID_HOLTEK_6565       0x6565
1053
 
1054
#define PCI_VENDOR_ID_TIGERJET          0xe159
1055
#define PCI_DEVICE_ID_TIGERJET_300      0x0001
1056
 
1057
#define PCI_VENDOR_ID_ARK               0xedd8
1058
#define PCI_DEVICE_ID_ARK_STING         0xa091
1059
#define PCI_DEVICE_ID_ARK_STINGARK      0xa099
1060
#define PCI_DEVICE_ID_ARK_2000MT        0xa0a1
1061
 
1062
/*
1063
 * The PCI interface treats multi-function devices as independent
1064
 * devices.  The slot/function address of each device is encoded
1065
 * in a single byte as follows:
1066
 *
1067
 *      7:3 = slot
1068
 *      2:0 = function
1069
 */
1070
#define PCI_DEVFN(slot,func)    ((((slot) & 0x1f) << 3) | ((func) & 0x07))
1071
#define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
1072
#define PCI_FUNC(devfn)         ((devfn) & 0x07)
1073
 
1074
/*
1075
 * Error values that may be returned by the PCI bios.
1076
 */
1077
#define PCIBIOS_SUCCESSFUL              0x00
1078
#define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
1079
#define PCIBIOS_BAD_VENDOR_ID           0x83
1080
#define PCIBIOS_DEVICE_NOT_FOUND        0x86
1081
#define PCIBIOS_BAD_REGISTER_NUMBER     0x87
1082
#define PCIBIOS_SET_FAILED              0x88
1083
#define PCIBIOS_BUFFER_TOO_SMALL        0x89
1084
 
1085
#define PCI_MAX_DEVICES                 16
1086
#define PCI_MAX_FUNCTIONS               8
1087
 
1088
typedef struct  {
1089
        int (*read_config_byte)(unsigned char, unsigned char,  unsigned char,
1090
                               unsigned char, unsigned char *);
1091
        int (*read_config_word)(unsigned char, unsigned char,  unsigned char,
1092
                               unsigned char, unsigned short *);
1093
        int (*read_config_dword)(unsigned char, unsigned char,  unsigned char,
1094
                               unsigned char, unsigned int *);
1095
        int (*write_config_byte)(unsigned char, unsigned char,  unsigned char,
1096
                               unsigned char, unsigned char);
1097
        int (*write_config_word)(unsigned char, unsigned char,  unsigned char,
1098
                               unsigned char, unsigned short);
1099
        int (*write_config_dword)(unsigned char, unsigned char,  unsigned char,
1100
                               unsigned char, unsigned int);
1101
}pci_config_access_functions;
1102
 
1103
typedef struct {
1104
  volatile unsigned char*       pci_config_addr;
1105
  volatile unsigned char*       pci_config_data;
1106
  pci_config_access_functions*  pci_functions;
1107
} pci_config;
1108
 
1109
extern pci_config pci;
1110
 
1111
extern inline int
1112
pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
1113
                         unsigned char where, unsigned char * val) {
1114
        return pci.pci_functions->read_config_byte(bus, slot, function, where, val);
1115
}
1116
 
1117
extern inline int
1118
pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
1119
                         unsigned char where, unsigned short * val) {
1120
        return pci.pci_functions->read_config_word(bus, slot, function, where, val);
1121
}
1122
 
1123
extern inline int
1124
pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
1125
                         unsigned char where, unsigned int * val) {
1126
        return pci.pci_functions->read_config_dword(bus, slot, function, where, val);
1127
}
1128
 
1129
extern inline int
1130
pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
1131
                         unsigned char where, unsigned char val) {
1132
        return pci.pci_functions->write_config_byte(bus, slot, function, where, val);
1133
}
1134
 
1135
extern inline int
1136
pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
1137
                         unsigned char where, unsigned short val) {
1138
        return pci.pci_functions->write_config_word(bus, slot, function, where, val);
1139
}
1140
 
1141
extern inline int
1142
pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
1143
                         unsigned char where, unsigned int val) {
1144
        return pci.pci_functions->write_config_dword(bus, slot, function, where, val);
1145
}
1146
 
1147
/*
1148
 * Return the number of PCI busses in the system
1149
 */
1150
extern unsigned char BusCountPCI();
1151
extern void InitializePCI();
1152
 
1153
#endif /* RTEMS_PCI_H */

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