OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [rtems-20020807/] [c/] [src/] [libchip/] [rtc/] [m48t08_reg.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1026 ivang
/*
2
 *  This file contains a typical set of register access routines which may be
3
 *  used with the m48t08 chip if accesses to the chip are as follows:
4
 *
5
 *    + registers are accessed as bytes
6
 *    + registers are only byte-aligned (no address gaps)
7
 *
8
 *  COPYRIGHT (c) 1989-1997.
9
 *  On-Line Applications Research Corporation (OAR).
10
 *
11
 *  The license and distribution terms for this file may be
12
 *  found in the file LICENSE in this distribution or at
13
 *  http://www.OARcorp.com/rtems/license.html.
14
 *
15
 *  m48t08_reg.c,v 1.3 2001/03/02 18:17:22 joel Exp
16
 */
17
 
18
#include <rtems.h>
19
 
20
#ifndef _M48T08_MULTIPLIER
21
#define _M48T08_MULTIPLIER 1
22
#define _M48T08_NAME(_X) _X
23
#define _M48T08_TYPE unsigned8
24
#endif
25
 
26
#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
27
  (_M48T08_TYPE *)((_base) + ((_reg) * _M48T08_MULTIPLIER ))
28
 
29
/*
30
 *  M48T08 Get Register Routine
31
 */
32
 
33
unsigned32 _M48T08_NAME(m48t08_get_register)(
34
  unsigned32  ulCtrlPort,
35
  unsigned8   ucRegNum
36
)
37
{
38
  _M48T08_TYPE *port;
39
 
40
  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
41
 
42
  return *port;
43
}
44
 
45
/*
46
 *  M48T08 Set Register Routine
47
 */
48
 
49
void  _M48T08_NAME(m48t08_set_register)(
50
  unsigned32  ulCtrlPort,
51
  unsigned8   ucRegNum,
52
  unsigned32  ucData
53
)
54
{
55
  _M48T08_TYPE *port;
56
 
57
  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
58
 
59
  *port = ucData;
60
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.