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[/] [or1k/] [trunk/] [rtems-20020807/] [cpukit/] [score/] [cpu/] [c4x/] [c4xio.h] - Blame information for rev 1779

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/*
 *  C4X IO Information
 *
 *  c4xio.h,v 1.2 2000/03/01 18:08:53 joel Exp
 */
 
#ifndef __C4XIO_h
#define __C4XIO_h
 
/*
 *  Address defines
 */
 
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
 
/* XXX how portable */
 
/* C32 Internal Control Registers */
#define C4X_STRB0_REG   0x808064
#define C4X_STRB1_REG   0x808068
#define C4X_IOSTRB_REG  0x808060
 
/* C32 Internal RAM Locations */
/* XXX how long */
#define C4X_RAM_BLK_0   0x87fe00
#define C4X_RAM_BLK_1   0x87ff00
 
/*
 *  Data Structures to Overlay the Peripherals on the CPU
 */
 
struct c4x_timer {
  volatile int tcontrol;
  volatile int r1[3];
  volatile int tcounter;
  volatile int r2[3];
  volatile int tperiod;
};
 
 
 
 
/*
 *  Timer Support Routines
 *
 *  The following section of C4x timer code is based on C40 specific
 *  timer code from Ran Cabell <rcabell@norfolk.infi.net>.  The
 *  only C3x/C4x difference spotted was the address of the timer.
 *  The names have been changed to be more RTEMS like.
 */
 
#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)
 
#define c4x_timer_set_control( _timer, _value ) \
  do { \
     (volatile int)(_timer->tcontrol) = _value; \
  } while (0);
 
#define c4x_timer_start( _timer ) \
    c4x_timer_set_control(_timer, 0x02c1 )
 
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
 
#define c4x_timer_get_counter( _timer ) (volatile int)(_timer->tcounter)
 
#define c4x_timer_set_counter( _timer, _value ) \
  do { \
     (volatile int)(_timer->tcounter) = _value; \
  } while (0);
 
#define c4x_timer_get_period( _timer ) (volatile int)(_timer->tperiod)
 
#define c4x_timer_set_period( _timer, _value ) \
  do { \
     (volatile int)(_timer->tperiod) = _value; \
  } while (0);
 
/*
 *  IO Flags
 *
 *  NOTE: iof on c3x, iiof on c4x
 */
 
#ifdef _TMS320C40
 
#else
 
static inline unsigned32 c3x_get_iof( void )
{
  register unsigned32 iof_value;
 
  __asm__ volatile ("ldi iof, %0" : "=r" (iof_value));
  return iof_value;
}
 
static inline void c3x_set_iof( unsigned32 value )
{
  __asm__ volatile ("ldi  %0,iof" : : "g" (value) : "iof", "cc");
}
 
#endif
 
 
#endif
/* end if include file */

Line No.	Rev	Author	Line
1	1026	ivang	`/*`
2			`* C4X IO Information`
3			`*`
4			`* c4xio.h,v 1.2 2000/03/01 18:08:53 joel Exp`
5			`*/`
6
7			`#ifndef __C4XIO_h`
8			`#define __C4XIO_h`
9
10			`/*`
11			`* Address defines`
12			`*/`
13
14			`#ifdef _TMS320C40`
15			`#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)`
16			`#else`
17			`#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)`
18			`#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)`
19			`#endif`
20
21			`/* XXX how portable */`
22
23			`/* C32 Internal Control Registers */`
24			`#define C4X_STRB0_REG 0x808064`
25			`#define C4X_STRB1_REG 0x808068`
26			`#define C4X_IOSTRB_REG 0x808060`
27
28			`/* C32 Internal RAM Locations */`
29			`/* XXX how long */`
30			`#define C4X_RAM_BLK_0 0x87fe00`
31			`#define C4X_RAM_BLK_1 0x87ff00`
32
33			`/*`
34			`* Data Structures to Overlay the Peripherals on the CPU`
35			`*/`
36
37			`struct c4x_timer {`
38			`volatile int tcontrol;`
39			`volatile int r1[3];`
40			`volatile int tcounter;`
41			`volatile int r2[3];`
42			`volatile int tperiod;`
43			`};`
44
45
46
47
48			`/*`
49			`* Timer Support Routines`
50			`*`
51			`* The following section of C4x timer code is based on C40 specific`
52			`* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The`
53			`* only C3x/C4x difference spotted was the address of the timer.`
54			`* The names have been changed to be more RTEMS like.`
55			`*/`
56
57			`#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)`
58
59			`#define c4x_timer_set_control( _timer, _value ) \`
60			`do { \`
61			`(volatile int)(_timer->tcontrol) = _value; \`
62			`} while (0);`
63
64			`#define c4x_timer_start( _timer ) \`
65			`c4x_timer_set_control(_timer, 0x02c1 )`
66
67			`#define c4x_timer_stop( _timer ) _timer->tcontrol = 0`
68
69			`#define c4x_timer_get_counter( _timer ) (volatile int)(_timer->tcounter)`
70
71			`#define c4x_timer_set_counter( _timer, _value ) \`
72			`do { \`
73			`(volatile int)(_timer->tcounter) = _value; \`
74			`} while (0);`
75
76			`#define c4x_timer_get_period( _timer ) (volatile int)(_timer->tperiod)`
77
78			`#define c4x_timer_set_period( _timer, _value ) \`
79			`do { \`
80			`(volatile int)(_timer->tperiod) = _value; \`
81			`} while (0);`
82
83			`/*`
84			`* IO Flags`
85			`*`
86			`* NOTE: iof on c3x, iiof on c4x`
87			`*/`
88
89			`#ifdef _TMS320C40`
90
91			`#else`
92
93			`static inline unsigned32 c3x_get_iof( void )`
94			`{`
95			`register unsigned32 iof_value;`
96
97			`__asm__ volatile ("ldi iof, %0" : "=r" (iof_value));`
98			`return iof_value;`
99			`}`
100
101			`static inline void c3x_set_iof( unsigned32 value )`
102			`{`
103			`__asm__ volatile ("ldi %0,iof" : : "g" (value) : "iof", "cc");`
104			`}`
105
106			`#endif`
107
108
109			`#endif`
110			`/* end if include file */`

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[/] [or1k/] [trunk/] [rtems-20020807/] [cpukit/] [score/] [cpu/] [c4x/] [c4xio.h] - Blame information for rev 1779