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1026 |
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/*
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* Thread Handler
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*
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* threaddispatch.c,v 1.5 2002/05/15 15:14:58 joel Exp
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*/
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#include <rtems/system.h>
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#include <rtems/score/apiext.h>
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#include <rtems/score/context.h>
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#include <rtems/score/interr.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/object.h>
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#include <rtems/score/priority.h>
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#include <rtems/score/states.h>
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#include <rtems/score/sysstate.h>
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#include <rtems/score/thread.h>
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#include <rtems/score/threadq.h>
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#include <rtems/score/userext.h>
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#include <rtems/score/wkspace.h>
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/*PAGE
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*
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* _Thread_Dispatch
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*
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* This kernel routine determines if a dispatch is needed, and if so
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* dispatches to the heir thread. Once the heir is running an attempt
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* is made to dispatch any ASRs.
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*
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* ALTERNATE ENTRY POINTS:
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* void _Thread_Enable_dispatch();
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* INTERRUPT LATENCY:
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* dispatch thread
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* no dispatch thread
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*/
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#if ( CPU_INLINE_ENABLE_DISPATCH == FALSE )
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void _Thread_Enable_dispatch( void )
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{
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if ( --_Thread_Dispatch_disable_level )
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return;
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_Thread_Dispatch();
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}
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#endif
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void _Thread_Dispatch( void )
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{
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Thread_Control *executing;
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Thread_Control *heir;
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ISR_Level level;
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executing = _Thread_Executing;
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_ISR_Disable( level );
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while ( _Context_Switch_necessary == TRUE ) {
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heir = _Thread_Heir;
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_Thread_Dispatch_disable_level = 1;
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_Context_Switch_necessary = FALSE;
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_Thread_Executing = heir;
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executing->rtems_ada_self = rtems_ada_self;
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rtems_ada_self = heir->rtems_ada_self;
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_ISR_Enable( level );
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heir->ticks_executed++;
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/*
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* Switch libc's task specific data.
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*/
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if ( _Thread_libc_reent ) {
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executing->libc_reent = *_Thread_libc_reent;
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*_Thread_libc_reent = heir->libc_reent;
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}
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_User_extensions_Thread_switch( executing, heir );
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if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
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heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
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/*
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* If the CPU has hardware floating point, then we must address saving
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* and restoring it as part of the context switch.
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*
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* The second conditional compilation section selects the algorithm used
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* to context switch between floating point tasks. The deferred algorithm
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* can be significantly better in a system with few floating point tasks
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* because it reduces the total number of save and restore FP context
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* operations. However, this algorithm can not be used on all CPUs due
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* to unpredictable use of FP registers by some compilers for integer
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* operations.
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*/
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#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
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#if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE )
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if ( executing->fp_context != NULL )
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_Context_Save_fp( &executing->fp_context );
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#endif
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#endif
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_Context_Switch( &executing->Registers, &heir->Registers );
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#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
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#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
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if ( (executing->fp_context != NULL) && !_Thread_Is_allocated_fp( executing ) ) {
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if ( _Thread_Allocated_fp != NULL )
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_Context_Save_fp( &_Thread_Allocated_fp->fp_context );
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_Context_Restore_fp( &executing->fp_context );
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_Thread_Allocated_fp = executing;
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}
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#else
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if ( executing->fp_context != NULL )
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_Context_Restore_fp( &executing->fp_context );
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#endif
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#endif
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executing = _Thread_Executing;
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_ISR_Disable( level );
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}
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_Thread_Dispatch_disable_level = 0;
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_ISR_Enable( level );
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if ( _Thread_Do_post_task_switch_extension ||
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executing->do_post_task_switch_extension ) {
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executing->do_post_task_switch_extension = FALSE;
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_API_extensions_Run_postswitch();
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}
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}
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