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@c
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@c  COPYRIGHT (c) 1988-2002.
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@c  On-Line Applications Research Corporation (OAR).
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@c  All rights reserved.
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@c
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@c  callconv.t,v 1.6 2002/01/17 21:47:46 joel Exp
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@c
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@chapter Calling Conventions
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@section Introduction
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Each high-level language compiler generates
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subroutine entry and exit code based upon a set of rules known
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as the compiler's calling convention.   These rules address the
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following issues:
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@itemize @bullet
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@item register preservation and usage
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@item parameter passing
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@item call and return mechanism
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@end itemize
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A compiler's calling convention is of importance when
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interfacing to subroutines written in another language either
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assembly or high-level.  Even when the high-level language and
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target processor are the same, different compilers may use
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different calling conventions.  As a result, calling conventions
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are both processor and compiler dependent.
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This chapter describes the calling conventions used
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by the GNU C and standard HP-UX compilers for the PA-RISC
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architecture.
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@section Processor Background
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The PA-RISC architecture supports a simple yet
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effective call and return mechanism for subroutine calls where
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the caller and callee are both in the same address space.  The
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compiler will not automatically generate subroutine calls which
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cross address spaces.  A subroutine is invoked via the branch
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and link (bl) or the branch and link register (blr).  These
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instructions save the return address in a caller specified
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register.  By convention, the return address is saved in r2.
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The callee is responsible for maintaining the return address so
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it can return to the correct address.  The branch vectored (bv)
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instruction is used to branch to the return address and thus
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return from the subroutine to the caller.  It is is important to
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note that the PA-RISC subroutine call and return mechanism does
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not automatically save or restore any registers.  It is the
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responsibility of the high-level language compiler to define the
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register preservation and usage convention.
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@section Calling Mechanism
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All RTEMS directives are invoked as standard
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subroutines via a bl or a blr instruction with the return address
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assumed to be in r2 and return to the user application via the
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bv instruction.
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@section Register Usage
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As discussed above, the bl and blr instructions do
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not automatically save any registers.  RTEMS uses the registers
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r1, r19 - r26, and r31 as scratch registers.  The PA-RISC
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calling convention specifies that the first four (4) arguments
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to subroutines are passed in registers r23 - r26.  After the
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arguments have been used, the contents of these registers may be
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altered.  Register r31 is the millicode scratch register.
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Millicode is the set of routines which support high-level
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languages on the PA-RISC by providing routines which are either
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too complex or too long for the compiler to generate inline code
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when these operations are needed.  For example, indirect calls
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utilize a millicode routine.  The scratch registers are not
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preserved by RTEMS directives therefore, the contents of these
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registers should not be assumed upon return from any RTEMS
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directive.
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Surprisingly, when using the GNU C compiler at least
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integer multiplies are performed using the floating point
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registers.  This is an important optimization because the
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PA-RISC does not have otherwise have hardware for multiplies.
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This has important ramifications in regards to the PA-RISC port
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of RTEMS.  On most processors, the floating point unit is
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ignored if the code only performs integer operations.  This
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makes it easy for the application developer to predict whether
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or not any particular task will require floating point
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operations.  This property is taken advantage of by RTEMS on
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other architectures to minimize the number of times the floating
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point context is saved and restored.  However, on the PA-RISC
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architecture, every task is implicitly a floating point task.
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Additionally the state of the floating point unit must be saved
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and restored as part of the interrupt processing because for all
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practical purposes it is impossible to avoid the use of the
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floating point registers.  It is unknown if the HP-UX C compiler
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shares this property.
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@itemize @code{ }
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@item @b{NOTE}: Later versions of the GNU C has a PA-RISC specific
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option to disable use of the floating point registers.  RTEMS
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currently assumes that this option is not turned on.  If the use
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of this option sets a built-in define, then it should be
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possible to modify the PA-RISC specific code such that all tasks
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are considered floating point only when this option is not used.
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@end itemize
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@section Parameter Passing
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RTEMS assumes that the first four (4) arguments are
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placed in the appropriate registers (r26, r25, r24, and r23)
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and, if needed, additional are placed on the current stack
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before the directive is invoked via the bl or blr instruction.
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The first argument is placed in r26, the second is placed in
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r25, and so forth.  The following pseudo-code illustrates the
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typical sequence used to call a RTEMS directive with three (3)
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arguments:
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@example
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set r24 to the third argument
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set r25 to the second argument
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set r26 to the first argument
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invoke directive
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@end example
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The stack on the PA-RISC grows upward -- i.e.
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"pushing" onto the stack results in the address in the stack
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pointer becoming numerically larger.  By convention, r27 is used
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as the stack pointer.  The standard stack frame consists of a
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minimum of sixty-four (64) bytes and is the responsibility of
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the callee to maintain.
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@section User-Provided Routines
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All user-provided routines invoked by RTEMS, such as
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user extensions, device drivers, and MPCI routines, must also
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adhere to these calling conventions.
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