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[/] [or1k/] [trunk/] [uclinux/] [uC-libc/] [include/] [asm/] [m68en302.h] - Blame information for rev 1778

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#ifndef _m68en302_h_
#define _m68en302_h_
 
 
 
#ifndef _m68302_h_
#include <asm/m68302.h>
#endif
 
 
 
//#define MOBARV        0xFFE000
#define MOBARV  0xF80000
#define MOBARREG 0xEE
 
#define IER     MOBARV+2                /* INTERRUPT EXTENSION REGISTER */
 
 
 
#define ECNTRL0         MOBARV+0x800
#define EDMA0           MOBARV+0x802
#define EMRBRL0         MOBARV+0x804
#define INTR_VECT0  MOBARV+0x806
#define INTR_EVENT0 MOBARV+0x808
#define INTR_MASK0      MOBARV+0x80A
#define ECNFIG0         MOBARV+0x80C
#define ETHER_TEST0     MOBARV+0x80E
#define AR_CNTRL0       MOBARV+0x810
#define CET0            MOBARV+0xA00
#define EBD0            MOBARV+0xC00
 
 
#define ECNTRL_GTS 0x04
#define ECNTRL_ETHER_EN 0x02
#define ECNTRL_RESET 0x01
 
struct _68EN302_ECNTRL
{
        unsigned short MBZ:13;          /* must be zero */
        unsigned short GTS:1;           /* graceful transmit stop */
        unsigned short ETHER_EN:1;      /* ethernet enable */
        unsigned short RESET:1;         /* ethernet controller reset */
 
};
 
 
struct _68EN302_EDMA
{
        unsigned short BDERR:7;         /* Buffer descriptor error number */
        unsigned short MBZ:1;           /* must be zero */
        unsigned short BDSIZE:2;        /* buffer descritor size */
        unsigned short TSRLY:1;         /* transmit start early */
        unsigned short WMRK:2;          /* FIFO water mark */
        unsigned short BLIM:3;          /* burst limit     */
};
 
 
 
 
 
 
/* ethernet test regsiter bits */
#define ETHR_TWS        0x0001
#define ETHR_RWS        0x0002
#define ETHR_DRTY       0x0004
#define ETHR_COLL       0x0008
#define ETHR_SLOT       0x0010
#define ETHR_TRND       0x0020
#define ETHR_TBO        0x0040
#define ETHR_BGT        0x0080
 
 
 
/* address control register bits */
 
#define ETHR_HASH_EN    0x8000
#define ETHR_INDEX_EN   0x4000
#define ETHR_MULT               0x3000
#define ETHR_PA_REJ             0x0800
#define ETHR_PROM               0x0400
 
 
struct _68EN302_AR_CNTRL
{
        unsigned short HASH_EN:1;
        unsigned short INDEX_EN:1;
        unsigned short MULT:2;
        unsigned short PA_REJ:1;
        unsigned short PROM:1;
        unsigned short MBZ:10;
};
 
 
struct  _68EN302_ETHR_IVEC
{
        unsigned short MBZ:7;
        unsigned short VG:1;
        unsigned short INV:8;
};
 
union _68EN302_ETHR_RXBD_FLAGS
{
        unsigned short w;
        struct
        {
                unsigned short E:1,RO:1,W:1,I:1,L:1,F:1, :1, M:1, :2, LG:1,NO:1,SH:1,CR:1,OV:1,CL:1;
        } s;
};
 
struct _68EN302_ETHR_RXBD
{
        union _68EN302_ETHR_RXBD_FLAGS flags;
        unsigned short length;
        union
        {
                unsigned long   l;
                struct
                {
                        unsigned  long Reason:2;
                        unsigned  long ARIndex:6;
                        unsigned  long Pointer:24;
                } s;
        } address;
};
 
 
union _68EN302_ETHR_TXBD_FLAGS
{
        unsigned short w;
        struct
        {
                unsigned short R:1,TO:1,W:1,I:1,L:1,TC:1,
                                           DEF:1, HB:1, LC:1;
                unsigned short RL:1,
                                           xRC:4,
                                                UN:1, CSL:1;
        } s;
};
 
 
 
struct _68EN302_ETHR_TXBD
{
        union _68EN302_ETHR_TXBD_FLAGS flags;
        unsigned short length;
        unsigned long  address;
};
 
 
union  _68EN302_ETHR_BD
{
        struct  _68EN302_ETHR_TXBD tx;
        struct  _68EN302_ETHR_RXBD rx;
};
 
 
struct _68EN302_ETHR
{
        struct _68EN302_ECNTRL          ECNTRL;
        struct _68EN302_EDMA            EDMA;
        unsigned short                          EMRBRL;
        struct  _68EN302_ETHR_IVEC      INTR_VEC;
 
/* interrupt masks */
        unsigned short                          INTR_EVENT;
        unsigned short                          INTR_MASK;
#define ETHR_RXB        0x0001
#define ETHR_TXB        0x0002 
#define ETHR_BSY        0x0004
#define ETHR_RFINT      0x0008
#define ETHR_TFINT      0x0010
#define ETHR_EBERR      0x0020
#define ETHR_BOD        0x0040
#define ETHR_GRA        0x0080
#define ETHR_BABT       0x0100
#define ETHR_BABR       0x0200
#define ETHR_HBERR      0x0400
 
 
/* ethernet configuration refitser bits */
        unsigned short                          ECNFIG;
#define ETHR_LOOP 0x0001
#define ETHR_FDEN 0x0002
#define ETHR_HDC  0x0004
#define ETHR_RDT  0x0008
 
        unsigned short                          ETHER_TEST;
        struct _68EN302_AR_CNTRL        AR_CNTRL;
};
 
#define _68EN302_MAX_CET 64
struct _68EN302_ETHR_BLOCK
{
        struct  _68EN302_ETHR           info;
        unsigned char                           dummy[0x9ff+1-0x812];
        unsigned char                           CET[_68EN302_MAX_CET][8];
        union  _68EN302_ETHR_BD         BD[128];
};
 
 
 
 
#endif

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[/] [or1k/] [trunk/] [uclinux/] [uC-libc/] [include/] [asm/] [m68en302.h] - Blame information for rev 1778

Line No.	Rev	Author	Line
1	199	simons	`#ifndef _m68en302_h_`
2			`#define _m68en302_h_`
3
4
5
6			`#ifndef _m68302_h_`
7			`#include <asm/m68302.h>`
8			`#endif`
9
10
11
12			`//#define MOBARV 0xFFE000`
13			`#define MOBARV 0xF80000`
14			`#define MOBARREG 0xEE`
15
16			`#define IER MOBARV+2 /* INTERRUPT EXTENSION REGISTER */`
17
18
19
20			`#define ECNTRL0 MOBARV+0x800`
21			`#define EDMA0 MOBARV+0x802`
22			`#define EMRBRL0 MOBARV+0x804`
23			`#define INTR_VECT0 MOBARV+0x806`
24			`#define INTR_EVENT0 MOBARV+0x808`
25			`#define INTR_MASK0 MOBARV+0x80A`
26			`#define ECNFIG0 MOBARV+0x80C`
27			`#define ETHER_TEST0 MOBARV+0x80E`
28			`#define AR_CNTRL0 MOBARV+0x810`
29			`#define CET0 MOBARV+0xA00`
30			`#define EBD0 MOBARV+0xC00`
31
32
33			`#define ECNTRL_GTS 0x04`
34			`#define ECNTRL_ETHER_EN 0x02`
35			`#define ECNTRL_RESET 0x01`
36
37			`struct _68EN302_ECNTRL`
38			`{`
39			`unsigned short MBZ:13; /* must be zero */`
40			`unsigned short GTS:1; /* graceful transmit stop */`
41			`unsigned short ETHER_EN:1; /* ethernet enable */`
42			`unsigned short RESET:1; /* ethernet controller reset */`
43
44			`};`
45
46
47			`struct _68EN302_EDMA`
48			`{`
49			`unsigned short BDERR:7; /* Buffer descriptor error number */`
50			`unsigned short MBZ:1; /* must be zero */`
51			`unsigned short BDSIZE:2; /* buffer descritor size */`
52			`unsigned short TSRLY:1; /* transmit start early */`
53			`unsigned short WMRK:2; /* FIFO water mark */`
54			`unsigned short BLIM:3; /* burst limit */`
55			`};`
56
57
58
59
60
61
62			`/* ethernet test regsiter bits */`
63			`#define ETHR_TWS 0x0001`
64			`#define ETHR_RWS 0x0002`
65			`#define ETHR_DRTY 0x0004`
66			`#define ETHR_COLL 0x0008`
67			`#define ETHR_SLOT 0x0010`
68			`#define ETHR_TRND 0x0020`
69			`#define ETHR_TBO 0x0040`
70			`#define ETHR_BGT 0x0080`
71
72
73
74			`/* address control register bits */`
75
76			`#define ETHR_HASH_EN 0x8000`
77			`#define ETHR_INDEX_EN 0x4000`
78			`#define ETHR_MULT 0x3000`
79			`#define ETHR_PA_REJ 0x0800`
80			`#define ETHR_PROM 0x0400`
81
82
83			`struct _68EN302_AR_CNTRL`
84			`{`
85			`unsigned short HASH_EN:1;`
86			`unsigned short INDEX_EN:1;`
87			`unsigned short MULT:2;`
88			`unsigned short PA_REJ:1;`
89			`unsigned short PROM:1;`
90			`unsigned short MBZ:10;`
91			`};`
92
93
94			`struct _68EN302_ETHR_IVEC`
95			`{`
96			`unsigned short MBZ:7;`
97			`unsigned short VG:1;`
98			`unsigned short INV:8;`
99			`};`
100
101			`union _68EN302_ETHR_RXBD_FLAGS`
102			`{`
103			`unsigned short w;`
104			`struct`
105			`{`
106			`unsigned short E:1,RO:1,W:1,I:1,L:1,F:1, :1, M:1, :2, LG:1,NO:1,SH:1,CR:1,OV:1,CL:1;`
107			`} s;`
108			`};`
109
110			`struct _68EN302_ETHR_RXBD`
111			`{`
112			`union _68EN302_ETHR_RXBD_FLAGS flags;`
113			`unsigned short length;`
114			`union`
115			`{`
116			`unsigned long l;`
117			`struct`
118			`{`
119			`unsigned long Reason:2;`
120			`unsigned long ARIndex:6;`
121			`unsigned long Pointer:24;`
122			`} s;`
123			`} address;`
124			`};`
125
126
127			`union _68EN302_ETHR_TXBD_FLAGS`
128			`{`
129			`unsigned short w;`
130			`struct`
131			`{`
132			`unsigned short R:1,TO:1,W:1,I:1,L:1,TC:1,`
133			`DEF:1, HB:1, LC:1;`
134			`unsigned short RL:1,`
135			`xRC:4,`
136			`UN:1, CSL:1;`
137			`} s;`
138			`};`
139
140
141
142			`struct _68EN302_ETHR_TXBD`
143			`{`
144			`union _68EN302_ETHR_TXBD_FLAGS flags;`
145			`unsigned short length;`
146			`unsigned long address;`
147			`};`
148
149
150			`union _68EN302_ETHR_BD`
151			`{`
152			`struct _68EN302_ETHR_TXBD tx;`
153			`struct _68EN302_ETHR_RXBD rx;`
154			`};`
155
156
157			`struct _68EN302_ETHR`
158			`{`
159			`struct _68EN302_ECNTRL ECNTRL;`
160			`struct _68EN302_EDMA EDMA;`
161			`unsigned short EMRBRL;`
162			`struct _68EN302_ETHR_IVEC INTR_VEC;`
163
164			`/* interrupt masks */`
165			`unsigned short INTR_EVENT;`
166			`unsigned short INTR_MASK;`
167			`#define ETHR_RXB 0x0001`
168			`#define ETHR_TXB 0x0002`
169			`#define ETHR_BSY 0x0004`
170			`#define ETHR_RFINT 0x0008`
171			`#define ETHR_TFINT 0x0010`
172			`#define ETHR_EBERR 0x0020`
173			`#define ETHR_BOD 0x0040`
174			`#define ETHR_GRA 0x0080`
175			`#define ETHR_BABT 0x0100`
176			`#define ETHR_BABR 0x0200`
177			`#define ETHR_HBERR 0x0400`
178
179
180			`/* ethernet configuration refitser bits */`
181			`unsigned short ECNFIG;`
182			`#define ETHR_LOOP 0x0001`
183			`#define ETHR_FDEN 0x0002`
184			`#define ETHR_HDC 0x0004`
185			`#define ETHR_RDT 0x0008`
186
187			`unsigned short ETHER_TEST;`
188			`struct _68EN302_AR_CNTRL AR_CNTRL;`
189			`};`
190
191			`#define _68EN302_MAX_CET 64`
192			`struct _68EN302_ETHR_BLOCK`
193			`{`
194			`struct _68EN302_ETHR info;`
195			`unsigned char dummy[0x9ff+1-0x812];`
196			`unsigned char CET[_68EN302_MAX_CET][8];`
197			`union _68EN302_ETHR_BD BD[128];`
198			`};`
199
200
201
202
203			`#endif`