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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [armnommu/] [lib/] [backtrace.S] - Blame information for rev 1765

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/*
 * linux/arch/arm/lib/backtrace.S
 *
 * Copyright (C) 1995, 1996 Russell King
 */
 
#include 
                .text
 
@ fp is 0 or stack frame
 
#define frame   r4
#define next    r5
#define save    r6
#define mask    r7
#define offset  r8
 
                .global ___backtrace,__backtrace
__backtrace:
___backtrace:
#ifdef __arm6__
                mrs     r1, cpsr
#else
                mov     r1, pc
                and     r1, r1, #0xfc000003
#endif
                mov     r0, fp
 
                .global _c_backtrace,c_backtrace
c_backtrace:
_c_backtrace:   stmfd   sp!, {r4 - r8, lr}      @ Save an extra register so we have a location...
                tst     r1, #0x10               @ 26 or 32-bit?
                moveq   mask, #0xfc000003
                movne   mask, #0
                tst     mask, r0
                movne   r0, #0
                movs    frame, r0
Lbadbacktrace:  moveq   r0, #-2
                LOADREGS(eqfd, sp!, {r4 - r8, pc})
 
Lst:            stmfd   sp!, {pc}                       @ calculate offset of PC in STMIA instruction
                ldr     r0, [sp], #4
                adr     r1, Lst - 4
                sub     offset, r0, r1
 
Lloop:          tst     frame, mask                     @ Check for address exceptions...
                bne     Lbadbacktrace
 
                ldmda   frame, {r0, r1, r2, r3}         @ fp, sp, lr, pc
                mov     next, r0
 
                sub     save, r3, offset                @ Correct PC for prefetching
                bic     save, save, mask
                adr     r0, Lfe
                mov     r1, save
                bic     r2, r2, mask
                bl      printk
 
                sub     r0, frame, #16
                ldr     r1, [save, #4]
                mov     r3, r1, lsr #10
                ldr     r2, Ldsi+4
                teq     r3, r2                  @ Check for stmia sp!, {args}
                addeq   save, save, #4          @ next instruction
                bleq    Ldumpstm
 
                ldr     r1, [save, #4]          @ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction
                mov     r3, r1, lsr #10
                ldr     r2, Ldsi
                teq     r3, r2
                bleq    Ldumpstm
 
                teq     frame, next
                movne   frame, next
                teqne   frame, #0
                bne     Lloop
                LOADREGS(fd, sp!, {r4 - r8, pc})
 
 
#define instr r4
#define reg   r5
#define stack r6
 
Ldumpstm:       stmfd   sp!, {instr, reg, stack, lr}
                mov     stack, r0
                mov     instr, r1
                mov     reg, #9
 
1:              mov     r3, #1
                tst     instr, r3, lsl reg
                beq     2f
                ldr     r2, [stack], #-4
                mov     r1, reg
                adr     r0, Lfp
                bl      printk
2:              subs    reg, reg, #1
                bpl     1b
 
                mov     r0, stack
                LOADREGS(fd, sp!, {instr, reg, stack, pc})
 
Lfe:            .ascii  "Function entered at [<%p>] from [<%p>]\n"
                .byte 0
Lfp:            .ascii  "  r%d = %p\n"
                .byte 0
                .align
Ldsi:           .word   0x00e92dd8 >> 2
                .word   0x00e92d00 >> 2

Line No.	Rev	Author	Line
1	199	simons	`/*`
2			`* linux/arch/arm/lib/backtrace.S`
3			`*`
4			`* Copyright (C) 1995, 1996 Russell King`
5			`*/`
6
7			`#include`
8			`.text`
9
10			`@ fp is 0 or stack frame`
11
12			`#define frame r4`
13			`#define next r5`
14			`#define save r6`
15			`#define mask r7`
16			`#define offset r8`
17
18			`.global ___backtrace,__backtrace`
19			`__backtrace:`
20			`___backtrace:`
21			`#ifdef __arm6__`
22			`mrs r1, cpsr`
23			`#else`
24			`mov r1, pc`
25			`and r1, r1, #0xfc000003`
26			`#endif`
27			`mov r0, fp`
28
29			`.global _c_backtrace,c_backtrace`
30			`c_backtrace:`
31			`_c_backtrace: stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location...`
32			`tst r1, #0x10 @ 26 or 32-bit?`
33			`moveq mask, #0xfc000003`
34			`movne mask, #0`
35			`tst mask, r0`
36			`movne r0, #0`
37			`movs frame, r0`
38			`Lbadbacktrace: moveq r0, #-2`
39			`LOADREGS(eqfd, sp!, {r4 - r8, pc})`
40
41			`Lst: stmfd sp!, {pc} @ calculate offset of PC in STMIA instruction`
42			`ldr r0, [sp], #4`
43			`adr r1, Lst - 4`
44			`sub offset, r0, r1`
45
46			`Lloop: tst frame, mask @ Check for address exceptions...`
47			`bne Lbadbacktrace`
48
49			`ldmda frame, {r0, r1, r2, r3} @ fp, sp, lr, pc`
50			`mov next, r0`
51
52			`sub save, r3, offset @ Correct PC for prefetching`
53			`bic save, save, mask`
54			`adr r0, Lfe`
55			`mov r1, save`
56			`bic r2, r2, mask`
57			`bl printk`
58
59			`sub r0, frame, #16`
60			`ldr r1, [save, #4]`
61			`mov r3, r1, lsr #10`
62			`ldr r2, Ldsi+4`
63			`teq r3, r2 @ Check for stmia sp!, {args}`
64			`addeq save, save, #4 @ next instruction`
65			`bleq Ldumpstm`
66
67			`ldr r1, [save, #4] @ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction`
68			`mov r3, r1, lsr #10`
69			`ldr r2, Ldsi`
70			`teq r3, r2`
71			`bleq Ldumpstm`
72
73			`teq frame, next`
74			`movne frame, next`
75			`teqne frame, #0`
76			`bne Lloop`
77			`LOADREGS(fd, sp!, {r4 - r8, pc})`
78
79
80			`#define instr r4`
81			`#define reg r5`
82			`#define stack r6`
83
84			`Ldumpstm: stmfd sp!, {instr, reg, stack, lr}`
85			`mov stack, r0`
86			`mov instr, r1`
87			`mov reg, #9`
88
89			`1: mov r3, #1`
90			`tst instr, r3, lsl reg`
91			`beq 2f`
92			`ldr r2, [stack], #-4`
93			`mov r1, reg`
94			`adr r0, Lfp`
95			`bl printk`
96			`2: subs reg, reg, #1`
97			`bpl 1b`
98
99			`mov r0, stack`
100			`LOADREGS(fd, sp!, {instr, reg, stack, pc})`
101
102			`Lfe: .ascii "Function entered at [<%p>] from [<%p>]\n"`
103			`.byte 0`
104			`Lfp: .ascii " r%d = %p\n"`
105			`.byte 0`
106			`.align`
107			`Ldsi: .word 0x00e92dd8 >> 2`
108			`.word 0x00e92d00 >> 2`

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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [armnommu/] [lib/] [backtrace.S] - Blame information for rev 1765