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/*
 * linux/arch/arm/lib/ll_char_wr.S
 *
 * Copyright (C) 1995, 1996 Russell King.
 *
 * Speedups & 1bpp code (C) 1996 Philip Blundel & Russell King.
 *
 * 10-04-96     RMK     Various cleanups & reduced register usage.
 */
 
@ Regs: [] = corruptable
@       {} = used
@       () = dont use
 
#include 
                .text
 
                .global ll_write_char
 
#define BOLD            0x01
#define ITALIC          0x02
#define UNDERLINE       0x04
#define FLASH           0x08
#define INVERSE         0x10
 
LC0:            .word   bytes_per_char_h
                .word   video_size_row
                .word   cmap_80
                .word   con_charconvtable
 
ll_write_char:  stmfd   sp!, {r4 - r7, lr}
@
@ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)
@
                eor     ip, r1, #UNDERLINE << 24
/*
 * calculate colours
 */
                tst     r1, #INVERSE << 24
                moveq   r2, r1, lsr #8
                moveq   r3, r1, lsr #16
                movne   r2, r1, lsr #16
                movne   r3, r1, lsr #8
                and     r3, r3, #255
                and     r2, r2, #255
/*
 * calculate offset into character table
 */
                and     r1, r1, #255
                mov     r1, r1, lsl #3
/*
 * calculate offset required for each row [maybe I should make this an argument to this fn.
 * Have to see what the register usage is like in the calling routines.
 */
                adr     r4, LC0
                ldmia   r4, {r4, r5, r6, lr}
                ldr     r4, [r4]
                ldr     r5, [r5]
/*
 * Go to resolution-dependent routine...
 */
                cmp     r4, #4
                blt     Lrow1bpp
                eor     r2, r3, r2                      @ Create eor mask to change colour from bg
                orr     r3, r3, r3, lsl #8              @ to fg.
                orr     r3, r3, r3, lsl #16
                add     r0, r0, r5, lsl #3              @ Move to bottom of character
                add     r1, r1, #7
                ldrb    r7, [r6, r1]
                tst     ip, #UNDERLINE << 24
                eoreq   r7, r7, #255
                teq     r4, #8
                beq     Lrow8bpplp
@
@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
@
                orr     r3, r3, r3, lsl #4
Lrow4bpplp:     ldr     r7, [lr, r7, lsl #2]
                mul     r7, r2, r7
                tst     r1, #7                          @ avoid using r7 directly after
                eor     ip, r3, r7
                str     ip, [r0, -r5]!
                LOADREGS(eqfd, sp!, {r4 - r7, pc})
                sub     r1, r1, #1
                ldrb    r7, [r6, r1]
                ldr     r7, [lr, r7, lsl #2]
                mul     r7, r2, r7
                tst     r1, #7                          @ avoid using r7 directly after
                eor     ip, r3, r7
                str     ip, [r0, -r5]!
                subne   r1, r1, #1
                ldrneb  r7, [r6, r1]
                bne     Lrow4bpplp
                LOADREGS(fd, sp!, {r4 - r7, pc})
 
@
@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
@
Lrow8bpplp:     mov     ip, r7, lsr #4
                ldr     ip, [lr, ip, lsl #2]
                mul     r4, r2, ip
                and     ip, r7, #15
                eor     r4, r3, r4
                ldr     ip, [lr, ip, lsl #2]
                mul     ip, r2, ip
                tst     r1, #7
                eor     ip, r3, ip
                sub     r0, r0, r5
                stmia   r0, {r4, ip}
                LOADREGS(eqfd, sp!, {r4 - r7, pc})
                sub     r1, r1, #1
                ldrb    r7, [r6, r1]
                mov     ip, r7, lsr #4
                ldr     ip, [lr, ip, lsl #2]
                mul     r4, r2, ip
                and     ip, r7, #15
                eor     r4, r3, r4
                ldr     ip, [lr, ip, lsl #2]
                mul     ip, r2, ip
                tst     r1, #7
                eor     ip, r3, ip
                sub     r0, r0, r5
                stmia   r0, {r4, ip}
                subne   r1, r1, #1
                ldrneb  r7, [r6, r1]
                bne     Lrow8bpplp
                LOADREGS(fd, sp!, {r4 - r7, pc})
 
@
@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
@
Lrow1bpp:       add     r6, r6, r1
                ldmia   r6, {r4, r7}
                tst     ip, #INVERSE << 24
                mvnne   r4, r4
                mvnne   r7, r7
                strb    r4, [r0], r5
                mov     r4, r4, lsr #8
                strb    r4, [r0], r5
                mov     r4, r4, lsr #8
                strb    r4, [r0], r5
                mov     r4, r4, lsr #8
                strb    r4, [r0], r5
                strb    r7, [r0], r5
                mov     r7, r7, lsr #8
                strb    r7, [r0], r5
                mov     r7, r7, lsr #8
                strb    r7, [r0], r5
                mov     r7, r7, lsr #8
                tst     ip, #UNDERLINE << 24
                mvneq   r7, r7
                strb    r7, [r0], r5
                LOADREGS(fd, sp!, {r4 - r7, pc})
 
                .globl  con_charconvtable
                .bss
con_charconvtable:
                .space  1024

Line No.	Rev	Author	Line
1	199	simons	`/*`
2			`* linux/arch/arm/lib/ll_char_wr.S`
3			`*`
4			`* Copyright (C) 1995, 1996 Russell King.`
5			`*`
6			`* Speedups & 1bpp code (C) 1996 Philip Blundel & Russell King.`
7			`*`
8			`* 10-04-96 RMK Various cleanups & reduced register usage.`
9			`*/`
10
11			`@ Regs: [] = corruptable`
12			`@ {} = used`
13			`@ () = dont use`
14
15			`#include`
16			`.text`
17
18			`.global ll_write_char`
19
20			`#define BOLD 0x01`
21			`#define ITALIC 0x02`
22			`#define UNDERLINE 0x04`
23			`#define FLASH 0x08`
24			`#define INVERSE 0x10`
25
26			`LC0: .word bytes_per_char_h`
27			`.word video_size_row`
28			`.word cmap_80`
29			`.word con_charconvtable`
30
31			`ll_write_char: stmfd sp!, {r4 - r7, lr}`
32			`@`
33			`@ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)`
34			`@`
35			`eor ip, r1, #UNDERLINE << 24`
36			`/*`
37			`* calculate colours`
38			`*/`
39			`tst r1, #INVERSE << 24`
40			`moveq r2, r1, lsr #8`
41			`moveq r3, r1, lsr #16`
42			`movne r2, r1, lsr #16`
43			`movne r3, r1, lsr #8`
44			`and r3, r3, #255`
45			`and r2, r2, #255`
46			`/*`
47			`* calculate offset into character table`
48			`*/`
49			`and r1, r1, #255`
50			`mov r1, r1, lsl #3`
51			`/*`
52			`* calculate offset required for each row [maybe I should make this an argument to this fn.`
53			`* Have to see what the register usage is like in the calling routines.`
54			`*/`
55			`adr r4, LC0`
56			`ldmia r4, {r4, r5, r6, lr}`
57			`ldr r4, [r4]`
58			`ldr r5, [r5]`
59			`/*`
60			`* Go to resolution-dependent routine...`
61			`*/`
62			`cmp r4, #4`
63			`blt Lrow1bpp`
64			`eor r2, r3, r2 @ Create eor mask to change colour from bg`
65			`orr r3, r3, r3, lsl #8 @ to fg.`
66			`orr r3, r3, r3, lsl #16`
67			`add r0, r0, r5, lsl #3 @ Move to bottom of character`
68			`add r1, r1, #7`
69			`ldrb r7, [r6, r1]`
70			`tst ip, #UNDERLINE << 24`
71			`eoreq r7, r7, #255`
72			`teq r4, #8`
73			`beq Lrow8bpplp`
74			`@`
75			`@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)`
76			`@`
77			`orr r3, r3, r3, lsl #4`
78			`Lrow4bpplp: ldr r7, [lr, r7, lsl #2]`
79			`mul r7, r2, r7`
80			`tst r1, #7 @ avoid using r7 directly after`
81			`eor ip, r3, r7`
82			`str ip, [r0, -r5]!`
83			`LOADREGS(eqfd, sp!, {r4 - r7, pc})`
84			`sub r1, r1, #1`
85			`ldrb r7, [r6, r1]`
86			`ldr r7, [lr, r7, lsl #2]`
87			`mul r7, r2, r7`
88			`tst r1, #7 @ avoid using r7 directly after`
89			`eor ip, r3, r7`
90			`str ip, [r0, -r5]!`
91			`subne r1, r1, #1`
92			`ldrneb r7, [r6, r1]`
93			`bne Lrow4bpplp`
94			`LOADREGS(fd, sp!, {r4 - r7, pc})`
95
96			`@`
97			`@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)`
98			`@`
99			`Lrow8bpplp: mov ip, r7, lsr #4`
100			`ldr ip, [lr, ip, lsl #2]`
101			`mul r4, r2, ip`
102			`and ip, r7, #15`
103			`eor r4, r3, r4`
104			`ldr ip, [lr, ip, lsl #2]`
105			`mul ip, r2, ip`
106			`tst r1, #7`
107			`eor ip, r3, ip`
108			`sub r0, r0, r5`
109			`stmia r0, {r4, ip}`
110			`LOADREGS(eqfd, sp!, {r4 - r7, pc})`
111			`sub r1, r1, #1`
112			`ldrb r7, [r6, r1]`
113			`mov ip, r7, lsr #4`
114			`ldr ip, [lr, ip, lsl #2]`
115			`mul r4, r2, ip`
116			`and ip, r7, #15`
117			`eor r4, r3, r4`
118			`ldr ip, [lr, ip, lsl #2]`
119			`mul ip, r2, ip`
120			`tst r1, #7`
121			`eor ip, r3, ip`
122			`sub r0, r0, r5`
123			`stmia r0, {r4, ip}`
124			`subne r1, r1, #1`
125			`ldrneb r7, [r6, r1]`
126			`bne Lrow8bpplp`
127			`LOADREGS(fd, sp!, {r4 - r7, pc})`
128
129			`@`
130			`@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)`
131			`@`
132			`Lrow1bpp: add r6, r6, r1`
133			`ldmia r6, {r4, r7}`
134			`tst ip, #INVERSE << 24`
135			`mvnne r4, r4`
136			`mvnne r7, r7`
137			`strb r4, [r0], r5`
138			`mov r4, r4, lsr #8`
139			`strb r4, [r0], r5`
140			`mov r4, r4, lsr #8`
141			`strb r4, [r0], r5`
142			`mov r4, r4, lsr #8`
143			`strb r4, [r0], r5`
144			`strb r7, [r0], r5`
145			`mov r7, r7, lsr #8`
146			`strb r7, [r0], r5`
147			`mov r7, r7, lsr #8`
148			`strb r7, [r0], r5`
149			`mov r7, r7, lsr #8`
150			`tst ip, #UNDERLINE << 24`
151			`mvneq r7, r7`
152			`strb r7, [r0], r5`
153			`LOADREGS(fd, sp!, {r4 - r7, pc})`
154
155			`.globl con_charconvtable`
156			`.bss`
157			`con_charconvtable:`
158			`.space 1024`

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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [armnommu/] [lib/] [ll_char_wr.S] - Blame information for rev 1765