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199 |
simons |
/*
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* linux/arch/m68k/kernel/traps.c
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*
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* Copyright (C) 1993, 1994 by Hamish Macdonald
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*
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* 68040 fixes by Michael Rausch
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* 68040 fixes by Martin Apel
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* 68060 fixes by Roman Hodek
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* 68060 fixes by Jesper Skov
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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/*
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* Sets up all exception vectors
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*/
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#include <linux/config.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/types.h>
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#include <linux/a.out.h>
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#include <linux/user.h>
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#include <linux/string.h>
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#include <linux/linkage.h>
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#include <asm/system.h>
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#include <asm/segment.h>
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#include <asm/traps.h>
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#include <asm/bootinfo.h>
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#include <asm/pgtable.h>
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#include <asm/machdep.h>
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/* assembler routines */
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asmlinkage void system_call(void);
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asmlinkage void buserr(void);
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asmlinkage void trap(void);
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asmlinkage void inthandler(void);
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asmlinkage void nmihandler(void);
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e_vector vectors[256] = {
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0, 0, buserr, trap, trap, trap, trap, trap,
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trap, trap, trap, trap, trap, trap, trap, trap,
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trap, trap, trap, trap, trap, trap, trap, trap,
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inthandler, inthandler, inthandler, inthandler,
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inthandler, inthandler, inthandler, inthandler,
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/* TRAP #0-15 */
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system_call, trap, trap, trap, trap, trap, trap, trap,
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trap, trap, trap, trap, trap, trap, trap, trap,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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};
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/* nmi handler for the Amiga */
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asm(".text\n"
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__ALIGN_STR "\n"
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SYMBOL_NAME_STR(nmihandler) ": rte");
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void trap_init (void)
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{
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int i;
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/* setup the exception vector table */
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__asm__ volatile ("movec %0,%/vbr" : : "r" ((void*)vectors));
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for (i = 48; i < 64; i++)
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vectors[i] = trap;
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for (i = 64; i < 256; i++)
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vectors[i] = inthandler;
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/* if running on an amiga, make the NMI interrupt do nothing */
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if (MACH_IS_AMIGA) {
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vectors[VEC_INT7] = nmihandler;
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}
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#ifdef CONFIG_FPSP_040
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if (m68k_is040or060 == 4) {
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/* set up FPSP entry points */
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asmlinkage void dz_vec(void) asm ("dz");
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asmlinkage void inex_vec(void) asm ("inex");
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asmlinkage void ovfl_vec(void) asm ("ovfl");
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asmlinkage void unfl_vec(void) asm ("unfl");
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asmlinkage void snan_vec(void) asm ("snan");
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asmlinkage void operr_vec(void) asm ("operr");
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asmlinkage void bsun_vec(void) asm ("bsun");
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asmlinkage void fline_vec(void) asm ("fline");
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asmlinkage void unsupp_vec(void) asm ("unsupp");
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vectors[VEC_FPDIVZ] = dz_vec;
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vectors[VEC_FPIR] = inex_vec;
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vectors[VEC_FPOVER] = ovfl_vec;
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vectors[VEC_FPUNDER] = unfl_vec;
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vectors[VEC_FPNAN] = snan_vec;
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vectors[VEC_FPOE] = operr_vec;
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vectors[VEC_FPBRUC] = bsun_vec;
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vectors[VEC_FPBRUC] = bsun_vec;
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vectors[VEC_LINE11] = fline_vec;
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vectors[VEC_FPUNSUP] = unsupp_vec;
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}
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#endif
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#ifdef CONFIG_IFPSP_060
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if (m68k_is040or060 == 6) {
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/* set up IFPSP entry points */
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asmlinkage void snan_vec(void) asm ("_060_fpsp_snan");
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asmlinkage void operr_vec(void) asm ("_060_fpsp_operr");
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asmlinkage void ovfl_vec(void) asm ("_060_fpsp_ovfl");
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asmlinkage void unfl_vec(void) asm ("_060_fpsp_unfl");
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asmlinkage void dz_vec(void) asm ("_060_fpsp_dz");
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asmlinkage void inex_vec(void) asm ("_060_fpsp_inex");
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asmlinkage void fline_vec(void) asm ("_060_fpsp_fline");
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asmlinkage void unsupp_vec(void) asm ("_060_fpsp_unsupp");
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asmlinkage void effadd_vec(void) asm ("_060_fpsp_effadd");
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asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
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vectors[VEC_FPNAN] = snan_vec;
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vectors[VEC_FPOE] = operr_vec;
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vectors[VEC_FPOVER] = ovfl_vec;
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vectors[VEC_FPUNDER] = unfl_vec;
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vectors[VEC_FPDIVZ] = dz_vec;
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vectors[VEC_FPIR] = inex_vec;
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vectors[VEC_LINE11] = fline_vec;
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vectors[VEC_FPUNSUP] = unsupp_vec;
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vectors[VEC_UNIMPEA] = effadd_vec;
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/* set up ISP entry points */
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vectors[VEC_UNIMPII] = unimp_vec;
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}
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#endif
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}
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void set_evector(int vecnum, void (*handler)(void))
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{
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if (vecnum >= 0 && vecnum <= 256)
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vectors[vecnum] = handler;
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}
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static inline void console_verbose(void)
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{
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extern int console_loglevel;
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console_loglevel = 15;
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mach_debug_init();
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}
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char *vec_names[] = {
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"RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
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"ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
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"PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
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"UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
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"FORMAT ERROR", "UNINITIALIZED INTERRUPT",
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"UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
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"UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
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"UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
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"UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
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"SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
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"LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
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"SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
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"TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
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"TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
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"TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15"
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};
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char *space_names[] = {
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"Space 0", "User Data", "User Program", "Space 3",
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"Space 4", "Super Data", "Super Program", "CPU"
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};
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extern void die_if_kernel(char *,struct pt_regs *,int);
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asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
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unsigned long error_code);
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| 180 |
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| 181 |
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asmlinkage void trap_c(struct frame *fp);
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static inline void access_error060 (struct frame *fp)
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{
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| 185 |
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unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
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| 187 |
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#ifdef DEBUG
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| 188 |
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printk("fslw=%#lx, fa=%#lx\n", ssw, fp->un.fmt4.effaddr);
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| 189 |
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#endif
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| 190 |
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| 191 |
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if (fslw & MMU060_BPE) {
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| 192 |
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/* branch prediction error -> clear branch cache */
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| 193 |
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__asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
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"orl #0x00400000,%/d0\n\t"
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"movec %/d0,%/cacr"
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| 196 |
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: : : "d0" );
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| 197 |
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/* return if there's no other error */
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| 198 |
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if (!(fslw & MMU060_ERR_BITS))
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return;
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| 200 |
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}
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| 202 |
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if (fslw & (MMU060_DESC_ERR | MMU060_WP)) {
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| 203 |
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unsigned long errorcode;
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unsigned long addr = fp->un.fmt4.effaddr;
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| 205 |
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errorcode = ((fslw & MMU060_WP) ? 1 : 0) |
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((fslw & MMU060_W) ? 2 : 0);
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| 207 |
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#ifdef DEBUG
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| 208 |
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printk("errorcode = %d\n", errorcode );
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| 209 |
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#endif
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| 210 |
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if (fslw & MMU060_MA)
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| 211 |
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addr = PAGE_ALIGN(addr);
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| 212 |
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do_page_fault( (struct pt_regs *)fp, addr, errorcode );
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| 213 |
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}
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| 214 |
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else {
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| 215 |
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printk( "68060 access error, fslw=%lx\n", fslw );
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| 216 |
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trap_c( fp );
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| 217 |
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}
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| 218 |
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}
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| 219 |
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| 220 |
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static unsigned long probe040 (int iswrite, int fc, unsigned long addr)
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| 221 |
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{
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| 222 |
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unsigned long mmusr;
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| 223 |
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unsigned long fs = get_fs();
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| 224 |
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| 225 |
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set_fs (fc);
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| 226 |
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| 227 |
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if (iswrite)
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| 228 |
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/* write */
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| 229 |
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asm volatile ("movel %1,%/a0\n\t"
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| 230 |
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".word 0xf548\n\t" /* ptestw (a0) */
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| 231 |
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".long 0x4e7a8805\n\t" /* movec mmusr,a0 */
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| 232 |
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"movel %/a0,%0"
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| 233 |
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: "=g" (mmusr)
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| 234 |
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: "g" (addr)
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| 235 |
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: "a0");
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| 236 |
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else
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| 237 |
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asm volatile ("movel %1,%/a0\n\t"
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| 238 |
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".word 0xf568\n\t" /* ptestr (a0) */
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| 239 |
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".long 0x4e7a8805\n\t" /* movec mmusr,a0 */
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| 240 |
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"movel %/a0,%0"
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| 241 |
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: "=g" (mmusr)
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| 242 |
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: "g" (addr)
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| 243 |
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: "a0");
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| 244 |
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| 245 |
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| 246 |
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set_fs (fs);
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| 247 |
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| 248 |
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return mmusr;
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| 249 |
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}
|
| 250 |
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| 251 |
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static void do_040writeback (unsigned short ssw,
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| 252 |
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unsigned short wbs,
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| 253 |
|
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unsigned long wba,
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| 254 |
|
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unsigned long wbd,
|
| 255 |
|
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struct frame *fp)
|
| 256 |
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{
|
| 257 |
|
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unsigned long fs = get_fs ();
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| 258 |
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unsigned long mmusr;
|
| 259 |
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unsigned long errorcode;
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| 260 |
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|
| 261 |
|
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/*
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| 262 |
|
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* No special handling for the second writeback anymore.
|
| 263 |
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* It misinterpreted the misaligned status sometimes.
|
| 264 |
|
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* This way an extra page-fault may be caused (Martin Apel).
|
| 265 |
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*/
|
| 266 |
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|
| 267 |
|
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mmusr = probe040 (1, wbs & WBTM_040, wba);
|
| 268 |
|
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errorcode = (mmusr & MMU_R_040) ? 3 : 2;
|
| 269 |
|
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if (do_page_fault ((struct pt_regs *)fp, wba, errorcode))
|
| 270 |
|
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/* just return if we can't perform the writeback */
|
| 271 |
|
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return;
|
| 272 |
|
|
|
| 273 |
|
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set_fs (wbs & WBTM_040);
|
| 274 |
|
|
switch (wbs & WBSIZ_040) {
|
| 275 |
|
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case BA_SIZE_BYTE:
|
| 276 |
|
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put_fs_byte (wbd & 0xff, (char *)wba);
|
| 277 |
|
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break;
|
| 278 |
|
|
case BA_SIZE_WORD:
|
| 279 |
|
|
put_fs_word (wbd & 0xffff, (short *)wba);
|
| 280 |
|
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break;
|
| 281 |
|
|
case BA_SIZE_LONG:
|
| 282 |
|
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put_fs_long (wbd, (int *)wba);
|
| 283 |
|
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break;
|
| 284 |
|
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}
|
| 285 |
|
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set_fs (fs);
|
| 286 |
|
|
}
|
| 287 |
|
|
|
| 288 |
|
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static inline void access_error040 (struct frame *fp)
|
| 289 |
|
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{
|
| 290 |
|
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unsigned short ssw = fp->un.fmt7.ssw;
|
| 291 |
|
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unsigned long mmusr;
|
| 292 |
|
|
|
| 293 |
|
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#ifdef DEBUG
|
| 294 |
|
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printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
|
| 295 |
|
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printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
|
| 296 |
|
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fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
|
| 297 |
|
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printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
|
| 298 |
|
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fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
|
| 299 |
|
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fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
|
| 300 |
|
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#endif
|
| 301 |
|
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|
| 302 |
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|
|
| 303 |
|
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if (ssw & ATC_040) {
|
| 304 |
|
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unsigned long addr = fp->un.fmt7.faddr;
|
| 305 |
|
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unsigned long errorcode;
|
| 306 |
|
|
|
| 307 |
|
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/*
|
| 308 |
|
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* The MMU status has to be determined AFTER the address
|
| 309 |
|
|
* has been corrected if there was a misaligned access (MA).
|
| 310 |
|
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*/
|
| 311 |
|
|
if (ssw & MA_040)
|
| 312 |
|
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addr = PAGE_ALIGN (addr);
|
| 313 |
|
|
|
| 314 |
|
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/* MMU error, get the MMUSR info for this access */
|
| 315 |
|
|
mmusr = probe040 (!(ssw & RW_040), ssw & TM_040, addr);
|
| 316 |
|
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/*
|
| 317 |
|
|
#ifdef DEBUG
|
| 318 |
|
|
printk("mmusr = %lx\n", mmusr);
|
| 319 |
|
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#endif
|
| 320 |
|
|
*/
|
| 321 |
|
|
errorcode = ((mmusr & MMU_R_040) ? 1 : 0) |
|
| 322 |
|
|
((ssw & RW_040) ? 0 : 2);
|
| 323 |
|
|
do_page_fault ((struct pt_regs *)fp, addr, errorcode);
|
| 324 |
|
|
} else {
|
| 325 |
|
|
printk ("68040 access error, ssw=%x\n", ssw);
|
| 326 |
|
|
trap_c (fp);
|
| 327 |
|
|
}
|
| 328 |
|
|
|
| 329 |
|
|
#if 0
|
| 330 |
|
|
if (fp->un.fmt7.wb1s & WBV_040)
|
| 331 |
|
|
printk("access_error040: cannot handle 1st writeback. oops.\n");
|
| 332 |
|
|
#endif
|
| 333 |
|
|
|
| 334 |
|
|
/*
|
| 335 |
|
|
* We may have to do a couple of writebacks here.
|
| 336 |
|
|
*
|
| 337 |
|
|
* MR: we can speed up the thing a little bit and let do_040writeback()
|
| 338 |
|
|
* not produce another page fault as wb2 corresponds to the address that
|
| 339 |
|
|
* caused the fault. on write faults no second fault is generated, but
|
| 340 |
|
|
* on read faults for security reasons (although per definitionem impossible)
|
| 341 |
|
|
*/
|
| 342 |
|
|
|
| 343 |
|
|
if (fp->un.fmt7.wb2s & WBV_040 && (fp->un.fmt7.wb2s &
|
| 344 |
|
|
WBTT_040) != BA_TT_MOVE16)
|
| 345 |
|
|
do_040writeback (ssw,
|
| 346 |
|
|
fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
|
| 347 |
|
|
fp->un.fmt7.wb2d, fp);
|
| 348 |
|
|
|
| 349 |
|
|
if (fp->un.fmt7.wb3s & WBV_040)
|
| 350 |
|
|
do_040writeback (ssw, fp->un.fmt7.wb3s,
|
| 351 |
|
|
fp->un.fmt7.wb3a, fp->un.fmt7.wb3d,
|
| 352 |
|
|
fp);
|
| 353 |
|
|
}
|
| 354 |
|
|
|
| 355 |
|
|
static inline void bus_error030 (struct frame *fp)
|
| 356 |
|
|
{
|
| 357 |
|
|
volatile unsigned short temp;
|
| 358 |
|
|
unsigned short mmusr;
|
| 359 |
|
|
unsigned long addr, desc, errorcode;
|
| 360 |
|
|
unsigned short ssw = fp->un.fmtb.ssw;
|
| 361 |
|
|
int user_space_fault = 1;
|
| 362 |
|
|
|
| 363 |
|
|
#if DEBUG
|
| 364 |
|
|
printk ("pid = %x ", current->pid);
|
| 365 |
|
|
printk ("SSW=%#06x ", ssw);
|
| 366 |
|
|
|
| 367 |
|
|
if (ssw & (FC | FB))
|
| 368 |
|
|
printk ("Instruction fault at %#010lx\n",
|
| 369 |
|
|
ssw & FC ?
|
| 370 |
|
|
fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
|
| 371 |
|
|
:
|
| 372 |
|
|
fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
|
| 373 |
|
|
if (ssw & DF)
|
| 374 |
|
|
printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
|
| 375 |
|
|
ssw & RW ? "read" : "write",
|
| 376 |
|
|
fp->un.fmtb.daddr,
|
| 377 |
|
|
space_names[ssw & DFC], fp->ptregs.pc);
|
| 378 |
|
|
#endif
|
| 379 |
|
|
|
| 380 |
|
|
if (fp->ptregs.sr & PS_S) {
|
| 381 |
|
|
/* kernel fault must be a data fault to user space */
|
| 382 |
|
|
if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
|
| 383 |
|
|
/* instruction fault or kernel data fault! */
|
| 384 |
|
|
if (ssw & (FC | FB))
|
| 385 |
|
|
printk ("Instruction fault at %#010lx\n",
|
| 386 |
|
|
fp->ptregs.pc);
|
| 387 |
|
|
if (ssw & DF) {
|
| 388 |
|
|
printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
|
| 389 |
|
|
ssw & RW ? "read" : "write",
|
| 390 |
|
|
fp->un.fmtb.daddr,
|
| 391 |
|
|
space_names[ssw & DFC], fp->ptregs.pc);
|
| 392 |
|
|
}
|
| 393 |
|
|
printk ("BAD KERNEL BUSERR\n");
|
| 394 |
|
|
die_if_kernel("Oops",&fp->ptregs,0);
|
| 395 |
|
|
force_sig(SIGSEGV, current);
|
| 396 |
|
|
user_space_fault = 0;
|
| 397 |
|
|
}
|
| 398 |
|
|
} else {
|
| 399 |
|
|
/* user fault */
|
| 400 |
|
|
if (!(ssw & (FC | FB)) && !(ssw & DF))
|
| 401 |
|
|
/* not an instruction fault or data fault! BAD */
|
| 402 |
|
|
panic ("USER BUSERR w/o instruction or data fault");
|
| 403 |
|
|
user_space_fault = 1;
|
| 404 |
|
|
#if DEBUG
|
| 405 |
|
|
printk("User space bus-error\n");
|
| 406 |
|
|
#endif
|
| 407 |
|
|
}
|
| 408 |
|
|
|
| 409 |
|
|
/* ++andreas: If a data fault and an instruction fault happen
|
| 410 |
|
|
at the same time map in both pages. */
|
| 411 |
|
|
|
| 412 |
|
|
/* First handle the data fault, if any. */
|
| 413 |
|
|
if (ssw & DF)
|
| 414 |
|
|
{
|
| 415 |
|
|
addr = fp->un.fmtb.daddr;
|
| 416 |
|
|
|
| 417 |
|
|
if (user_space_fault) {
|
| 418 |
|
|
asm volatile ("ptestr #1,%2@,#7,%0\n\t"
|
| 419 |
|
|
"pmove %/psr,%1@"
|
| 420 |
|
|
: "=a&" (desc)
|
| 421 |
|
|
: "a" (&temp), "a" (addr));
|
| 422 |
|
|
mmusr = temp;
|
| 423 |
|
|
} else
|
| 424 |
|
|
mmusr = MMU_I;
|
| 425 |
|
|
|
| 426 |
|
|
#if DEBUG
|
| 427 |
|
|
printk ("mmusr is %#x for addr %#lx in task %p\n",
|
| 428 |
|
|
mmusr, addr, current);
|
| 429 |
|
|
printk ("descriptor address is %#lx, contents %#lx\n",
|
| 430 |
|
|
mm_ptov(desc), *(unsigned long *)mm_ptov(desc));
|
| 431 |
|
|
#endif
|
| 432 |
|
|
|
| 433 |
|
|
errorcode = (mmusr & MMU_I) ? 0 : 1;
|
| 434 |
|
|
/* if (!(ssw & RW)) updated to 1.2.13pl6 */
|
| 435 |
|
|
if (!(ssw & RW) || ssw & RM)
|
| 436 |
|
|
errorcode |= 2;
|
| 437 |
|
|
|
| 438 |
|
|
if (mmusr & MMU_I)
|
| 439 |
|
|
do_page_fault ((struct pt_regs *)fp, addr, errorcode);
|
| 440 |
|
|
|
| 441 |
|
|
/* else if ((mmusr & MMU_WP) && !(ssw & RW)) */
|
| 442 |
|
|
|
| 443 |
|
|
else if ((mmusr & MMU_WP) && (!(ssw & RW) || ssw & RM))
|
| 444 |
|
|
do_page_fault ((struct pt_regs *)fp, addr, errorcode);
|
| 445 |
|
|
else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
|
| 446 |
|
|
printk ("invalid %s access at %#lx from pc %#lx\n",
|
| 447 |
|
|
!(ssw & RW) ? "write" : "read", addr,
|
| 448 |
|
|
fp->ptregs.pc);
|
| 449 |
|
|
die_if_kernel("Oops",&fp->ptregs,mmusr);
|
| 450 |
|
|
force_sig(SIGSEGV, current);
|
| 451 |
|
|
return;
|
| 452 |
|
|
} else {
|
| 453 |
|
|
#ifdef DEBUG
|
| 454 |
|
|
static volatile long tlong;
|
| 455 |
|
|
#endif
|
| 456 |
|
|
|
| 457 |
|
|
printk ("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
|
| 458 |
|
|
!(ssw & RW) ? "write" : "read", addr,
|
| 459 |
|
|
fp->ptregs.pc, ssw);
|
| 460 |
|
|
asm volatile ("ptestr #1,%1@,#0\n\t"
|
| 461 |
|
|
"pmove %/psr,%0@"
|
| 462 |
|
|
: /* no outputs */
|
| 463 |
|
|
: "a" (&temp), "a" (addr));
|
| 464 |
|
|
mmusr = temp;
|
| 465 |
|
|
|
| 466 |
|
|
printk ("level 0 mmusr is %#x\n", mmusr);
|
| 467 |
|
|
#if 0
|
| 468 |
|
|
asm volatile ("pmove %/tt0,%0@"
|
| 469 |
|
|
: /* no outputs */
|
| 470 |
|
|
: "a" (&tlong));
|
| 471 |
|
|
printk ("tt0 is %#lx, ", tlong);
|
| 472 |
|
|
asm volatile ("pmove %/tt1,%0@"
|
| 473 |
|
|
: /* no outputs */
|
| 474 |
|
|
: "a" (&tlong));
|
| 475 |
|
|
printk ("tt1 is %#lx\n", tlong);
|
| 476 |
|
|
#endif
|
| 477 |
|
|
#if DEBUG
|
| 478 |
|
|
printk("Unknown SIGSEGV - 1\n");
|
| 479 |
|
|
#endif
|
| 480 |
|
|
die_if_kernel("Oops",&fp->ptregs,mmusr);
|
| 481 |
|
|
force_sig(SIGSEGV, current);
|
| 482 |
|
|
return;
|
| 483 |
|
|
}
|
| 484 |
|
|
|
| 485 |
|
|
/* setup an ATC entry for the access about to be retried */
|
| 486 |
|
|
if (!(ssw & RW))
|
| 487 |
|
|
asm volatile ("ploadw #1,%0@" : /* no outputs */
|
| 488 |
|
|
: "a" (addr));
|
| 489 |
|
|
else
|
| 490 |
|
|
asm volatile ("ploadr #1,%0@" : /* no outputs */
|
| 491 |
|
|
: "a" (addr));
|
| 492 |
|
|
|
| 493 |
|
|
/* If this was a data fault due to an invalid page and a
|
| 494 |
|
|
prefetch is pending on the same page, simulate it (but
|
| 495 |
|
|
only if the page is now valid). Otherwise we'll get an
|
| 496 |
|
|
weird insn access. */
|
| 497 |
|
|
if ((ssw & RB) && (mmusr & MMU_I))
|
| 498 |
|
|
{
|
| 499 |
|
|
unsigned long iaddr;
|
| 500 |
|
|
|
| 501 |
|
|
if ((fp->ptregs.format) == 0xB)
|
| 502 |
|
|
iaddr = fp->un.fmtb.baddr;
|
| 503 |
|
|
else
|
| 504 |
|
|
iaddr = fp->ptregs.pc + 4;
|
| 505 |
|
|
if (((addr ^ iaddr) & PAGE_MASK) == 0)
|
| 506 |
|
|
{
|
| 507 |
|
|
/* We only need to check the ATC as the entry has
|
| 508 |
|
|
already been set up above. */
|
| 509 |
|
|
asm volatile ("ptestr #1,%1@,#0\n\t"
|
| 510 |
|
|
"pmove %/psr,%0@"
|
| 511 |
|
|
: : "a" (&temp), "a" (iaddr));
|
| 512 |
|
|
mmusr = temp;
|
| 513 |
|
|
#ifdef DEBUG
|
| 514 |
|
|
printk ("prefetch iaddr=%#lx ssw=%#x mmusr=%#x\n",
|
| 515 |
|
|
iaddr, ssw, mmusr);
|
| 516 |
|
|
#endif
|
| 517 |
|
|
if (!(mmusr & MMU_I))
|
| 518 |
|
|
{
|
| 519 |
|
|
unsigned short insn;
|
| 520 |
|
|
asm volatile ("movesw %1@,%0"
|
| 521 |
|
|
: "=r" (insn)
|
| 522 |
|
|
: "a" (iaddr));
|
| 523 |
|
|
fp->un.fmtb.isb = insn;
|
| 524 |
|
|
fp->un.fmtb.ssw &= ~RB;
|
| 525 |
|
|
}
|
| 526 |
|
|
}
|
| 527 |
|
|
}
|
| 528 |
|
|
}
|
| 529 |
|
|
|
| 530 |
|
|
/* Now handle the instruction fault. */
|
| 531 |
|
|
|
| 532 |
|
|
/* get the fault address */
|
| 533 |
|
|
if ((fp->ptregs.format) == 0xA )
|
| 534 |
|
|
if (ssw & FC)
|
| 535 |
|
|
addr = fp->ptregs.pc + 2;
|
| 536 |
|
|
else if (ssw & FB)
|
| 537 |
|
|
addr = fp->ptregs.pc + 4;
|
| 538 |
|
|
else
|
| 539 |
|
|
return;
|
| 540 |
|
|
else
|
| 541 |
|
|
if (ssw & FC)
|
| 542 |
|
|
addr = fp->un.fmtb.baddr - 2;
|
| 543 |
|
|
else if (ssw & FB)
|
| 544 |
|
|
addr = fp->un.fmtb.baddr;
|
| 545 |
|
|
else
|
| 546 |
|
|
return;
|
| 547 |
|
|
|
| 548 |
|
|
if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
|
| 549 |
|
|
/* Insn fault on same page as data fault */
|
| 550 |
|
|
return;
|
| 551 |
|
|
|
| 552 |
|
|
if (user_space_fault) {
|
| 553 |
|
|
asm volatile ("ptestr #1,%2@,#7,%0\n\t"
|
| 554 |
|
|
"pmove %/psr,%1@"
|
| 555 |
|
|
: "=a&" (desc)
|
| 556 |
|
|
: "a" (&temp), "a" (addr));
|
| 557 |
|
|
mmusr = temp;
|
| 558 |
|
|
} else
|
| 559 |
|
|
mmusr = MMU_I;
|
| 560 |
|
|
|
| 561 |
|
|
#ifdef DEBUG
|
| 562 |
|
|
printk ("mmusr is %#x for addr %#lx in task %p\n",
|
| 563 |
|
|
mmusr, addr, current);
|
| 564 |
|
|
printk ("descriptor address is %#lx, contents %#lx\n",
|
| 565 |
|
|
mm_ptov(desc), *(unsigned long *)mm_ptov(desc));
|
| 566 |
|
|
#endif
|
| 567 |
|
|
|
| 568 |
|
|
errorcode = (mmusr & MMU_I) ? 0 : 1;
|
| 569 |
|
|
|
| 570 |
|
|
if (mmusr & MMU_I)
|
| 571 |
|
|
do_page_fault ((struct pt_regs *)fp, addr, errorcode);
|
| 572 |
|
|
else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
|
| 573 |
|
|
printk ("invalid insn access at %#lx from pc %#lx\n",
|
| 574 |
|
|
addr, fp->ptregs.pc);
|
| 575 |
|
|
#if DEBUG
|
| 576 |
|
|
printk("Unknown SIGSEGV - 2\n");
|
| 577 |
|
|
#endif
|
| 578 |
|
|
die_if_kernel("Oops",&fp->ptregs,mmusr);
|
| 579 |
|
|
force_sig(SIGSEGV, current);
|
| 580 |
|
|
return;
|
| 581 |
|
|
} else {
|
| 582 |
|
|
#ifdef DEBUG
|
| 583 |
|
|
static volatile long tlong;
|
| 584 |
|
|
#endif
|
| 585 |
|
|
|
| 586 |
|
|
printk ("weird insn access at %#lx from pc %#lx (ssw is %#x)\n",
|
| 587 |
|
|
addr, fp->ptregs.pc, ssw);
|
| 588 |
|
|
asm volatile ("ptestr #1,%1@,#0\n\t"
|
| 589 |
|
|
"pmove %/psr,%0@"
|
| 590 |
|
|
: /* no outputs */
|
| 591 |
|
|
: "a" (&temp), "a" (addr));
|
| 592 |
|
|
mmusr = temp;
|
| 593 |
|
|
|
| 594 |
|
|
printk ("level 0 mmusr is %#x\n", mmusr);
|
| 595 |
|
|
#ifdef DEBUG
|
| 596 |
|
|
if (boot_info.cputype & CPU_68030) {
|
| 597 |
|
|
asm volatile ("pmove %/tt0,%0@"
|
| 598 |
|
|
: /* no outputs */
|
| 599 |
|
|
: "a" (&tlong));
|
| 600 |
|
|
printk ("tt0 is %#lx, ", tlong);
|
| 601 |
|
|
asm volatile ("pmove %/tt1,%0@"
|
| 602 |
|
|
: /* no outputs */
|
| 603 |
|
|
: "a" (&tlong));
|
| 604 |
|
|
printk ("tt1 is %#lx\n", tlong);
|
| 605 |
|
|
}
|
| 606 |
|
|
|
| 607 |
|
|
#endif
|
| 608 |
|
|
#if DEBUG
|
| 609 |
|
|
printk("Unknown SIGSEGV - 3\n");
|
| 610 |
|
|
#endif
|
| 611 |
|
|
die_if_kernel("Oops",&fp->ptregs,mmusr);
|
| 612 |
|
|
force_sig(SIGSEGV, current);
|
| 613 |
|
|
return;
|
| 614 |
|
|
}
|
| 615 |
|
|
|
| 616 |
|
|
/* setup an ATC entry for the access about to be retried */
|
| 617 |
|
|
asm volatile ("ploadr #1,%0@" : /* no outputs */
|
| 618 |
|
|
: "a" (addr));
|
| 619 |
|
|
}
|
| 620 |
|
|
|
| 621 |
|
|
asmlinkage void buserr_c(struct frame *fp)
|
| 622 |
|
|
{
|
| 623 |
|
|
/* Only set esp0 if coming from user mode */
|
| 624 |
|
|
if (user_mode(&fp->ptregs))
|
| 625 |
|
|
current->tss.esp0 = (unsigned long) fp;
|
| 626 |
|
|
|
| 627 |
|
|
#if DEBUG
|
| 628 |
|
|
printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
|
| 629 |
|
|
#endif
|
| 630 |
|
|
|
| 631 |
|
|
switch (fp->ptregs.format) {
|
| 632 |
|
|
case 4: /* 68060 access error */
|
| 633 |
|
|
access_error060 (fp);
|
| 634 |
|
|
break;
|
| 635 |
|
|
case 0x7: /* 68040 access error */
|
| 636 |
|
|
access_error040 (fp);
|
| 637 |
|
|
break;
|
| 638 |
|
|
case 0xa:
|
| 639 |
|
|
case 0xb:
|
| 640 |
|
|
bus_error030 (fp);
|
| 641 |
|
|
break;
|
| 642 |
|
|
default:
|
| 643 |
|
|
die_if_kernel("bad frame format",&fp->ptregs,0);
|
| 644 |
|
|
#if DEBUG
|
| 645 |
|
|
printk("Unknown SIGSEGV - 4\n");
|
| 646 |
|
|
#endif
|
| 647 |
|
|
force_sig(SIGSEGV, current);
|
| 648 |
|
|
}
|
| 649 |
|
|
}
|
| 650 |
|
|
|
| 651 |
|
|
|
| 652 |
|
|
int kstack_depth_to_print = 48;
|
| 653 |
|
|
|
| 654 |
|
|
/* MODULE_RANGE is a guess of how much space is likely to be
|
| 655 |
|
|
vmalloced. */
|
| 656 |
|
|
#define MODULE_RANGE (8*1024*1024)
|
| 657 |
|
|
|
| 658 |
|
|
static void dump_stack(struct frame *fp)
|
| 659 |
|
|
{
|
| 660 |
|
|
unsigned long *stack, *endstack, addr, module_start, module_end;
|
| 661 |
|
|
extern char _start, _etext;
|
| 662 |
|
|
int i;
|
| 663 |
|
|
|
| 664 |
|
|
addr = (unsigned long)&fp->un;
|
| 665 |
|
|
printk("Frame format=%X ", fp->ptregs.format);
|
| 666 |
|
|
switch (fp->ptregs.format) {
|
| 667 |
|
|
case 0x2:
|
| 668 |
|
|
printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
|
| 669 |
|
|
addr += sizeof(fp->un.fmt2);
|
| 670 |
|
|
break;
|
| 671 |
|
|
case 0x3:
|
| 672 |
|
|
printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
|
| 673 |
|
|
addr += sizeof(fp->un.fmt3);
|
| 674 |
|
|
break;
|
| 675 |
|
|
case 0x4:
|
| 676 |
|
|
printk((m68k_is040or060 == 6 ? "fault addr=%08lx fslw=%08lx\n"
|
| 677 |
|
|
: "eff addr=%08lx pc=%08lx\n"),
|
| 678 |
|
|
fp->un.fmt4.effaddr, fp->un.fmt4.pc);
|
| 679 |
|
|
addr += sizeof(fp->un.fmt4);
|
| 680 |
|
|
break;
|
| 681 |
|
|
case 0x7:
|
| 682 |
|
|
printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
|
| 683 |
|
|
fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
|
| 684 |
|
|
printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
|
| 685 |
|
|
fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
|
| 686 |
|
|
printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
|
| 687 |
|
|
fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
|
| 688 |
|
|
printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
|
| 689 |
|
|
fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
|
| 690 |
|
|
printk("push data: %08lx %08lx %08lx %08lx\n",
|
| 691 |
|
|
fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
|
| 692 |
|
|
fp->un.fmt7.pd3);
|
| 693 |
|
|
addr += sizeof(fp->un.fmt7);
|
| 694 |
|
|
break;
|
| 695 |
|
|
case 0x9:
|
| 696 |
|
|
printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
|
| 697 |
|
|
addr += sizeof(fp->un.fmt9);
|
| 698 |
|
|
break;
|
| 699 |
|
|
case 0xa:
|
| 700 |
|
|
printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
|
| 701 |
|
|
fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
|
| 702 |
|
|
fp->un.fmta.daddr, fp->un.fmta.dobuf);
|
| 703 |
|
|
addr += sizeof(fp->un.fmta);
|
| 704 |
|
|
break;
|
| 705 |
|
|
case 0xb:
|
| 706 |
|
|
printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
|
| 707 |
|
|
fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
|
| 708 |
|
|
fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
|
| 709 |
|
|
printk("baddr=%08lx dibuf=%08lx ver=%x\n",
|
| 710 |
|
|
fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
|
| 711 |
|
|
addr += sizeof(fp->un.fmtb);
|
| 712 |
|
|
break;
|
| 713 |
|
|
default:
|
| 714 |
|
|
printk("\n");
|
| 715 |
|
|
}
|
| 716 |
|
|
|
| 717 |
|
|
stack = (unsigned long *)addr;
|
| 718 |
|
|
endstack = (unsigned long *)PAGE_ALIGN(addr);
|
| 719 |
|
|
|
| 720 |
|
|
printk("Stack from %08lx:\n ", (unsigned long)stack);
|
| 721 |
|
|
for (i = 0; i < kstack_depth_to_print; i++) {
|
| 722 |
|
|
if (stack + 1 > endstack)
|
| 723 |
|
|
break;
|
| 724 |
|
|
if (i && ((i % 8) == 0))
|
| 725 |
|
|
printk("\n ");
|
| 726 |
|
|
printk("%08lx ", *stack++);
|
| 727 |
|
|
}
|
| 728 |
|
|
|
| 729 |
|
|
printk ("\nCall Trace: ");
|
| 730 |
|
|
stack = (unsigned long *) addr;
|
| 731 |
|
|
i = 1;
|
| 732 |
|
|
module_start = VMALLOC_START;
|
| 733 |
|
|
module_end = module_start + MODULE_RANGE;
|
| 734 |
|
|
while (stack + 1 <= endstack) {
|
| 735 |
|
|
addr = *stack++;
|
| 736 |
|
|
/*
|
| 737 |
|
|
* If the address is either in the text segment of the
|
| 738 |
|
|
* kernel, or in the region which contains vmalloc'ed
|
| 739 |
|
|
* memory, it *may* be the address of a calling
|
| 740 |
|
|
* routine; if so, print it so that someone tracing
|
| 741 |
|
|
* down the cause of the crash will be able to figure
|
| 742 |
|
|
* out the call path that was taken.
|
| 743 |
|
|
*/
|
| 744 |
|
|
if (((addr >= (unsigned long) &_start) &&
|
| 745 |
|
|
(addr <= (unsigned long) &_etext)) ||
|
| 746 |
|
|
((addr >= module_start) && (addr <= module_end))) {
|
| 747 |
|
|
if (i && ((i % 8) == 0))
|
| 748 |
|
|
printk("\n ");
|
| 749 |
|
|
printk("[<%08lx>] ", addr);
|
| 750 |
|
|
i++;
|
| 751 |
|
|
}
|
| 752 |
|
|
}
|
| 753 |
|
|
printk("\nCode: ");
|
| 754 |
|
|
for (i = 0; i < 10; i++)
|
| 755 |
|
|
printk("%04x ", 0xffff & ((short *) fp->ptregs.pc)[i]);
|
| 756 |
|
|
printk ("\n");
|
| 757 |
|
|
}
|
| 758 |
|
|
|
| 759 |
|
|
void bad_super_trap (struct frame *fp)
|
| 760 |
|
|
{
|
| 761 |
|
|
console_verbose();
|
| 762 |
|
|
if ((fp->ptregs.vector) < 48*4)
|
| 763 |
|
|
printk ("*** %s *** FORMAT=%X\n",
|
| 764 |
|
|
vec_names[(fp->ptregs.vector) >> 2],
|
| 765 |
|
|
fp->ptregs.format);
|
| 766 |
|
|
else
|
| 767 |
|
|
printk ("*** Exception %d *** FORMAT=%X\n",
|
| 768 |
|
|
(fp->ptregs.vector) >> 2,
|
| 769 |
|
|
fp->ptregs.format);
|
| 770 |
|
|
if (((fp->ptregs.vector) >> 2) == VEC_ADDRERR
|
| 771 |
|
|
&& !m68k_is040or060) {
|
| 772 |
|
|
unsigned short ssw = fp->un.fmtb.ssw;
|
| 773 |
|
|
|
| 774 |
|
|
printk ("SSW=%#06x ", ssw);
|
| 775 |
|
|
|
| 776 |
|
|
if (ssw & RC)
|
| 777 |
|
|
printk ("Pipe stage C instruction fault at %#010lx\n",
|
| 778 |
|
|
(fp->ptregs.format) == 0xA ?
|
| 779 |
|
|
fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
|
| 780 |
|
|
if (ssw & RB)
|
| 781 |
|
|
printk ("Pipe stage B instruction fault at %#010lx\n",
|
| 782 |
|
|
(fp->ptregs.format) == 0xA ?
|
| 783 |
|
|
fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
|
| 784 |
|
|
if (ssw & DF)
|
| 785 |
|
|
printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
|
| 786 |
|
|
ssw & RW ? "read" : "write",
|
| 787 |
|
|
fp->un.fmtb.daddr, space_names[ssw & DFC],
|
| 788 |
|
|
fp->ptregs.pc);
|
| 789 |
|
|
}
|
| 790 |
|
|
printk ("Current process id is %d\n", current->pid);
|
| 791 |
|
|
die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
|
| 792 |
|
|
}
|
| 793 |
|
|
|
| 794 |
|
|
asmlinkage void trap_c(struct frame *fp)
|
| 795 |
|
|
{
|
| 796 |
|
|
int sig;
|
| 797 |
|
|
|
| 798 |
|
|
if ((fp->ptregs.sr & PS_S)
|
| 799 |
|
|
&& ((fp->ptregs.vector) >> 2) == VEC_TRACE
|
| 800 |
|
|
&& !(fp->ptregs.sr & PS_T)) {
|
| 801 |
|
|
/* traced a trapping instruction */
|
| 802 |
|
|
unsigned char *lp = ((unsigned char *)&fp->un.fmt2) + 4;
|
| 803 |
|
|
current->flags |= PF_DTRACE;
|
| 804 |
|
|
/* clear the trace bit */
|
| 805 |
|
|
(*(unsigned short *)lp) &= ~PS_T;
|
| 806 |
|
|
return;
|
| 807 |
|
|
} else if (fp->ptregs.sr & PS_S) {
|
| 808 |
|
|
bad_super_trap(fp);
|
| 809 |
|
|
return;
|
| 810 |
|
|
}
|
| 811 |
|
|
|
| 812 |
|
|
/* send the appropriate signal to the user program */
|
| 813 |
|
|
switch ((fp->ptregs.vector) >> 2) {
|
| 814 |
|
|
case VEC_ADDRERR:
|
| 815 |
|
|
sig = SIGBUS;
|
| 816 |
|
|
break;
|
| 817 |
|
|
case VEC_BUSERR:
|
| 818 |
|
|
sig = SIGSEGV;
|
| 819 |
|
|
break;
|
| 820 |
|
|
case VEC_ILLEGAL:
|
| 821 |
|
|
case VEC_PRIV:
|
| 822 |
|
|
case VEC_LINE10:
|
| 823 |
|
|
case VEC_LINE11:
|
| 824 |
|
|
case VEC_COPROC:
|
| 825 |
|
|
case VEC_TRAP1:
|
| 826 |
|
|
case VEC_TRAP2:
|
| 827 |
|
|
case VEC_TRAP3:
|
| 828 |
|
|
case VEC_TRAP4:
|
| 829 |
|
|
case VEC_TRAP5:
|
| 830 |
|
|
case VEC_TRAP6:
|
| 831 |
|
|
case VEC_TRAP7:
|
| 832 |
|
|
case VEC_TRAP8:
|
| 833 |
|
|
case VEC_TRAP9:
|
| 834 |
|
|
case VEC_TRAP10:
|
| 835 |
|
|
case VEC_TRAP11:
|
| 836 |
|
|
case VEC_TRAP12:
|
| 837 |
|
|
case VEC_TRAP13:
|
| 838 |
|
|
case VEC_TRAP14:
|
| 839 |
|
|
sig = SIGILL;
|
| 840 |
|
|
break;
|
| 841 |
|
|
case VEC_FPBRUC:
|
| 842 |
|
|
case VEC_FPIR:
|
| 843 |
|
|
case VEC_FPDIVZ:
|
| 844 |
|
|
case VEC_FPUNDER:
|
| 845 |
|
|
case VEC_FPOE:
|
| 846 |
|
|
case VEC_FPOVER:
|
| 847 |
|
|
case VEC_FPNAN:
|
| 848 |
|
|
{
|
| 849 |
|
|
unsigned char fstate[216];
|
| 850 |
|
|
|
| 851 |
|
|
__asm__ __volatile__ ("fsave %0@" : : "a" (fstate) : "memory");
|
| 852 |
|
|
/* Set the exception pending bit in the 68882 idle frame */
|
| 853 |
|
|
if (*(unsigned short *) fstate == 0x1f38)
|
| 854 |
|
|
{
|
| 855 |
|
|
fstate[fstate[1]] |= 1 << 3;
|
| 856 |
|
|
__asm__ __volatile__ ("frestore %0@" : : "a" (fstate));
|
| 857 |
|
|
}
|
| 858 |
|
|
}
|
| 859 |
|
|
/* fall through */
|
| 860 |
|
|
case VEC_ZERODIV:
|
| 861 |
|
|
case VEC_TRAP:
|
| 862 |
|
|
sig = SIGFPE;
|
| 863 |
|
|
break;
|
| 864 |
|
|
case VEC_TRACE: /* ptrace single step */
|
| 865 |
|
|
fp->ptregs.sr &= ~PS_T;
|
| 866 |
|
|
case VEC_TRAP15: /* breakpoint */
|
| 867 |
|
|
sig = SIGTRAP;
|
| 868 |
|
|
break;
|
| 869 |
|
|
default:
|
| 870 |
|
|
sig = SIGILL;
|
| 871 |
|
|
break;
|
| 872 |
|
|
}
|
| 873 |
|
|
|
| 874 |
|
|
force_sig (sig, current);
|
| 875 |
|
|
}
|
| 876 |
|
|
|
| 877 |
|
|
asmlinkage void set_esp0 (unsigned long ssp)
|
| 878 |
|
|
{
|
| 879 |
|
|
current->tss.esp0 = ssp;
|
| 880 |
|
|
}
|
| 881 |
|
|
|
| 882 |
|
|
void die_if_kernel (char *str, struct pt_regs *fp, int nr)
|
| 883 |
|
|
{
|
| 884 |
|
|
if (!(fp->sr & PS_S))
|
| 885 |
|
|
return;
|
| 886 |
|
|
|
| 887 |
|
|
console_verbose();
|
| 888 |
|
|
printk("%s: %08x\n",str,nr);
|
| 889 |
|
|
printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
|
| 890 |
|
|
printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
|
| 891 |
|
|
fp->d0, fp->d1, fp->d2, fp->d3);
|
| 892 |
|
|
printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
|
| 893 |
|
|
fp->d4, fp->d5, fp->a0, fp->a1);
|
| 894 |
|
|
|
| 895 |
|
|
if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
|
| 896 |
|
|
printk("Corrupted stack page\n");
|
| 897 |
|
|
printk("Process %s (pid: %d, stackpage=%08lx)\n",
|
| 898 |
|
|
current->comm, current->pid, current->kernel_stack_page);
|
| 899 |
|
|
dump_stack((struct frame *)fp);
|
| 900 |
|
|
do_exit(SIGSEGV);
|
| 901 |
|
|
}
|
