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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [m68knommu/] [platform/] [5206e/] [toolvox/] [crt0_rom.S] - Blame information for rev 199

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Line No. Rev Author Line
1 199 simons
/*****************************************************************************/
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/*
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 *      crt0_ram.S -- startup code for MCF5206e ColdFire based ToolVox boards.
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 *
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 *      (C) Copyright 1999, Greg Ungerer.
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 *
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 *      2000/01/28 Modified for the Omnia -
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 *              'ToolVox' Microphone Processor by James D. Schettine
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 */
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/*
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 * Telos-systems Inc. has many twisty little architectures- all different.
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 * The first coldfire board in the Omnia product line is the ToolVox.
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 * The Toolvox is a Microphone processor with many features for the high-
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 * end audio broadcaster or recording studio.  The actual audio processing
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 * is performed by an on-board DSP.  (Really cool stuff!)
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 * See:  www.nogrunge.com/product/toolvox
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 * Linux support is for in-house use for now, but hopefully soon I can
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 * justify using a *real* kernel for the entire product line.
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 */
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/*****************************************************************************/
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#include "linux/autoconf.h"
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#include "asm/coldfire.h"
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#include "asm/mcfsim.h"
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/*****************************************************************************/
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/*
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 *      Omnia ToolVox M5206e ColdFire board, chip select and memory setup.
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 */
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#define MEM_BASE        0x00100000      /* Memory base at address 1Mb */
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#define MEM_SIZE        0x00100000      /* Memory size 1Mb */
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#define VBR_BASE        MEM_BASE        /* Vector address */
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/*****************************************************************************/
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.global _start
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.global _rambase
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.global _ramvec
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.global _ramstart
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.global _ramend
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/*****************************************************************************/
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.data
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/*
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 *      Set up the usable of RAM stuff. Size of RAM is determined then
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 *      an initial stack set up at the end.
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 */
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_rambase:
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.long   0
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_ramvec:
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.long   0
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_ramstart:
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.long   0
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_ramend:
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.long   0
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/*****************************************************************************/
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.text
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/*
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 *      This is the codes first entry point. This is where it all
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 *      begins...
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 */
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_start:
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        nop                                     /* Filler */
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        move.w  #0x2700, %sr                    /* No interrupts */
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        /* assume boot-rom setup ram, xilinx, periperals, etc... */
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        /* copy data segment from ROM to RAM */
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        move.l  #_etext, %a0
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        move.l  #_sdata, %a1
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        move.l  #_edata, %a2
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_copy_data:
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        move.l  (%a0)+,%d0
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        move.l  %d0,(%a1)+
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        cmp.l   %a1,%a2
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        bhi     _copy_data
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        /*
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         * Setup VBR here, otherwise buserror remap will not work.
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         * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
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         *
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         * bkr@cut.de 19990306
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         *
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         * Note: this is because dBUG points VBR to ROM, making vectors read
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         * only, so the bus trap can't be changed. (RS)
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         */
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        move.l  #VBR_BASE, %a7                  /* Note VBR can't be read */
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        movec   %a7, %VBR
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        move.l  %a7, _ramvec                    /* Set up vector addr */
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        move.l  %a7, _rambase                   /* Set up base RAM addr */
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        /*
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         *      Set to 1 meg for the ToolVox board (m5206e).
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         */
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        move.l  #MEM_BASE+MEM_SIZE, %sp         /* Set up initial stack ptr */
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        move.l  %sp, _ramend                    /* Set end ram addr */
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        lea.l   _ebss, %a0                      /* Set start of ram */
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        move.l  %a0, _ramstart
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        /*
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         *      Enable CPU internal cache.
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         */
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        move.l  #0x01000000, %d0                /* Invalidate cache cmd */
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        movec   %d0, %CACR                      /* Invalidate cache */
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        move.l  #0x80000100, %d0                /* Setup cache mask */
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        movec   %d0, %CACR                      /* Enable cache */
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        /*
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         *      Zero out the bss region.
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         */
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        lea.l   _sbss, %a0                      /* Get start of bss */
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        lea.l   _ebss, %a1                      /* Get end of bss */
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        clr.l   %d0                             /* Set value */
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_clear_bss:
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        move.l  %d0, (%a0)+                     /* Clear each word */
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        cmp.l   %a0, %a1                        /* Check if at end */
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        bne     _clear_bss
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        /*
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         *      Assember start up done, start code proper.
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         */
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        jsr     start_kernel                    /* Start Linux kernel */
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_exit:
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        jmp     _exit                           /* Should never get here */
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/*****************************************************************************/

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