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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [m68knommu/] [platform/] [5307/] [eLIA/] [crt0_ram.S] - Blame information for rev 199

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/*****************************************************************************/
 
/*
 *      crt0_ram.S -- startup code for MCF5307 ColdFire based eLIA board.
 *
 *      (C) Copyright 1999, Greg Ungerer.
 *
 *      1999/02/24 Modified for the 5307 processor David W. Miller
 */
 
/*****************************************************************************/
 
#include "linux/autoconf.h"
#include "asm/coldfire.h"
#include "asm/mcfsim.h"
 
/*****************************************************************************/
 
/*
 *      Moreton Bay NETtel board, chip select and memory setup.
 */
 
#define MEM_BASE        0x00000000      /* Memory base at address 0 */
#define MEM_SIZE        0x01000000      /* Memory size 16Mb */
#define VBR_BASE        MEM_BASE        /* Vector address */
 
/*****************************************************************************/
 
.global _start
.global _rambase
.global _ramvec
.global _ramstart
.global _ramend
 
/*****************************************************************************/
 
.data
 
/*
 *      Set up the usable of RAM stuff. Size of RAM is determined then
 *      an initial stack set up at the end.
 */
_rambase:
.long   0
_ramvec:
.long   0
_ramstart:
.long   0
_ramend:
.long   0
 
/*****************************************************************************/
 
/*
 *      The eLIA platform has some funky LEDs!
 */
.global ppdata
ppdata:
.short  0x7000
 
/*****************************************************************************/
 
.text
 
/*
 *      This is the codes first entry point. This is where it all
 *      begins...
 */
 
_start:
        nop                                     /* Filler */
        move.w  #0x2700, %sr                    /* No interrupts */
 
 
#if 0
        /*
         *      Set LEDs to known startup state.
         */
        /* FIXME: reset LED values... */
 
 
        /*
         *      Disable watchdog timer.
         */
        move.l  #MCF_MBAR, %a0                  /* Get MBAR address */
        clr.l   %d0                             /* Disable SWT */
        move.b  %d0, MCFSIM_SYPCR(%a0)
        move.b  #0x55, %d0                      /* Clear SWT as well */
        move.b  %d0, MCFSIM_SWSR(%a0)
        move.b  #0xaa, %d0
        move.b  %d0, MCFSIM_SWSR(%a0)
        move.l  #0xffffffff, %d0                /* Mask out all interrupts */
        move.l  %d0, MCFSIM_IMR(%a0)
#endif
 
 
        /*
         * Setup VBR here, otherwise buserror remap will not work.
         * if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)
         *
         * bkr@cut.de 19990306
         *
         * Note: this is because dBUG points VBR to ROM, making vectors read
         * only, so the bus trap can't be changed. (RS)
         */
        move.l  #VBR_BASE, %a7                  /* Note VBR can't be read */
        movec   %a7, %VBR
        move.l  %a7, _ramvec                    /* Set up vector addr */
        move.l  %a7, _rambase                   /* Set up base RAM addr */
 
 
        /*
         *      Determine size of RAM, then set up initial stack.
         */
        move.l  #MEM_SIZE, %a0
 
        move.l  %a0, %d0                        /* Mem end addr is in a0 */
        move.l  %d0, %sp                        /* Set up initial stack ptr */
        move.l  %d0, _ramend                    /* Set end ram addr */
 
        /*
         *      Enable CPU internal cache.
         */
        move.l  #0x01000000, %d0                /* invalidate whole cache */
        movec   %d0,%CACR
        nop
        move.l  #0x0000c000, %d0                /* Set SDRAM cached only */
        movec   %d0, %ACR0
        move.l  #0x00000000, %d0                /* No other regions cached */
        movec   %d0, %ACR1
 
        /* Enable cache */
        move.l  #0xa0000200, %d0
        movec   %d0,%CACR
        nop
 
 
        /*
         *      Move ROM filesystem above bss :-)
         */
        lea.l   _sbss, %a0                      /* Get start of bss */
        lea.l   _ebss, %a1                      /* Set up destination  */
        move.l  %a0, %a2                        /* Copy of bss start */
 
        move.l  8(%a0), %d0                     /* Get size of ROMFS */
        addq.l  #8, %d0                         /* Allow for rounding */
        and.l   #0xfffffffc, %d0                /* Whole words */
 
        add.l   %d0, %a0                        /* Copy from end */
        add.l   %d0, %a1                        /* Copy from end */
        move.l  %a1, _ramstart                  /* Set start of ram */
 
_copy_romfs:
        move.l  -(%a0), %d0                     /* Copy dword */
        move.l  %d0, -(%a1)
        cmp.l   %a0, %a2                        /* Check if at end */
        bne     _copy_romfs
 
        /*
         *      Zero out the bss region.
         */
        lea.l   _sbss, %a0                      /* Get start of bss */
        lea.l   _ebss, %a1                      /* Get end of bss */
        clr.l   %d0                             /* Set value */
_clear_bss:
        move.l  %d0, (%a0)+                     /* Clear each word */
        cmp.l   %a0, %a1                        /* Check if at end */
        bne     _clear_bss
 
        /*
         *      Assember start up done, start code proper.
         */
        jsr     start_kernel                    /* Start Linux kernel */
 
_exit:
        jmp     _exit                           /* Should never get here */
 
/*****************************************************************************/

Line No.	Rev	Author	Line
1	199	simons	`/*****************************************************************************/`
2
3			`/*`
4			`* crt0_ram.S -- startup code for MCF5307 ColdFire based eLIA board.`
5			`*`
6			`* (C) Copyright 1999, Greg Ungerer.`
7			`*`
8			`* 1999/02/24 Modified for the 5307 processor David W. Miller`
9			`*/`
10
11			`/*****************************************************************************/`
12
13			`#include "linux/autoconf.h"`
14			`#include "asm/coldfire.h"`
15			`#include "asm/mcfsim.h"`
16
17			`/*****************************************************************************/`
18
19			`/*`
20			`* Moreton Bay NETtel board, chip select and memory setup.`
21			`*/`
22
23			`#define MEM_BASE 0x00000000 /* Memory base at address 0 */`
24			`#define MEM_SIZE 0x01000000 /* Memory size 16Mb */`
25			`#define VBR_BASE MEM_BASE /* Vector address */`
26
27			`/*****************************************************************************/`
28
29			`.global _start`
30			`.global _rambase`
31			`.global _ramvec`
32			`.global _ramstart`
33			`.global _ramend`
34
35			`/*****************************************************************************/`
36
37			`.data`
38
39			`/*`
40			`* Set up the usable of RAM stuff. Size of RAM is determined then`
41			`* an initial stack set up at the end.`
42			`*/`
43			`_rambase:`
44			`.long 0`
45			`_ramvec:`
46			`.long 0`
47			`_ramstart:`
48			`.long 0`
49			`_ramend:`
50			`.long 0`
51
52			`/*****************************************************************************/`
53
54			`/*`
55			`* The eLIA platform has some funky LEDs!`
56			`*/`
57			`.global ppdata`
58			`ppdata:`
59			`.short 0x7000`
60
61			`/*****************************************************************************/`
62
63			`.text`
64
65			`/*`
66			`* This is the codes first entry point. This is where it all`
67			`* begins...`
68			`*/`
69
70			`_start:`
71			`nop /* Filler */`
72			`move.w #0x2700, %sr /* No interrupts */`
73
74
75			`#if 0`
76			`/*`
77			`* Set LEDs to known startup state.`
78			`*/`
79			`/* FIXME: reset LED values... */`
80
81
82			`/*`
83			`* Disable watchdog timer.`
84			`*/`
85			`move.l #MCF_MBAR, %a0 /* Get MBAR address */`
86			`clr.l %d0 /* Disable SWT */`
87			`move.b %d0, MCFSIM_SYPCR(%a0)`
88			`move.b #0x55, %d0 /* Clear SWT as well */`
89			`move.b %d0, MCFSIM_SWSR(%a0)`
90			`move.b #0xaa, %d0`
91			`move.b %d0, MCFSIM_SWSR(%a0)`
92			`move.l #0xffffffff, %d0 /* Mask out all interrupts */`
93			`move.l %d0, MCFSIM_IMR(%a0)`
94			`#endif`
95
96
97			`/*`
98			`* Setup VBR here, otherwise buserror remap will not work.`
99			`* if dBug was active before (on my SBC with dBug 1.1 of Dec 16 1996)`
100			`*`
101			`* bkr@cut.de 19990306`
102			`*`
103			`* Note: this is because dBUG points VBR to ROM, making vectors read`
104			`* only, so the bus trap can't be changed. (RS)`
105			`*/`
106			`move.l #VBR_BASE, %a7 /* Note VBR can't be read */`
107			`movec %a7, %VBR`
108			`move.l %a7, _ramvec /* Set up vector addr */`
109			`move.l %a7, _rambase /* Set up base RAM addr */`
110
111
112			`/*`
113			`* Determine size of RAM, then set up initial stack.`
114			`*/`
115			`move.l #MEM_SIZE, %a0`
116
117			`move.l %a0, %d0 /* Mem end addr is in a0 */`
118			`move.l %d0, %sp /* Set up initial stack ptr */`
119			`move.l %d0, _ramend /* Set end ram addr */`
120
121			`/*`
122			`* Enable CPU internal cache.`
123			`*/`
124			`move.l #0x01000000, %d0 /* invalidate whole cache */`
125			`movec %d0,%CACR`
126			`nop`
127			`move.l #0x0000c000, %d0 /* Set SDRAM cached only */`
128			`movec %d0, %ACR0`
129			`move.l #0x00000000, %d0 /* No other regions cached */`
130			`movec %d0, %ACR1`
131
132			`/* Enable cache */`
133			`move.l #0xa0000200, %d0`
134			`movec %d0,%CACR`
135			`nop`
136
137
138			`/*`
139			`* Move ROM filesystem above bss :-)`
140			`*/`
141			`lea.l _sbss, %a0 /* Get start of bss */`
142			`lea.l _ebss, %a1 /* Set up destination */`
143			`move.l %a0, %a2 /* Copy of bss start */`
144
145			`move.l 8(%a0), %d0 /* Get size of ROMFS */`
146			`addq.l #8, %d0 /* Allow for rounding */`
147			`and.l #0xfffffffc, %d0 /* Whole words */`
148
149			`add.l %d0, %a0 /* Copy from end */`
150			`add.l %d0, %a1 /* Copy from end */`
151			`move.l %a1, _ramstart /* Set start of ram */`
152
153			`_copy_romfs:`
154			`move.l -(%a0), %d0 /* Copy dword */`
155			`move.l %d0, -(%a1)`
156			`cmp.l %a0, %a2 /* Check if at end */`
157			`bne _copy_romfs`
158
159			`/*`
160			`* Zero out the bss region.`
161			`*/`
162			`lea.l _sbss, %a0 /* Get start of bss */`
163			`lea.l _ebss, %a1 /* Get end of bss */`
164			`clr.l %d0 /* Set value */`
165			`_clear_bss:`
166			`move.l %d0, (%a0)+ /* Clear each word */`
167			`cmp.l %a0, %a1 /* Check if at end */`
168			`bne _clear_bss`
169
170			`/*`
171			`* Assember start up done, start code proper.`
172			`*/`
173			`jsr start_kernel /* Start Linux kernel */`
174
175			`_exit:`
176			`jmp _exit /* Should never get here */`
177
178			`/*****************************************************************************/`

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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [m68knommu/] [platform/] [5307/] [eLIA/] [crt0_ram.S] - Blame information for rev 199