OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [arch/] [or32/] [kernel/] [bios32.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 666 simons
/*****************************************************************************/
2
 
3
/*
4
 *      bios32.c -- PCI access code for embedded CO-MEM Lite PCI controller.
5
 *
6
 *      (C) Copyright 1999-2000, Greg Ungerer (gerg@moreton.com.au).
7
 */
8
 
9
/*****************************************************************************/
10
 
11
#include <linux/config.h>
12
#include <linux/kernel.h>
13
#include <linux/types.h>
14
#include <linux/bios32.h>
15
#include <linux/pci.h>
16
#include <asm/anchor.h>
17
 
18
/*****************************************************************************/
19
#ifdef CONFIG_PCI
20
/*****************************************************************************/
21
 
22
unsigned long pcibios_init(unsigned long mem_start, unsigned long mem_end)
23
{
24
        volatile unsigned long  *rp;
25
        int                     slot;
26
 
27
#if 0
28
        printk("%s(%d): pcibios_init()\n", __FILE__, __LINE__);
29
#endif
30
 
31
        /*
32
         *      Do some sort of basic check to see if the CO-MEM part
33
         *      is present...
34
         */
35
        rp = (volatile unsigned long *) COMEM_BASE;
36
        if ((rp[COMEM_LBUSCFG] & 0xffff) != 0x0b50) {
37
                printk("PCI: no PCI bus present\n");
38
                return(mem_start);
39
        }
40
 
41
        /*
42
         *      Do a quick scan of the PCI bus and see what is here.
43
         */
44
        for (slot = COMEM_MINIDSEL; (slot <= COMEM_MAXIDSEL); slot++) {
45
                rp[COMEM_DAHBASE] = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << slot);
46
                rp[COMEM_PCIBUS] = 0; /* Clear bus */
47
                printk("PCI: slot %d  -->  %08x\n", slot, rp[COMEM_PCIBUS]);
48
        }
49
 
50
        return(mem_start);
51
}
52
 
53
/*****************************************************************************/
54
 
55
unsigned long pcibios_fixup(unsigned long mem_start, unsigned long mem_end)
56
{
57
        return(mem_start);
58
}
59
 
60
/*****************************************************************************/
61
 
62
int pcibios_present(void)
63
{
64
        return(1);
65
}
66
 
67
/*****************************************************************************/
68
 
69
int pcibios_read_config_dword(unsigned char bus, unsigned char dev,
70
        unsigned char offset, unsigned int *val)
71
{
72
#if 0
73
        printk("%s(%d): pcibios_read_config_dword(bus=%x,dev=%x,offset=%x,"
74
                "val=%x)\n", __FILE__, __LINE__, bus, dev, offset, val);
75
#endif
76
        *val = 0xffffffff;
77
        return(PCIBIOS_SUCCESSFUL);
78
}
79
 
80
/*****************************************************************************/
81
 
82
int pcibios_read_config_word(unsigned char bus, unsigned char dev,
83
        unsigned char offset, unsigned short *val)
84
{
85
#if 0
86
        printk("%s(%d): pcibios_read_config_word(bus=%x,dev=%x,offset=%x)\n",
87
                __FILE__, __LINE__, bus, dev, offset);
88
#endif
89
        *val = 0xffff;
90
        return(PCIBIOS_SUCCESSFUL);
91
}
92
 
93
/*****************************************************************************/
94
 
95
int pcibios_read_config_byte(unsigned char bus, unsigned char dev,
96
        unsigned char offset, unsigned char *val)
97
{
98
#if 0
99
        printk("%s(%d): pcibios_read_config_byte(bus=%x,dev=%x,offset=%x)\n",
100
                __FILE__, __LINE__, bus, dev, offset);
101
#endif
102
        *val = 0xff;
103
        return(PCIBIOS_SUCCESSFUL);
104
}
105
 
106
/*****************************************************************************/
107
 
108
int pcibios_write_config_dword(unsigned char bus, unsigned char dev,
109
        unsigned char offset, unsigned int val)
110
{
111
#if 0
112
        printk("%s(%d): pcibios_write_config_dword(bus=%x,dev=%x,offset=%x)\n",
113
                __FILE__, __LINE__, bus, dev, offset);
114
#endif
115
        return(PCIBIOS_SUCCESSFUL);
116
}
117
 
118
/*****************************************************************************/
119
 
120
int pcibios_write_config_word(unsigned char bus, unsigned char dev,
121
        unsigned char offset, unsigned short val)
122
{
123
#if 0
124
        printk("%s(%d): pcibios_write_config_word(bus=%x,dev=%x,offset=%x)\n",
125
                __FILE__, __LINE__, bus, dev, offset);
126
#endif
127
        return(PCIBIOS_SUCCESSFUL);
128
}
129
 
130
/*****************************************************************************/
131
 
132
int pcibios_write_config_byte(unsigned char bus, unsigned char dev,
133
        unsigned char offset, unsigned char val)
134
{
135
#if 0
136
        printk("%s(%d): pcibios_write_config_byte(bus=%x,dev=%x,offset=%x)\n",
137
                __FILE__, __LINE__, bus, dev, offset);
138
#endif
139
        return(PCIBIOS_SUCCESSFUL);
140
}
141
 
142
/*****************************************************************************/
143
 
144
int pcibios_find_device(unsigned short vendor, unsigned short devid,
145
        unsigned short index, unsigned char *bus, unsigned char *dev)
146
{
147
        unsigned int    vendev, val;
148
        unsigned char   devnr;
149
 
150
#if 0
151
        printk("%s(%d): pcibios_find_device(vendor=%04x,devid=%04x,"
152
                "index=%d)\n", __FILE__, __LINE__, vendor, devid, index);
153
#endif
154
 
155
        if (vendor == 0xffff)
156
                return(PCIBIOS_BAD_VENDOR_ID);
157
 
158
        vendev = (devid << 16) | vendor;
159
        for (devnr = 0; (devnr < 32); devnr++) {
160
                pcibios_read_config_dword(0, devnr, PCI_VENDOR_ID, &val);
161
                if (vendev == val) {
162
                        if (index-- == 0) {
163
                                *bus = 0;
164
                                *dev = devnr;
165
                                return(PCIBIOS_SUCCESSFUL);
166
                        }
167
                }
168
        }
169
 
170
        return(PCIBIOS_DEVICE_NOT_FOUND);
171
}
172
 
173
/*****************************************************************************/
174
 
175
int pcibios_find_class(unsigned int class, unsigned short index,
176
        unsigned char *bus, unsigned char *dev)
177
{
178
        unsigned int    val;
179
        unsigned char   devnr;
180
 
181
#if 0
182
        printk("%s(%d): pcibios_find_class(class=%04x,index=%d)\n",
183
                __FILE__, __LINE__, class, index);
184
#endif
185
 
186
        for (devnr = 0; (devnr < 32); devnr++) {
187
                pcibios_read_config_dword(0, devnr, PCI_CLASS_REVISION, &val);
188
                if ((val >> 8) == class) {
189
                        if (index-- == 0) {
190
                                *bus = 0;
191
                                *dev = devnr;
192
                                return(PCIBIOS_SUCCESSFUL);
193
                        }
194
                }
195
        }
196
 
197
        return(PCIBIOS_DEVICE_NOT_FOUND);
198
}
199
 
200
/*****************************************************************************/
201
#endif  /* CONFIG_PCI */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.