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[/] [or1k/] [trunk/] [uclinux/] [uClinux-2.0.x/] [drivers/] [isdn/] [hisax/] [ix1_micro.c] - Blame information for rev 199

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1 199 simons
/* $Id: ix1_micro.c,v 1.1.1.1 2001-09-10 07:44:18 simons Exp $
2
 
3
 * ix1_micro.c  low level stuff for ITK ix1-micro Rev.2 isdn cards
4
 *              derived from the original file teles3.c from Karsten Keil
5
 *
6
 * Copyright (C) 1997 Klaus-Peter Nischke (ITK AG) (for the modifications to
7
 *                                                  the original file teles.c)
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 *
9
 * Thanks to    Jan den Ouden
10
 *              Fritz Elfert
11
 *              Beat Doebeli
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 *
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 * $Log: not supported by cvs2svn $
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 * Revision 1.1.1.1  2001/07/02 17:58:32  simons
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 * Initial revision
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 *
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 * Revision 1.3.2.8  1998/04/08 21:58:41  keil
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 * New init code
19
 *
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 * Revision 1.3.2.7  1998/02/11 14:21:01  keil
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 * cosmetic fixes
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 *
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 * Revision 1.3.2.6  1998/01/27 22:37:33  keil
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 * fast io
25
 *
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 * Revision 1.3.2.5  1997/11/15 18:50:51  keil
27
 * new common init function
28
 *
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 * Revision 1.3.2.4  1997/10/17 22:14:09  keil
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 * update to last hisax version
31
 *
32
 * Revision 2.1  1997/07/27 21:47:09  keil
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 * new interface structures
34
 *
35
 * Revision 2.0  1997/06/26 11:02:50  keil
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 * New Layer and card interface
37
 *
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 * Revision 1.3  1997/04/13 19:54:02  keil
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 * Change in IRQ check delay for SMP
40
 *
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 * Revision 1.2  1997/04/06 22:54:21  keil
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 * Using SKB's
43
 *
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 * Revision 1.1  1997/01/27 15:43:10  keil
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 * first version
46
 *
47
 *
48
 */
49
 
50
/*
51
   For the modification done by the author the following terms and conditions
52
   apply (GNU PUBLIC LICENSE)
53
 
54
 
55
   This program is free software; you can redistribute it and/or modify
56
   it under the terms of the GNU General Public License as published by
57
   the Free Software Foundation; either version 2 of the License, or
58
   (at your option) any later version.
59
 
60
   This program is distributed in the hope that it will be useful,
61
   but WITHOUT ANY WARRANTY; without even the implied warranty of
62
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
63
   GNU General Public License for more details.
64
 
65
   You should have received a copy of the GNU General Public License
66
   along with this program; if not, write to the Free Software
67
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
68
 
69
 
70
   You may contact Klaus-Peter Nischke by email: klaus@nischke.do.eunet.de
71
   or by conventional mail:
72
 
73
   Klaus-Peter Nischke
74
   Deusener Str. 287
75
   44369 Dortmund
76
   Germany
77
 */
78
 
79
 
80
#define __NO_VERSION__
81
#include "hisax.h"
82
#include "isac.h"
83
#include "hscx.h"
84
#include "isdnl1.h"
85
 
86
extern const char *CardType[];
87
const char *ix1_revision = "$Revision: 1.1.1.1 $";
88
 
89
#define byteout(addr,val) outb(val,addr)
90
#define bytein(addr) inb(addr)
91
 
92
#define SPECIAL_PORT_OFFSET 3
93
 
94
#define ISAC_COMMAND_OFFSET 2
95
#define ISAC_DATA_OFFSET 0
96
#define HSCX_COMMAND_OFFSET 2
97
#define HSCX_DATA_OFFSET 1
98
 
99
#define TIMEOUT 50
100
 
101
static inline u_char
102
readreg(unsigned int ale, unsigned int adr, u_char off)
103
{
104
        register u_char ret;
105
        long flags;
106
 
107
        save_flags(flags);
108
        cli();
109
        byteout(ale, off);
110
        ret = bytein(adr);
111
        restore_flags(flags);
112
        return (ret);
113
}
114
 
115
static inline void
116
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
117
{
118
        /* fifo read without cli because it's allready done  */
119
 
120
        byteout(ale, off);
121
        insb(adr, data, size);
122
}
123
 
124
 
125
static inline void
126
writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
127
{
128
        long flags;
129
 
130
        save_flags(flags);
131
        cli();
132
        byteout(ale, off);
133
        byteout(adr, data);
134
        restore_flags(flags);
135
}
136
 
137
static inline void
138
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
139
{
140
        /* fifo write without cli because it's allready done  */
141
        byteout(ale, off);
142
        outsb(adr, data, size);
143
}
144
 
145
/* Interface functions */
146
 
147
static u_char
148
ReadISAC(struct IsdnCardState *cs, u_char offset)
149
{
150
        return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset));
151
}
152
 
153
static void
154
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
155
{
156
        writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset, value);
157
}
158
 
159
static void
160
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
161
{
162
        readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
163
}
164
 
165
static void
166
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
167
{
168
        writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
169
}
170
 
171
static u_char
172
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
173
{
174
        return (readreg(cs->hw.ix1.hscx_ale,
175
                        cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0)));
176
}
177
 
178
static void
179
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
180
{
181
        writereg(cs->hw.ix1.hscx_ale,
182
                 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value);
183
}
184
 
185
#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
186
                cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))
187
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \
188
                cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)
189
 
190
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \
191
                cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
192
 
193
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \
194
                cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
195
 
196
#include "hscx_irq.c"
197
 
198
static void
199
ix1micro_interrupt(int intno, void *dev_id, struct pt_regs *regs)
200
{
201
        struct IsdnCardState *cs = dev_id;
202
        u_char val, stat = 0;
203
 
204
        if (!cs) {
205
                printk(KERN_WARNING "IX1: Spurious interrupt!\n");
206
                return;
207
        }
208
        val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
209
      Start_HSCX:
210
        if (val) {
211
                hscx_int_main(cs, val);
212
                stat |= 1;
213
        }
214
        val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
215
      Start_ISAC:
216
        if (val) {
217
                isac_interrupt(cs, val);
218
                stat |= 2;
219
        }
220
        val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
221
        if (val) {
222
                if (cs->debug & L1_DEB_HSCX)
223
                        debugl1(cs, "HSCX IntStat after IntRoutine");
224
                goto Start_HSCX;
225
        }
226
        val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
227
        if (val) {
228
                if (cs->debug & L1_DEB_ISAC)
229
                        debugl1(cs, "ISAC IntStat after IntRoutine");
230
                goto Start_ISAC;
231
        }
232
        if (stat & 1) {
233
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0xFF);
234
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0xFF);
235
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK, 0);
236
                writereg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0);
237
        }
238
        if (stat & 2) {
239
                writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0xFF);
240
                writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0);
241
        }
242
}
243
 
244
void
245
release_io_ix1micro(struct IsdnCardState *cs)
246
{
247
        if (cs->hw.ix1.cfg_reg)
248
                release_region(cs->hw.ix1.cfg_reg, 4);
249
}
250
 
251
static void
252
ix1_reset(struct IsdnCardState *cs)
253
{
254
        long flags;
255
        int cnt;
256
 
257
        /* reset isac */
258
        save_flags(flags);
259
        cnt = 3 * (HZ / 10) + 1;
260
        sti();
261
        while (cnt--) {
262
                byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 1);
263
                HZDELAY(1);     /* wait >=10 ms */
264
        }
265
        byteout(cs->hw.ix1.cfg_reg + SPECIAL_PORT_OFFSET, 0);
266
        restore_flags(flags);
267
}
268
 
269
static int
270
ix1_card_msg(struct IsdnCardState *cs, int mt, void *arg)
271
{
272
        switch (mt) {
273
                case CARD_RESET:
274
                        ix1_reset(cs);
275
                        return(0);
276
                case CARD_RELEASE:
277
                        release_io_ix1micro(cs);
278
                        return(0);
279
                case CARD_SETIRQ:
280
                        return(request_irq(cs->irq, &ix1micro_interrupt,
281
                                        I4L_IRQ_FLAG, "HiSax", cs));
282
                case CARD_INIT:
283
                        inithscxisac(cs, 3);
284
                        return(0);
285
                case CARD_TEST:
286
                        return(0);
287
        }
288
        return(0);
289
}
290
 
291
 
292
__initfunc(int
293
setup_ix1micro(struct IsdnCard *card))
294
{
295
        struct IsdnCardState *cs = card->cs;
296
        char tmp[64];
297
 
298
        strcpy(tmp, ix1_revision);
299
        printk(KERN_INFO "HiSax: ITK IX1 driver Rev. %s\n", HiSax_getrev(tmp));
300
        if (cs->typ != ISDN_CTYPE_IX1MICROR2)
301
                return (0);
302
 
303
        /* IO-Ports */
304
        cs->hw.ix1.isac_ale = card->para[1] + ISAC_COMMAND_OFFSET;
305
        cs->hw.ix1.hscx_ale = card->para[1] + HSCX_COMMAND_OFFSET;
306
        cs->hw.ix1.isac = card->para[1] + ISAC_DATA_OFFSET;
307
        cs->hw.ix1.hscx = card->para[1] + HSCX_DATA_OFFSET;
308
        cs->hw.ix1.cfg_reg = card->para[1];
309
        cs->irq = card->para[0];
310
        if (cs->hw.ix1.cfg_reg) {
311
                if (check_region((cs->hw.ix1.cfg_reg), 4)) {
312
                        printk(KERN_WARNING
313
                          "HiSax: %s config port %x-%x already in use\n",
314
                               CardType[card->typ],
315
                               cs->hw.ix1.cfg_reg,
316
                               cs->hw.ix1.cfg_reg + 4);
317
                        return (0);
318
                } else
319
                        request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg");
320
        }
321
        printk(KERN_INFO
322
               "HiSax: %s config irq:%d io:0x%X\n",
323
               CardType[cs->typ], cs->irq,
324
               cs->hw.ix1.cfg_reg);
325
        ix1_reset(cs);
326
        cs->readisac = &ReadISAC;
327
        cs->writeisac = &WriteISAC;
328
        cs->readisacfifo = &ReadISACfifo;
329
        cs->writeisacfifo = &WriteISACfifo;
330
        cs->BC_Read_Reg = &ReadHSCX;
331
        cs->BC_Write_Reg = &WriteHSCX;
332
        cs->BC_Send_Data = &hscx_fill_fifo;
333
        cs->cardmsg = &ix1_card_msg;
334
        ISACVersion(cs, "ix1-Micro:");
335
        if (HscxVersion(cs, "ix1-Micro:")) {
336
                printk(KERN_WARNING
337
                    "ix1-Micro: wrong HSCX versions check IO address\n");
338
                release_io_ix1micro(cs);
339
                return (0);
340
        }
341
        return (1);
342
}

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