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[/] [or1k_old/] [tags/] [tn_m001/] [gdb-5.0/] [sim/] [fr30/] [model.c] - Blame information for rev 861

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1 106 markom 
/* Simulator model support for fr30bf.
2 
 
3 
THIS FILE IS MACHINE GENERATED WITH CGEN.
4 
 
5 
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6 
 
7 
This file is part of the GNU Simulators.
8 
 
9 
This program is free software; you can redistribute it and/or modify
10 
it under the terms of the GNU General Public License as published by
11 
the Free Software Foundation; either version 2, or (at your option)
12 
any later version.
13 
 
14 
This program is distributed in the hope that it will be useful,
15 
but WITHOUT ANY WARRANTY; without even the implied warranty of
16 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 
GNU General Public License for more details.
18 
 
19 
You should have received a copy of the GNU General Public License along
20 
with this program; if not, write to the Free Software Foundation, Inc.,
21 
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 
 
23 
*/
24 
 
25 
#define WANT_CPU fr30bf
26 
#define WANT_CPU_FR30BF
27 
 
28 
#include "sim-main.h"
29 
 
30 
/* The profiling data is recorded here, but is accessed via the profiling
31 
   mechanism.  After all, this is information for profiling.  */
32 
 
33 
#if WITH_PROFILE_MODEL_P
34 
 
35 
/* Model handlers for each insn.  */
36 
 
37 
static int
38 
model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg)
39 
{
40 
#define FLD(f) abuf->fields.sfmt_add.f
41 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
42 
  const IDESC * UNUSED idesc = abuf->idesc;
43 
  int cycles = 0;
44 
  {
45 
    int referenced = 0;
46 
    int UNUSED insn_referenced = abuf->written;
47 
    INT in_Ri = -1;
48 
    INT in_Rj = -1;
49 
    INT out_Ri = -1;
50 
    in_Ri = FLD (in_Ri);
51 
    in_Rj = FLD (in_Rj);
52 
    out_Ri = FLD (out_Ri);
53 
    referenced |= 1 << 0;
54 
    referenced |= 1 << 1;
55 
    referenced |= 1 << 2;
56 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
57 
  }
58 
  return cycles;
59 
#undef FLD
60 
}
61 
 
62 
static int
63 
model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg)
64 
{
65 
#define FLD(f) abuf->fields.sfmt_addi.f
66 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
67 
  const IDESC * UNUSED idesc = abuf->idesc;
68 
  int cycles = 0;
69 
  {
70 
    int referenced = 0;
71 
    int UNUSED insn_referenced = abuf->written;
72 
    INT in_Ri = -1;
73 
    INT in_Rj = -1;
74 
    INT out_Ri = -1;
75 
    in_Ri = FLD (in_Ri);
76 
    out_Ri = FLD (out_Ri);
77 
    referenced |= 1 << 0;
78 
    referenced |= 1 << 2;
79 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
80 
  }
81 
  return cycles;
82 
#undef FLD
83 
}
84 
 
85 
static int
86 
model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg)
87 
{
88 
#define FLD(f) abuf->fields.sfmt_add2.f
89 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
90 
  const IDESC * UNUSED idesc = abuf->idesc;
91 
  int cycles = 0;
92 
  {
93 
    int referenced = 0;
94 
    int UNUSED insn_referenced = abuf->written;
95 
    INT in_Ri = -1;
96 
    INT in_Rj = -1;
97 
    INT out_Ri = -1;
98 
    in_Ri = FLD (in_Ri);
99 
    out_Ri = FLD (out_Ri);
100 
    referenced |= 1 << 0;
101 
    referenced |= 1 << 2;
102 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
103 
  }
104 
  return cycles;
105 
#undef FLD
106 
}
107 
 
108 
static int
109 
model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg)
110 
{
111 
#define FLD(f) abuf->fields.sfmt_add.f
112 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
113 
  const IDESC * UNUSED idesc = abuf->idesc;
114 
  int cycles = 0;
115 
  {
116 
    int referenced = 0;
117 
    int UNUSED insn_referenced = abuf->written;
118 
    INT in_Ri = -1;
119 
    INT in_Rj = -1;
120 
    INT out_Ri = -1;
121 
    in_Ri = FLD (in_Ri);
122 
    in_Rj = FLD (in_Rj);
123 
    out_Ri = FLD (out_Ri);
124 
    referenced |= 1 << 0;
125 
    referenced |= 1 << 1;
126 
    referenced |= 1 << 2;
127 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
128 
  }
129 
  return cycles;
130 
#undef FLD
131 
}
132 
 
133 
static int
134 
model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg)
135 
{
136 
#define FLD(f) abuf->fields.sfmt_add.f
137 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
138 
  const IDESC * UNUSED idesc = abuf->idesc;
139 
  int cycles = 0;
140 
  {
141 
    int referenced = 0;
142 
    int UNUSED insn_referenced = abuf->written;
143 
    INT in_Ri = -1;
144 
    INT in_Rj = -1;
145 
    INT out_Ri = -1;
146 
    in_Ri = FLD (in_Ri);
147 
    in_Rj = FLD (in_Rj);
148 
    out_Ri = FLD (out_Ri);
149 
    referenced |= 1 << 0;
150 
    referenced |= 1 << 1;
151 
    referenced |= 1 << 2;
152 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
153 
  }
154 
  return cycles;
155 
#undef FLD
156 
}
157 
 
158 
static int
159 
model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg)
160 
{
161 
#define FLD(f) abuf->fields.sfmt_addi.f
162 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
163 
  const IDESC * UNUSED idesc = abuf->idesc;
164 
  int cycles = 0;
165 
  {
166 
    int referenced = 0;
167 
    int UNUSED insn_referenced = abuf->written;
168 
    INT in_Ri = -1;
169 
    INT in_Rj = -1;
170 
    INT out_Ri = -1;
171 
    in_Ri = FLD (in_Ri);
172 
    out_Ri = FLD (out_Ri);
173 
    referenced |= 1 << 0;
174 
    referenced |= 1 << 2;
175 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
176 
  }
177 
  return cycles;
178 
#undef FLD
179 
}
180 
 
181 
static int
182 
model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg)
183 
{
184 
#define FLD(f) abuf->fields.sfmt_add2.f
185 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
186 
  const IDESC * UNUSED idesc = abuf->idesc;
187 
  int cycles = 0;
188 
  {
189 
    int referenced = 0;
190 
    int UNUSED insn_referenced = abuf->written;
191 
    INT in_Ri = -1;
192 
    INT in_Rj = -1;
193 
    INT out_Ri = -1;
194 
    in_Ri = FLD (in_Ri);
195 
    out_Ri = FLD (out_Ri);
196 
    referenced |= 1 << 0;
197 
    referenced |= 1 << 2;
198 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
199 
  }
200 
  return cycles;
201 
#undef FLD
202 
}
203 
 
204 
static int
205 
model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg)
206 
{
207 
#define FLD(f) abuf->fields.sfmt_add.f
208 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
209 
  const IDESC * UNUSED idesc = abuf->idesc;
210 
  int cycles = 0;
211 
  {
212 
    int referenced = 0;
213 
    int UNUSED insn_referenced = abuf->written;
214 
    INT in_Ri = -1;
215 
    INT in_Rj = -1;
216 
    INT out_Ri = -1;
217 
    in_Ri = FLD (in_Ri);
218 
    in_Rj = FLD (in_Rj);
219 
    out_Ri = FLD (out_Ri);
220 
    referenced |= 1 << 0;
221 
    referenced |= 1 << 1;
222 
    referenced |= 1 << 2;
223 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
224 
  }
225 
  return cycles;
226 
#undef FLD
227 
}
228 
 
229 
static int
230 
model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg)
231 
{
232 
#define FLD(f) abuf->fields.sfmt_add.f
233 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
234 
  const IDESC * UNUSED idesc = abuf->idesc;
235 
  int cycles = 0;
236 
  {
237 
    int referenced = 0;
238 
    int UNUSED insn_referenced = abuf->written;
239 
    INT in_Ri = -1;
240 
    INT in_Rj = -1;
241 
    INT out_Ri = -1;
242 
    in_Ri = FLD (in_Ri);
243 
    in_Rj = FLD (in_Rj);
244 
    out_Ri = FLD (out_Ri);
245 
    referenced |= 1 << 0;
246 
    referenced |= 1 << 1;
247 
    referenced |= 1 << 2;
248 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
249 
  }
250 
  return cycles;
251 
#undef FLD
252 
}
253 
 
254 
static int
255 
model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg)
256 
{
257 
#define FLD(f) abuf->fields.sfmt_add.f
258 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
259 
  const IDESC * UNUSED idesc = abuf->idesc;
260 
  int cycles = 0;
261 
  {
262 
    int referenced = 0;
263 
    int UNUSED insn_referenced = abuf->written;
264 
    INT in_Ri = -1;
265 
    INT in_Rj = -1;
266 
    INT out_Ri = -1;
267 
    in_Ri = FLD (in_Ri);
268 
    in_Rj = FLD (in_Rj);
269 
    out_Ri = FLD (out_Ri);
270 
    referenced |= 1 << 0;
271 
    referenced |= 1 << 1;
272 
    referenced |= 1 << 2;
273 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
274 
  }
275 
  return cycles;
276 
#undef FLD
277 
}
278 
 
279 
static int
280 
model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg)
281 
{
282 
#define FLD(f) abuf->fields.sfmt_str13.f
283 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
284 
  const IDESC * UNUSED idesc = abuf->idesc;
285 
  int cycles = 0;
286 
  {
287 
    int referenced = 0;
288 
    int UNUSED insn_referenced = abuf->written;
289 
    INT in_Ri = -1;
290 
    INT in_Rj = -1;
291 
    INT out_Ri = -1;
292 
    in_Ri = FLD (in_Ri);
293 
    in_Rj = FLD (in_Rj);
294 
    referenced |= 1 << 0;
295 
    referenced |= 1 << 1;
296 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
297 
  }
298 
  return cycles;
299 
#undef FLD
300 
}
301 
 
302 
static int
303 
model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg)
304 
{
305 
#define FLD(f) abuf->fields.sfmt_addi.f
306 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
307 
  const IDESC * UNUSED idesc = abuf->idesc;
308 
  int cycles = 0;
309 
  {
310 
    int referenced = 0;
311 
    int UNUSED insn_referenced = abuf->written;
312 
    INT in_Ri = -1;
313 
    INT in_Rj = -1;
314 
    INT out_Ri = -1;
315 
    in_Ri = FLD (in_Ri);
316 
    referenced |= 1 << 0;
317 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
318 
  }
319 
  return cycles;
320 
#undef FLD
321 
}
322 
 
323 
static int
324 
model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg)
325 
{
326 
#define FLD(f) abuf->fields.sfmt_add2.f
327 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
328 
  const IDESC * UNUSED idesc = abuf->idesc;
329 
  int cycles = 0;
330 
  {
331 
    int referenced = 0;
332 
    int UNUSED insn_referenced = abuf->written;
333 
    INT in_Ri = -1;
334 
    INT in_Rj = -1;
335 
    INT out_Ri = -1;
336 
    in_Ri = FLD (in_Ri);
337 
    referenced |= 1 << 0;
338 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
339 
  }
340 
  return cycles;
341 
#undef FLD
342 
}
343 
 
344 
static int
345 
model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg)
346 
{
347 
#define FLD(f) abuf->fields.sfmt_add.f
348 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
349 
  const IDESC * UNUSED idesc = abuf->idesc;
350 
  int cycles = 0;
351 
  {
352 
    int referenced = 0;
353 
    int UNUSED insn_referenced = abuf->written;
354 
    INT in_Ri = -1;
355 
    INT in_Rj = -1;
356 
    INT out_Ri = -1;
357 
    in_Ri = FLD (in_Ri);
358 
    in_Rj = FLD (in_Rj);
359 
    out_Ri = FLD (out_Ri);
360 
    referenced |= 1 << 0;
361 
    referenced |= 1 << 1;
362 
    referenced |= 1 << 2;
363 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
364 
  }
365 
  return cycles;
366 
#undef FLD
367 
}
368 
 
369 
static int
370 
model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg)
371 
{
372 
#define FLD(f) abuf->fields.sfmt_add.f
373 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
374 
  const IDESC * UNUSED idesc = abuf->idesc;
375 
  int cycles = 0;
376 
  {
377 
    int referenced = 0;
378 
    int UNUSED insn_referenced = abuf->written;
379 
    INT in_Ri = -1;
380 
    INT in_Rj = -1;
381 
    INT out_Ri = -1;
382 
    in_Ri = FLD (in_Ri);
383 
    in_Rj = FLD (in_Rj);
384 
    out_Ri = FLD (out_Ri);
385 
    referenced |= 1 << 0;
386 
    referenced |= 1 << 1;
387 
    referenced |= 1 << 2;
388 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
389 
  }
390 
  return cycles;
391 
#undef FLD
392 
}
393 
 
394 
static int
395 
model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg)
396 
{
397 
#define FLD(f) abuf->fields.sfmt_add.f
398 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
399 
  const IDESC * UNUSED idesc = abuf->idesc;
400 
  int cycles = 0;
401 
  {
402 
    int referenced = 0;
403 
    int UNUSED insn_referenced = abuf->written;
404 
    INT in_Ri = -1;
405 
    INT in_Rj = -1;
406 
    INT out_Ri = -1;
407 
    in_Ri = FLD (in_Ri);
408 
    in_Rj = FLD (in_Rj);
409 
    out_Ri = FLD (out_Ri);
410 
    referenced |= 1 << 0;
411 
    referenced |= 1 << 1;
412 
    referenced |= 1 << 2;
413 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
414 
  }
415 
  return cycles;
416 
#undef FLD
417 
}
418 
 
419 
static int
420 
model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg)
421 
{
422 
#define FLD(f) abuf->fields.sfmt_str13.f
423 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
424 
  const IDESC * UNUSED idesc = abuf->idesc;
425 
  int cycles = 0;
426 
  {
427 
    int referenced = 0;
428 
    int UNUSED insn_referenced = abuf->written;
429 
    INT in_Ri = -1;
430 
    INT in_Rj = -1;
431 
    INT out_Ri = -1;
432 
    in_Ri = FLD (in_Ri);
433 
    in_Rj = FLD (in_Rj);
434 
    referenced |= 1 << 0;
435 
    referenced |= 1 << 1;
436 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
437 
  }
438 
  {
439 
    int referenced = 0;
440 
    int UNUSED insn_referenced = abuf->written;
441 
    INT in_Rj = -1;
442 
    INT out_Ri = -1;
443 
    in_Rj = FLD (in_Rj);
444 
    referenced |= 1 << 0;
445 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
446 
  }
447 
  {
448 
    int referenced = 0;
449 
    int UNUSED insn_referenced = abuf->written;
450 
    INT in_Ri = -1;
451 
    INT in_Rj = -1;
452 
    in_Ri = FLD (in_Ri);
453 
    in_Rj = FLD (in_Rj);
454 
    referenced |= 1 << 0;
455 
    referenced |= 1 << 1;
456 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
457 
  }
458 
  return cycles;
459 
#undef FLD
460 
}
461 
 
462 
static int
463 
model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg)
464 
{
465 
#define FLD(f) abuf->fields.sfmt_str13.f
466 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
467 
  const IDESC * UNUSED idesc = abuf->idesc;
468 
  int cycles = 0;
469 
  {
470 
    int referenced = 0;
471 
    int UNUSED insn_referenced = abuf->written;
472 
    INT in_Ri = -1;
473 
    INT in_Rj = -1;
474 
    INT out_Ri = -1;
475 
    in_Ri = FLD (in_Ri);
476 
    in_Rj = FLD (in_Rj);
477 
    referenced |= 1 << 0;
478 
    referenced |= 1 << 1;
479 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
480 
  }
481 
  {
482 
    int referenced = 0;
483 
    int UNUSED insn_referenced = abuf->written;
484 
    INT in_Rj = -1;
485 
    INT out_Ri = -1;
486 
    in_Rj = FLD (in_Rj);
487 
    referenced |= 1 << 0;
488 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
489 
  }
490 
  {
491 
    int referenced = 0;
492 
    int UNUSED insn_referenced = abuf->written;
493 
    INT in_Ri = -1;
494 
    INT in_Rj = -1;
495 
    in_Ri = FLD (in_Ri);
496 
    in_Rj = FLD (in_Rj);
497 
    referenced |= 1 << 0;
498 
    referenced |= 1 << 1;
499 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
500 
  }
501 
  return cycles;
502 
#undef FLD
503 
}
504 
 
505 
static int
506 
model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg)
507 
{
508 
#define FLD(f) abuf->fields.sfmt_str13.f
509 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
510 
  const IDESC * UNUSED idesc = abuf->idesc;
511 
  int cycles = 0;
512 
  {
513 
    int referenced = 0;
514 
    int UNUSED insn_referenced = abuf->written;
515 
    INT in_Ri = -1;
516 
    INT in_Rj = -1;
517 
    INT out_Ri = -1;
518 
    in_Ri = FLD (in_Ri);
519 
    in_Rj = FLD (in_Rj);
520 
    referenced |= 1 << 0;
521 
    referenced |= 1 << 1;
522 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
523 
  }
524 
  {
525 
    int referenced = 0;
526 
    int UNUSED insn_referenced = abuf->written;
527 
    INT in_Rj = -1;
528 
    INT out_Ri = -1;
529 
    in_Rj = FLD (in_Rj);
530 
    referenced |= 1 << 0;
531 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
532 
  }
533 
  {
534 
    int referenced = 0;
535 
    int UNUSED insn_referenced = abuf->written;
536 
    INT in_Ri = -1;
537 
    INT in_Rj = -1;
538 
    in_Ri = FLD (in_Ri);
539 
    in_Rj = FLD (in_Rj);
540 
    referenced |= 1 << 0;
541 
    referenced |= 1 << 1;
542 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
543 
  }
544 
  return cycles;
545 
#undef FLD
546 
}
547 
 
548 
static int
549 
model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg)
550 
{
551 
#define FLD(f) abuf->fields.sfmt_str13.f
552 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
553 
  const IDESC * UNUSED idesc = abuf->idesc;
554 
  int cycles = 0;
555 
  {
556 
    int referenced = 0;
557 
    int UNUSED insn_referenced = abuf->written;
558 
    INT in_Ri = -1;
559 
    INT in_Rj = -1;
560 
    INT out_Ri = -1;
561 
    in_Ri = FLD (in_Ri);
562 
    in_Rj = FLD (in_Rj);
563 
    referenced |= 1 << 0;
564 
    referenced |= 1 << 1;
565 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
566 
  }
567 
  {
568 
    int referenced = 0;
569 
    int UNUSED insn_referenced = abuf->written;
570 
    INT in_Rj = -1;
571 
    INT out_Ri = -1;
572 
    in_Rj = FLD (in_Rj);
573 
    referenced |= 1 << 0;
574 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
575 
  }
576 
  {
577 
    int referenced = 0;
578 
    int UNUSED insn_referenced = abuf->written;
579 
    INT in_Ri = -1;
580 
    INT in_Rj = -1;
581 
    in_Ri = FLD (in_Ri);
582 
    in_Rj = FLD (in_Rj);
583 
    referenced |= 1 << 0;
584 
    referenced |= 1 << 1;
585 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
586 
  }
587 
  return cycles;
588 
#undef FLD
589 
}
590 
 
591 
static int
592 
model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg)
593 
{
594 
#define FLD(f) abuf->fields.sfmt_str13.f
595 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
596 
  const IDESC * UNUSED idesc = abuf->idesc;
597 
  int cycles = 0;
598 
  {
599 
    int referenced = 0;
600 
    int UNUSED insn_referenced = abuf->written;
601 
    INT in_Ri = -1;
602 
    INT in_Rj = -1;
603 
    INT out_Ri = -1;
604 
    in_Ri = FLD (in_Ri);
605 
    in_Rj = FLD (in_Rj);
606 
    referenced |= 1 << 0;
607 
    referenced |= 1 << 1;
608 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
609 
  }
610 
  {
611 
    int referenced = 0;
612 
    int UNUSED insn_referenced = abuf->written;
613 
    INT in_Rj = -1;
614 
    INT out_Ri = -1;
615 
    in_Rj = FLD (in_Rj);
616 
    referenced |= 1 << 0;
617 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
618 
  }
619 
  {
620 
    int referenced = 0;
621 
    int UNUSED insn_referenced = abuf->written;
622 
    INT in_Ri = -1;
623 
    INT in_Rj = -1;
624 
    in_Ri = FLD (in_Ri);
625 
    in_Rj = FLD (in_Rj);
626 
    referenced |= 1 << 0;
627 
    referenced |= 1 << 1;
628 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
629 
  }
630 
  return cycles;
631 
#undef FLD
632 
}
633 
 
634 
static int
635 
model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg)
636 
{
637 
#define FLD(f) abuf->fields.sfmt_str13.f
638 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
639 
  const IDESC * UNUSED idesc = abuf->idesc;
640 
  int cycles = 0;
641 
  {
642 
    int referenced = 0;
643 
    int UNUSED insn_referenced = abuf->written;
644 
    INT in_Ri = -1;
645 
    INT in_Rj = -1;
646 
    INT out_Ri = -1;
647 
    in_Ri = FLD (in_Ri);
648 
    in_Rj = FLD (in_Rj);
649 
    referenced |= 1 << 0;
650 
    referenced |= 1 << 1;
651 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
652 
  }
653 
  {
654 
    int referenced = 0;
655 
    int UNUSED insn_referenced = abuf->written;
656 
    INT in_Rj = -1;
657 
    INT out_Ri = -1;
658 
    in_Rj = FLD (in_Rj);
659 
    referenced |= 1 << 0;
660 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
661 
  }
662 
  {
663 
    int referenced = 0;
664 
    int UNUSED insn_referenced = abuf->written;
665 
    INT in_Ri = -1;
666 
    INT in_Rj = -1;
667 
    in_Ri = FLD (in_Ri);
668 
    in_Rj = FLD (in_Rj);
669 
    referenced |= 1 << 0;
670 
    referenced |= 1 << 1;
671 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
672 
  }
673 
  return cycles;
674 
#undef FLD
675 
}
676 
 
677 
static int
678 
model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg)
679 
{
680 
#define FLD(f) abuf->fields.sfmt_str13.f
681 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
682 
  const IDESC * UNUSED idesc = abuf->idesc;
683 
  int cycles = 0;
684 
  {
685 
    int referenced = 0;
686 
    int UNUSED insn_referenced = abuf->written;
687 
    INT in_Ri = -1;
688 
    INT in_Rj = -1;
689 
    INT out_Ri = -1;
690 
    in_Ri = FLD (in_Ri);
691 
    in_Rj = FLD (in_Rj);
692 
    referenced |= 1 << 0;
693 
    referenced |= 1 << 1;
694 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
695 
  }
696 
  {
697 
    int referenced = 0;
698 
    int UNUSED insn_referenced = abuf->written;
699 
    INT in_Rj = -1;
700 
    INT out_Ri = -1;
701 
    in_Rj = FLD (in_Rj);
702 
    referenced |= 1 << 0;
703 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
704 
  }
705 
  {
706 
    int referenced = 0;
707 
    int UNUSED insn_referenced = abuf->written;
708 
    INT in_Ri = -1;
709 
    INT in_Rj = -1;
710 
    in_Ri = FLD (in_Ri);
711 
    in_Rj = FLD (in_Rj);
712 
    referenced |= 1 << 0;
713 
    referenced |= 1 << 1;
714 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
715 
  }
716 
  return cycles;
717 
#undef FLD
718 
}
719 
 
720 
static int
721 
model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg)
722 
{
723 
#define FLD(f) abuf->fields.sfmt_str13.f
724 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
725 
  const IDESC * UNUSED idesc = abuf->idesc;
726 
  int cycles = 0;
727 
  {
728 
    int referenced = 0;
729 
    int UNUSED insn_referenced = abuf->written;
730 
    INT in_Ri = -1;
731 
    INT in_Rj = -1;
732 
    INT out_Ri = -1;
733 
    in_Ri = FLD (in_Ri);
734 
    in_Rj = FLD (in_Rj);
735 
    referenced |= 1 << 0;
736 
    referenced |= 1 << 1;
737 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
738 
  }
739 
  {
740 
    int referenced = 0;
741 
    int UNUSED insn_referenced = abuf->written;
742 
    INT in_Rj = -1;
743 
    INT out_Ri = -1;
744 
    in_Rj = FLD (in_Rj);
745 
    referenced |= 1 << 0;
746 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
747 
  }
748 
  {
749 
    int referenced = 0;
750 
    int UNUSED insn_referenced = abuf->written;
751 
    INT in_Ri = -1;
752 
    INT in_Rj = -1;
753 
    in_Ri = FLD (in_Ri);
754 
    in_Rj = FLD (in_Rj);
755 
    referenced |= 1 << 0;
756 
    referenced |= 1 << 1;
757 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
758 
  }
759 
  return cycles;
760 
#undef FLD
761 
}
762 
 
763 
static int
764 
model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg)
765 
{
766 
#define FLD(f) abuf->fields.sfmt_str13.f
767 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
768 
  const IDESC * UNUSED idesc = abuf->idesc;
769 
  int cycles = 0;
770 
  {
771 
    int referenced = 0;
772 
    int UNUSED insn_referenced = abuf->written;
773 
    INT in_Ri = -1;
774 
    INT in_Rj = -1;
775 
    INT out_Ri = -1;
776 
    in_Ri = FLD (in_Ri);
777 
    in_Rj = FLD (in_Rj);
778 
    referenced |= 1 << 0;
779 
    referenced |= 1 << 1;
780 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
781 
  }
782 
  {
783 
    int referenced = 0;
784 
    int UNUSED insn_referenced = abuf->written;
785 
    INT in_Rj = -1;
786 
    INT out_Ri = -1;
787 
    in_Rj = FLD (in_Rj);
788 
    referenced |= 1 << 0;
789 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
790 
  }
791 
  {
792 
    int referenced = 0;
793 
    int UNUSED insn_referenced = abuf->written;
794 
    INT in_Ri = -1;
795 
    INT in_Rj = -1;
796 
    in_Ri = FLD (in_Ri);
797 
    in_Rj = FLD (in_Rj);
798 
    referenced |= 1 << 0;
799 
    referenced |= 1 << 1;
800 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
801 
  }
802 
  return cycles;
803 
#undef FLD
804 
}
805 
 
806 
static int
807 
model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg)
808 
{
809 
#define FLD(f) abuf->fields.sfmt_addi.f
810 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
811 
  const IDESC * UNUSED idesc = abuf->idesc;
812 
  int cycles = 0;
813 
  {
814 
    int referenced = 0;
815 
    int UNUSED insn_referenced = abuf->written;
816 
    INT in_Ri = -1;
817 
    INT in_Rj = -1;
818 
    INT out_Ri = -1;
819 
    in_Ri = FLD (in_Ri);
820 
    referenced |= 1 << 0;
821 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
822 
  }
823 
  {
824 
    int referenced = 0;
825 
    int UNUSED insn_referenced = abuf->written;
826 
    INT in_Rj = -1;
827 
    INT out_Ri = -1;
828 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
829 
  }
830 
  {
831 
    int referenced = 0;
832 
    int UNUSED insn_referenced = abuf->written;
833 
    INT in_Ri = -1;
834 
    INT in_Rj = -1;
835 
    in_Ri = FLD (in_Ri);
836 
    referenced |= 1 << 0;
837 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
838 
  }
839 
  return cycles;
840 
#undef FLD
841 
}
842 
 
843 
static int
844 
model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg)
845 
{
846 
#define FLD(f) abuf->fields.sfmt_addi.f
847 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
848 
  const IDESC * UNUSED idesc = abuf->idesc;
849 
  int cycles = 0;
850 
  {
851 
    int referenced = 0;
852 
    int UNUSED insn_referenced = abuf->written;
853 
    INT in_Ri = -1;
854 
    INT in_Rj = -1;
855 
    INT out_Ri = -1;
856 
    in_Ri = FLD (in_Ri);
857 
    referenced |= 1 << 0;
858 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
859 
  }
860 
  {
861 
    int referenced = 0;
862 
    int UNUSED insn_referenced = abuf->written;
863 
    INT in_Rj = -1;
864 
    INT out_Ri = -1;
865 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
866 
  }
867 
  {
868 
    int referenced = 0;
869 
    int UNUSED insn_referenced = abuf->written;
870 
    INT in_Ri = -1;
871 
    INT in_Rj = -1;
872 
    in_Ri = FLD (in_Ri);
873 
    referenced |= 1 << 0;
874 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
875 
  }
876 
  return cycles;
877 
#undef FLD
878 
}
879 
 
880 
static int
881 
model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg)
882 
{
883 
#define FLD(f) abuf->fields.sfmt_addi.f
884 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
885 
  const IDESC * UNUSED idesc = abuf->idesc;
886 
  int cycles = 0;
887 
  {
888 
    int referenced = 0;
889 
    int UNUSED insn_referenced = abuf->written;
890 
    INT in_Ri = -1;
891 
    INT in_Rj = -1;
892 
    INT out_Ri = -1;
893 
    in_Ri = FLD (in_Ri);
894 
    referenced |= 1 << 0;
895 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
896 
  }
897 
  {
898 
    int referenced = 0;
899 
    int UNUSED insn_referenced = abuf->written;
900 
    INT in_Rj = -1;
901 
    INT out_Ri = -1;
902 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
903 
  }
904 
  {
905 
    int referenced = 0;
906 
    int UNUSED insn_referenced = abuf->written;
907 
    INT in_Ri = -1;
908 
    INT in_Rj = -1;
909 
    in_Ri = FLD (in_Ri);
910 
    referenced |= 1 << 0;
911 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
912 
  }
913 
  return cycles;
914 
#undef FLD
915 
}
916 
 
917 
static int
918 
model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg)
919 
{
920 
#define FLD(f) abuf->fields.sfmt_addi.f
921 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
922 
  const IDESC * UNUSED idesc = abuf->idesc;
923 
  int cycles = 0;
924 
  {
925 
    int referenced = 0;
926 
    int UNUSED insn_referenced = abuf->written;
927 
    INT in_Ri = -1;
928 
    INT in_Rj = -1;
929 
    INT out_Ri = -1;
930 
    in_Ri = FLD (in_Ri);
931 
    referenced |= 1 << 0;
932 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
933 
  }
934 
  {
935 
    int referenced = 0;
936 
    int UNUSED insn_referenced = abuf->written;
937 
    INT in_Rj = -1;
938 
    INT out_Ri = -1;
939 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
940 
  }
941 
  {
942 
    int referenced = 0;
943 
    int UNUSED insn_referenced = abuf->written;
944 
    INT in_Ri = -1;
945 
    INT in_Rj = -1;
946 
    in_Ri = FLD (in_Ri);
947 
    referenced |= 1 << 0;
948 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
949 
  }
950 
  return cycles;
951 
#undef FLD
952 
}
953 
 
954 
static int
955 
model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg)
956 
{
957 
#define FLD(f) abuf->fields.sfmt_addi.f
958 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
959 
  const IDESC * UNUSED idesc = abuf->idesc;
960 
  int cycles = 0;
961 
  {
962 
    int referenced = 0;
963 
    int UNUSED insn_referenced = abuf->written;
964 
    INT in_Ri = -1;
965 
    INT in_Rj = -1;
966 
    INT out_Ri = -1;
967 
    in_Ri = FLD (in_Ri);
968 
    referenced |= 1 << 0;
969 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
970 
  }
971 
  {
972 
    int referenced = 0;
973 
    int UNUSED insn_referenced = abuf->written;
974 
    INT in_Rj = -1;
975 
    INT out_Ri = -1;
976 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
977 
  }
978 
  {
979 
    int referenced = 0;
980 
    int UNUSED insn_referenced = abuf->written;
981 
    INT in_Ri = -1;
982 
    INT in_Rj = -1;
983 
    in_Ri = FLD (in_Ri);
984 
    referenced |= 1 << 0;
985 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
986 
  }
987 
  return cycles;
988 
#undef FLD
989 
}
990 
 
991 
static int
992 
model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg)
993 
{
994 
#define FLD(f) abuf->fields.sfmt_addi.f
995 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
996 
  const IDESC * UNUSED idesc = abuf->idesc;
997 
  int cycles = 0;
998 
  {
999 
    int referenced = 0;
1000 
    int UNUSED insn_referenced = abuf->written;
1001 
    INT in_Ri = -1;
1002 
    INT in_Rj = -1;
1003 
    INT out_Ri = -1;
1004 
    in_Ri = FLD (in_Ri);
1005 
    referenced |= 1 << 0;
1006 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1007 
  }
1008 
  {
1009 
    int referenced = 0;
1010 
    int UNUSED insn_referenced = abuf->written;
1011 
    INT in_Rj = -1;
1012 
    INT out_Ri = -1;
1013 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
1014 
  }
1015 
  {
1016 
    int referenced = 0;
1017 
    int UNUSED insn_referenced = abuf->written;
1018 
    INT in_Ri = -1;
1019 
    INT in_Rj = -1;
1020 
    in_Ri = FLD (in_Ri);
1021 
    referenced |= 1 << 0;
1022 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
1023 
  }
1024 
  return cycles;
1025 
#undef FLD
1026 
}
1027 
 
1028 
static int
1029 
model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg)
1030 
{
1031 
#define FLD(f) abuf->fields.sfmt_addi.f
1032 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1033 
  const IDESC * UNUSED idesc = abuf->idesc;
1034 
  int cycles = 0;
1035 
  {
1036 
    int referenced = 0;
1037 
    int UNUSED insn_referenced = abuf->written;
1038 
    INT in_Rj = -1;
1039 
    INT out_Ri = -1;
1040 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1041 
  }
1042 
  {
1043 
    int referenced = 0;
1044 
    int UNUSED insn_referenced = abuf->written;
1045 
    INT in_Ri = -1;
1046 
    INT in_Rj = -1;
1047 
    INT out_Ri = -1;
1048 
    in_Ri = FLD (in_Ri);
1049 
    referenced |= 1 << 0;
1050 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri);
1051 
  }
1052 
  return cycles;
1053 
#undef FLD
1054 
}
1055 
 
1056 
static int
1057 
model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg)
1058 
{
1059 
#define FLD(f) abuf->fields.sfmt_addi.f
1060 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1061 
  const IDESC * UNUSED idesc = abuf->idesc;
1062 
  int cycles = 0;
1063 
  {
1064 
    int referenced = 0;
1065 
    int UNUSED insn_referenced = abuf->written;
1066 
    INT in_Rj = -1;
1067 
    INT out_Ri = -1;
1068 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1069 
  }
1070 
  {
1071 
    int referenced = 0;
1072 
    int UNUSED insn_referenced = abuf->written;
1073 
    INT in_Ri = -1;
1074 
    INT in_Rj = -1;
1075 
    INT out_Ri = -1;
1076 
    in_Ri = FLD (in_Ri);
1077 
    referenced |= 1 << 0;
1078 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri);
1079 
  }
1080 
  return cycles;
1081 
#undef FLD
1082 
}
1083 
 
1084 
static int
1085 
model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg)
1086 
{
1087 
#define FLD(f) abuf->fields.sfmt_str13.f
1088 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1089 
  const IDESC * UNUSED idesc = abuf->idesc;
1090 
  int cycles = 0;
1091 
  {
1092 
    int referenced = 0;
1093 
    int UNUSED insn_referenced = abuf->written;
1094 
    INT in_Ri = -1;
1095 
    INT in_Rj = -1;
1096 
    INT out_Ri = -1;
1097 
    in_Ri = FLD (in_Ri);
1098 
    in_Rj = FLD (in_Rj);
1099 
    referenced |= 1 << 0;
1100 
    referenced |= 1 << 1;
1101 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1102 
  }
1103 
  return cycles;
1104 
#undef FLD
1105 
}
1106 
 
1107 
static int
1108 
model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg)
1109 
{
1110 
#define FLD(f) abuf->fields.sfmt_str13.f
1111 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1112 
  const IDESC * UNUSED idesc = abuf->idesc;
1113 
  int cycles = 0;
1114 
  {
1115 
    int referenced = 0;
1116 
    int UNUSED insn_referenced = abuf->written;
1117 
    INT in_Ri = -1;
1118 
    INT in_Rj = -1;
1119 
    INT out_Ri = -1;
1120 
    in_Ri = FLD (in_Ri);
1121 
    in_Rj = FLD (in_Rj);
1122 
    referenced |= 1 << 0;
1123 
    referenced |= 1 << 1;
1124 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1125 
  }
1126 
  return cycles;
1127 
#undef FLD
1128 
}
1129 
 
1130 
static int
1131 
model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg)
1132 
{
1133 
#define FLD(f) abuf->fields.sfmt_str13.f
1134 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1135 
  const IDESC * UNUSED idesc = abuf->idesc;
1136 
  int cycles = 0;
1137 
  {
1138 
    int referenced = 0;
1139 
    int UNUSED insn_referenced = abuf->written;
1140 
    INT in_Ri = -1;
1141 
    INT in_Rj = -1;
1142 
    INT out_Ri = -1;
1143 
    in_Ri = FLD (in_Ri);
1144 
    in_Rj = FLD (in_Rj);
1145 
    referenced |= 1 << 0;
1146 
    referenced |= 1 << 1;
1147 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1148 
  }
1149 
  return cycles;
1150 
#undef FLD
1151 
}
1152 
 
1153 
static int
1154 
model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg)
1155 
{
1156 
#define FLD(f) abuf->fields.sfmt_str13.f
1157 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1158 
  const IDESC * UNUSED idesc = abuf->idesc;
1159 
  int cycles = 0;
1160 
  {
1161 
    int referenced = 0;
1162 
    int UNUSED insn_referenced = abuf->written;
1163 
    INT in_Ri = -1;
1164 
    INT in_Rj = -1;
1165 
    INT out_Ri = -1;
1166 
    in_Ri = FLD (in_Ri);
1167 
    in_Rj = FLD (in_Rj);
1168 
    referenced |= 1 << 0;
1169 
    referenced |= 1 << 1;
1170 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1171 
  }
1172 
  return cycles;
1173 
#undef FLD
1174 
}
1175 
 
1176 
static int
1177 
model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg)
1178 
{
1179 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
1180 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1181 
  const IDESC * UNUSED idesc = abuf->idesc;
1182 
  int cycles = 0;
1183 
  {
1184 
    int referenced = 0;
1185 
    int UNUSED insn_referenced = abuf->written;
1186 
    INT in_Ri = -1;
1187 
    INT in_Rj = -1;
1188 
    INT out_Ri = -1;
1189 
    in_Ri = FLD (in_Ri);
1190 
    referenced |= 1 << 0;
1191 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1192 
  }
1193 
  return cycles;
1194 
#undef FLD
1195 
}
1196 
 
1197 
static int
1198 
model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg)
1199 
{
1200 
#define FLD(f) abuf->fields.fmt_empty.f
1201 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1202 
  const IDESC * UNUSED idesc = abuf->idesc;
1203 
  int cycles = 0;
1204 
  {
1205 
    int referenced = 0;
1206 
    int UNUSED insn_referenced = abuf->written;
1207 
    INT in_Ri = -1;
1208 
    INT in_Rj = -1;
1209 
    INT out_Ri = -1;
1210 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1211 
  }
1212 
  return cycles;
1213 
#undef FLD
1214 
}
1215 
 
1216 
static int
1217 
model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg)
1218 
{
1219 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
1220 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1221 
  const IDESC * UNUSED idesc = abuf->idesc;
1222 
  int cycles = 0;
1223 
  {
1224 
    int referenced = 0;
1225 
    int UNUSED insn_referenced = abuf->written;
1226 
    INT in_Ri = -1;
1227 
    INT in_Rj = -1;
1228 
    INT out_Ri = -1;
1229 
    in_Ri = FLD (in_Ri);
1230 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1231 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1232 
  }
1233 
  return cycles;
1234 
#undef FLD
1235 
}
1236 
 
1237 
static int
1238 
model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg)
1239 
{
1240 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
1241 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1242 
  const IDESC * UNUSED idesc = abuf->idesc;
1243 
  int cycles = 0;
1244 
  {
1245 
    int referenced = 0;
1246 
    int UNUSED insn_referenced = abuf->written;
1247 
    INT in_Ri = -1;
1248 
    INT in_Rj = -1;
1249 
    INT out_Ri = -1;
1250 
    in_Ri = FLD (in_Ri);
1251 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1252 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1253 
  }
1254 
  return cycles;
1255 
#undef FLD
1256 
}
1257 
 
1258 
static int
1259 
model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg)
1260 
{
1261 
#define FLD(f) abuf->fields.fmt_empty.f
1262 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1263 
  const IDESC * UNUSED idesc = abuf->idesc;
1264 
  int cycles = 0;
1265 
  {
1266 
    int referenced = 0;
1267 
    int UNUSED insn_referenced = abuf->written;
1268 
    INT in_Ri = -1;
1269 
    INT in_Rj = -1;
1270 
    INT out_Ri = -1;
1271 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1272 
  }
1273 
  return cycles;
1274 
#undef FLD
1275 
}
1276 
 
1277 
static int
1278 
model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg)
1279 
{
1280 
#define FLD(f) abuf->fields.fmt_empty.f
1281 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1282 
  const IDESC * UNUSED idesc = abuf->idesc;
1283 
  int cycles = 0;
1284 
  {
1285 
    int referenced = 0;
1286 
    int UNUSED insn_referenced = abuf->written;
1287 
    INT in_Ri = -1;
1288 
    INT in_Rj = -1;
1289 
    INT out_Ri = -1;
1290 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1291 
  }
1292 
  return cycles;
1293 
#undef FLD
1294 
}
1295 
 
1296 
static int
1297 
model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg)
1298 
{
1299 
#define FLD(f) abuf->fields.sfmt_add.f
1300 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1301 
  const IDESC * UNUSED idesc = abuf->idesc;
1302 
  int cycles = 0;
1303 
  {
1304 
    int referenced = 0;
1305 
    int UNUSED insn_referenced = abuf->written;
1306 
    INT in_Ri = -1;
1307 
    INT in_Rj = -1;
1308 
    INT out_Ri = -1;
1309 
    in_Ri = FLD (in_Ri);
1310 
    in_Rj = FLD (in_Rj);
1311 
    out_Ri = FLD (out_Ri);
1312 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1313 
    referenced |= 1 << 1;
1314 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1315 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1316 
  }
1317 
  return cycles;
1318 
#undef FLD
1319 
}
1320 
 
1321 
static int
1322 
model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg)
1323 
{
1324 
#define FLD(f) abuf->fields.sfmt_addi.f
1325 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1326 
  const IDESC * UNUSED idesc = abuf->idesc;
1327 
  int cycles = 0;
1328 
  {
1329 
    int referenced = 0;
1330 
    int UNUSED insn_referenced = abuf->written;
1331 
    INT in_Ri = -1;
1332 
    INT in_Rj = -1;
1333 
    INT out_Ri = -1;
1334 
    in_Ri = FLD (in_Ri);
1335 
    out_Ri = FLD (out_Ri);
1336 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1337 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1338 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1339 
  }
1340 
  return cycles;
1341 
#undef FLD
1342 
}
1343 
 
1344 
static int
1345 
model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg)
1346 
{
1347 
#define FLD(f) abuf->fields.sfmt_addi.f
1348 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1349 
  const IDESC * UNUSED idesc = abuf->idesc;
1350 
  int cycles = 0;
1351 
  {
1352 
    int referenced = 0;
1353 
    int UNUSED insn_referenced = abuf->written;
1354 
    INT in_Ri = -1;
1355 
    INT in_Rj = -1;
1356 
    INT out_Ri = -1;
1357 
    in_Ri = FLD (in_Ri);
1358 
    out_Ri = FLD (out_Ri);
1359 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1360 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1361 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1362 
  }
1363 
  return cycles;
1364 
#undef FLD
1365 
}
1366 
 
1367 
static int
1368 
model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg)
1369 
{
1370 
#define FLD(f) abuf->fields.sfmt_add.f
1371 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1372 
  const IDESC * UNUSED idesc = abuf->idesc;
1373 
  int cycles = 0;
1374 
  {
1375 
    int referenced = 0;
1376 
    int UNUSED insn_referenced = abuf->written;
1377 
    INT in_Ri = -1;
1378 
    INT in_Rj = -1;
1379 
    INT out_Ri = -1;
1380 
    in_Ri = FLD (in_Ri);
1381 
    in_Rj = FLD (in_Rj);
1382 
    out_Ri = FLD (out_Ri);
1383 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1384 
    referenced |= 1 << 1;
1385 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1386 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1387 
  }
1388 
  return cycles;
1389 
#undef FLD
1390 
}
1391 
 
1392 
static int
1393 
model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg)
1394 
{
1395 
#define FLD(f) abuf->fields.sfmt_addi.f
1396 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1397 
  const IDESC * UNUSED idesc = abuf->idesc;
1398 
  int cycles = 0;
1399 
  {
1400 
    int referenced = 0;
1401 
    int UNUSED insn_referenced = abuf->written;
1402 
    INT in_Ri = -1;
1403 
    INT in_Rj = -1;
1404 
    INT out_Ri = -1;
1405 
    in_Ri = FLD (in_Ri);
1406 
    out_Ri = FLD (out_Ri);
1407 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1408 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1409 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1410 
  }
1411 
  return cycles;
1412 
#undef FLD
1413 
}
1414 
 
1415 
static int
1416 
model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg)
1417 
{
1418 
#define FLD(f) abuf->fields.sfmt_addi.f
1419 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1420 
  const IDESC * UNUSED idesc = abuf->idesc;
1421 
  int cycles = 0;
1422 
  {
1423 
    int referenced = 0;
1424 
    int UNUSED insn_referenced = abuf->written;
1425 
    INT in_Ri = -1;
1426 
    INT in_Rj = -1;
1427 
    INT out_Ri = -1;
1428 
    in_Ri = FLD (in_Ri);
1429 
    out_Ri = FLD (out_Ri);
1430 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1431 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1432 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1433 
  }
1434 
  return cycles;
1435 
#undef FLD
1436 
}
1437 
 
1438 
static int
1439 
model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg)
1440 
{
1441 
#define FLD(f) abuf->fields.sfmt_add.f
1442 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1443 
  const IDESC * UNUSED idesc = abuf->idesc;
1444 
  int cycles = 0;
1445 
  {
1446 
    int referenced = 0;
1447 
    int UNUSED insn_referenced = abuf->written;
1448 
    INT in_Ri = -1;
1449 
    INT in_Rj = -1;
1450 
    INT out_Ri = -1;
1451 
    in_Ri = FLD (in_Ri);
1452 
    in_Rj = FLD (in_Rj);
1453 
    out_Ri = FLD (out_Ri);
1454 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1455 
    referenced |= 1 << 1;
1456 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1457 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1458 
  }
1459 
  return cycles;
1460 
#undef FLD
1461 
}
1462 
 
1463 
static int
1464 
model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg)
1465 
{
1466 
#define FLD(f) abuf->fields.sfmt_addi.f
1467 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1468 
  const IDESC * UNUSED idesc = abuf->idesc;
1469 
  int cycles = 0;
1470 
  {
1471 
    int referenced = 0;
1472 
    int UNUSED insn_referenced = abuf->written;
1473 
    INT in_Ri = -1;
1474 
    INT in_Rj = -1;
1475 
    INT out_Ri = -1;
1476 
    in_Ri = FLD (in_Ri);
1477 
    out_Ri = FLD (out_Ri);
1478 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1479 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1480 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1481 
  }
1482 
  return cycles;
1483 
#undef FLD
1484 
}
1485 
 
1486 
static int
1487 
model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg)
1488 
{
1489 
#define FLD(f) abuf->fields.sfmt_addi.f
1490 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1491 
  const IDESC * UNUSED idesc = abuf->idesc;
1492 
  int cycles = 0;
1493 
  {
1494 
    int referenced = 0;
1495 
    int UNUSED insn_referenced = abuf->written;
1496 
    INT in_Ri = -1;
1497 
    INT in_Rj = -1;
1498 
    INT out_Ri = -1;
1499 
    in_Ri = FLD (in_Ri);
1500 
    out_Ri = FLD (out_Ri);
1501 
    if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
1502 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
1503 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1504 
  }
1505 
  return cycles;
1506 
#undef FLD
1507 
}
1508 
 
1509 
static int
1510 
model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
1511 
{
1512 
#define FLD(f) abuf->fields.sfmt_ldi8.f
1513 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1514 
  const IDESC * UNUSED idesc = abuf->idesc;
1515 
  int cycles = 0;
1516 
  {
1517 
    int referenced = 0;
1518 
    int UNUSED insn_referenced = abuf->written;
1519 
    INT in_Ri = -1;
1520 
    INT in_Rj = -1;
1521 
    INT out_Ri = -1;
1522 
    out_Ri = FLD (out_Ri);
1523 
    referenced |= 1 << 2;
1524 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1525 
  }
1526 
  return cycles;
1527 
#undef FLD
1528 
}
1529 
 
1530 
static int
1531 
model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg)
1532 
{
1533 
#define FLD(f) abuf->fields.sfmt_ldi20.f
1534 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1535 
  const IDESC * UNUSED idesc = abuf->idesc;
1536 
  int cycles = 0;
1537 
  {
1538 
    int referenced = 0;
1539 
    int UNUSED insn_referenced = abuf->written;
1540 
    INT in_Ri = -1;
1541 
    INT in_Rj = -1;
1542 
    INT out_Ri = -1;
1543 
    out_Ri = FLD (out_Ri);
1544 
    referenced |= 1 << 2;
1545 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1546 
  }
1547 
  return cycles;
1548 
#undef FLD
1549 
}
1550 
 
1551 
static int
1552 
model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg)
1553 
{
1554 
#define FLD(f) abuf->fields.sfmt_ldi32.f
1555 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1556 
  const IDESC * UNUSED idesc = abuf->idesc;
1557 
  int cycles = 0;
1558 
  {
1559 
    int referenced = 0;
1560 
    int UNUSED insn_referenced = abuf->written;
1561 
    INT in_Ri = -1;
1562 
    INT in_Rj = -1;
1563 
    INT out_Ri = -1;
1564 
    out_Ri = FLD (out_Ri);
1565 
    referenced |= 1 << 2;
1566 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
1567 
  }
1568 
  return cycles;
1569 
#undef FLD
1570 
}
1571 
 
1572 
static int
1573 
model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg)
1574 
{
1575 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1576 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1577 
  const IDESC * UNUSED idesc = abuf->idesc;
1578 
  int cycles = 0;
1579 
  {
1580 
    int referenced = 0;
1581 
    int UNUSED insn_referenced = abuf->written;
1582 
    INT in_Rj = -1;
1583 
    INT out_Ri = -1;
1584 
    in_Rj = FLD (in_Rj);
1585 
    out_Ri = FLD (out_Ri);
1586 
    referenced |= 1 << 0;
1587 
    referenced |= 1 << 1;
1588 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1589 
  }
1590 
  return cycles;
1591 
#undef FLD
1592 
}
1593 
 
1594 
static int
1595 
model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg)
1596 
{
1597 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1598 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1599 
  const IDESC * UNUSED idesc = abuf->idesc;
1600 
  int cycles = 0;
1601 
  {
1602 
    int referenced = 0;
1603 
    int UNUSED insn_referenced = abuf->written;
1604 
    INT in_Rj = -1;
1605 
    INT out_Ri = -1;
1606 
    in_Rj = FLD (in_Rj);
1607 
    out_Ri = FLD (out_Ri);
1608 
    referenced |= 1 << 0;
1609 
    referenced |= 1 << 1;
1610 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1611 
  }
1612 
  return cycles;
1613 
#undef FLD
1614 
}
1615 
 
1616 
static int
1617 
model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg)
1618 
{
1619 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1620 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1621 
  const IDESC * UNUSED idesc = abuf->idesc;
1622 
  int cycles = 0;
1623 
  {
1624 
    int referenced = 0;
1625 
    int UNUSED insn_referenced = abuf->written;
1626 
    INT in_Rj = -1;
1627 
    INT out_Ri = -1;
1628 
    in_Rj = FLD (in_Rj);
1629 
    out_Ri = FLD (out_Ri);
1630 
    referenced |= 1 << 0;
1631 
    referenced |= 1 << 1;
1632 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1633 
  }
1634 
  return cycles;
1635 
#undef FLD
1636 
}
1637 
 
1638 
static int
1639 
model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg)
1640 
{
1641 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1642 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1643 
  const IDESC * UNUSED idesc = abuf->idesc;
1644 
  int cycles = 0;
1645 
  {
1646 
    int referenced = 0;
1647 
    int UNUSED insn_referenced = abuf->written;
1648 
    INT in_Rj = -1;
1649 
    INT out_Ri = -1;
1650 
    in_Rj = FLD (in_Rj);
1651 
    out_Ri = FLD (out_Ri);
1652 
    referenced |= 1 << 0;
1653 
    referenced |= 1 << 1;
1654 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1655 
  }
1656 
  return cycles;
1657 
#undef FLD
1658 
}
1659 
 
1660 
static int
1661 
model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg)
1662 
{
1663 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1664 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1665 
  const IDESC * UNUSED idesc = abuf->idesc;
1666 
  int cycles = 0;
1667 
  {
1668 
    int referenced = 0;
1669 
    int UNUSED insn_referenced = abuf->written;
1670 
    INT in_Rj = -1;
1671 
    INT out_Ri = -1;
1672 
    in_Rj = FLD (in_Rj);
1673 
    out_Ri = FLD (out_Ri);
1674 
    referenced |= 1 << 0;
1675 
    referenced |= 1 << 1;
1676 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1677 
  }
1678 
  return cycles;
1679 
#undef FLD
1680 
}
1681 
 
1682 
static int
1683 
model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg)
1684 
{
1685 
#define FLD(f) abuf->fields.sfmt_ldr13.f
1686 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1687 
  const IDESC * UNUSED idesc = abuf->idesc;
1688 
  int cycles = 0;
1689 
  {
1690 
    int referenced = 0;
1691 
    int UNUSED insn_referenced = abuf->written;
1692 
    INT in_Rj = -1;
1693 
    INT out_Ri = -1;
1694 
    in_Rj = FLD (in_Rj);
1695 
    out_Ri = FLD (out_Ri);
1696 
    referenced |= 1 << 0;
1697 
    referenced |= 1 << 1;
1698 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1699 
  }
1700 
  return cycles;
1701 
#undef FLD
1702 
}
1703 
 
1704 
static int
1705 
model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg)
1706 
{
1707 
#define FLD(f) abuf->fields.sfmt_ldr14.f
1708 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1709 
  const IDESC * UNUSED idesc = abuf->idesc;
1710 
  int cycles = 0;
1711 
  {
1712 
    int referenced = 0;
1713 
    int UNUSED insn_referenced = abuf->written;
1714 
    INT in_Rj = -1;
1715 
    INT out_Ri = -1;
1716 
    out_Ri = FLD (out_Ri);
1717 
    referenced |= 1 << 1;
1718 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1719 
  }
1720 
  return cycles;
1721 
#undef FLD
1722 
}
1723 
 
1724 
static int
1725 
model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg)
1726 
{
1727 
#define FLD(f) abuf->fields.sfmt_ldr14uh.f
1728 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1729 
  const IDESC * UNUSED idesc = abuf->idesc;
1730 
  int cycles = 0;
1731 
  {
1732 
    int referenced = 0;
1733 
    int UNUSED insn_referenced = abuf->written;
1734 
    INT in_Rj = -1;
1735 
    INT out_Ri = -1;
1736 
    out_Ri = FLD (out_Ri);
1737 
    referenced |= 1 << 1;
1738 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1739 
  }
1740 
  return cycles;
1741 
#undef FLD
1742 
}
1743 
 
1744 
static int
1745 
model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg)
1746 
{
1747 
#define FLD(f) abuf->fields.sfmt_ldr14ub.f
1748 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1749 
  const IDESC * UNUSED idesc = abuf->idesc;
1750 
  int cycles = 0;
1751 
  {
1752 
    int referenced = 0;
1753 
    int UNUSED insn_referenced = abuf->written;
1754 
    INT in_Rj = -1;
1755 
    INT out_Ri = -1;
1756 
    out_Ri = FLD (out_Ri);
1757 
    referenced |= 1 << 1;
1758 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1759 
  }
1760 
  return cycles;
1761 
#undef FLD
1762 
}
1763 
 
1764 
static int
1765 
model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg)
1766 
{
1767 
#define FLD(f) abuf->fields.sfmt_ldr15.f
1768 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1769 
  const IDESC * UNUSED idesc = abuf->idesc;
1770 
  int cycles = 0;
1771 
  {
1772 
    int referenced = 0;
1773 
    int UNUSED insn_referenced = abuf->written;
1774 
    INT in_Rj = -1;
1775 
    INT out_Ri = -1;
1776 
    out_Ri = FLD (out_Ri);
1777 
    referenced |= 1 << 1;
1778 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1779 
  }
1780 
  return cycles;
1781 
#undef FLD
1782 
}
1783 
 
1784 
static int
1785 
model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg)
1786 
{
1787 
#define FLD(f) abuf->fields.sfmt_ldr15gr.f
1788 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1789 
  const IDESC * UNUSED idesc = abuf->idesc;
1790 
  int cycles = 0;
1791 
  {
1792 
    int referenced = 0;
1793 
    int UNUSED insn_referenced = abuf->written;
1794 
    INT in_Rj = -1;
1795 
    INT out_Ri = -1;
1796 
    out_Ri = FLD (out_Ri);
1797 
    referenced |= 1 << 1;
1798 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1799 
  }
1800 
  return cycles;
1801 
#undef FLD
1802 
}
1803 
 
1804 
static int
1805 
model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg)
1806 
{
1807 
#define FLD(f) abuf->fields.sfmt_ldr15dr.f
1808 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1809 
  const IDESC * UNUSED idesc = abuf->idesc;
1810 
  int cycles = 0;
1811 
  {
1812 
    int referenced = 0;
1813 
    int UNUSED insn_referenced = abuf->written;
1814 
    INT in_Rj = -1;
1815 
    INT out_Ri = -1;
1816 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1817 
  }
1818 
  return cycles;
1819 
#undef FLD
1820 
}
1821 
 
1822 
static int
1823 
model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg)
1824 
{
1825 
#define FLD(f) abuf->fields.sfmt_addsp.f
1826 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1827 
  const IDESC * UNUSED idesc = abuf->idesc;
1828 
  int cycles = 0;
1829 
  {
1830 
    int referenced = 0;
1831 
    int UNUSED insn_referenced = abuf->written;
1832 
    INT in_Rj = -1;
1833 
    INT out_Ri = -1;
1834 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
1835 
  }
1836 
  return cycles;
1837 
#undef FLD
1838 
}
1839 
 
1840 
static int
1841 
model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg)
1842 
{
1843 
#define FLD(f) abuf->fields.sfmt_str13.f
1844 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1845 
  const IDESC * UNUSED idesc = abuf->idesc;
1846 
  int cycles = 0;
1847 
  {
1848 
    int referenced = 0;
1849 
    int UNUSED insn_referenced = abuf->written;
1850 
    INT in_Ri = -1;
1851 
    INT in_Rj = -1;
1852 
    in_Ri = FLD (in_Ri);
1853 
    in_Rj = FLD (in_Rj);
1854 
    referenced |= 1 << 0;
1855 
    referenced |= 1 << 1;
1856 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1857 
  }
1858 
  return cycles;
1859 
#undef FLD
1860 
}
1861 
 
1862 
static int
1863 
model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg)
1864 
{
1865 
#define FLD(f) abuf->fields.sfmt_str13.f
1866 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1867 
  const IDESC * UNUSED idesc = abuf->idesc;
1868 
  int cycles = 0;
1869 
  {
1870 
    int referenced = 0;
1871 
    int UNUSED insn_referenced = abuf->written;
1872 
    INT in_Ri = -1;
1873 
    INT in_Rj = -1;
1874 
    in_Ri = FLD (in_Ri);
1875 
    in_Rj = FLD (in_Rj);
1876 
    referenced |= 1 << 0;
1877 
    referenced |= 1 << 1;
1878 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1879 
  }
1880 
  return cycles;
1881 
#undef FLD
1882 
}
1883 
 
1884 
static int
1885 
model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg)
1886 
{
1887 
#define FLD(f) abuf->fields.sfmt_str13.f
1888 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1889 
  const IDESC * UNUSED idesc = abuf->idesc;
1890 
  int cycles = 0;
1891 
  {
1892 
    int referenced = 0;
1893 
    int UNUSED insn_referenced = abuf->written;
1894 
    INT in_Ri = -1;
1895 
    INT in_Rj = -1;
1896 
    in_Ri = FLD (in_Ri);
1897 
    in_Rj = FLD (in_Rj);
1898 
    referenced |= 1 << 0;
1899 
    referenced |= 1 << 1;
1900 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1901 
  }
1902 
  return cycles;
1903 
#undef FLD
1904 
}
1905 
 
1906 
static int
1907 
model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg)
1908 
{
1909 
#define FLD(f) abuf->fields.sfmt_str13.f
1910 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1911 
  const IDESC * UNUSED idesc = abuf->idesc;
1912 
  int cycles = 0;
1913 
  {
1914 
    int referenced = 0;
1915 
    int UNUSED insn_referenced = abuf->written;
1916 
    INT in_Ri = -1;
1917 
    INT in_Rj = -1;
1918 
    in_Ri = FLD (in_Ri);
1919 
    in_Rj = FLD (in_Rj);
1920 
    referenced |= 1 << 0;
1921 
    referenced |= 1 << 1;
1922 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1923 
  }
1924 
  return cycles;
1925 
#undef FLD
1926 
}
1927 
 
1928 
static int
1929 
model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg)
1930 
{
1931 
#define FLD(f) abuf->fields.sfmt_str13.f
1932 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1933 
  const IDESC * UNUSED idesc = abuf->idesc;
1934 
  int cycles = 0;
1935 
  {
1936 
    int referenced = 0;
1937 
    int UNUSED insn_referenced = abuf->written;
1938 
    INT in_Ri = -1;
1939 
    INT in_Rj = -1;
1940 
    in_Ri = FLD (in_Ri);
1941 
    in_Rj = FLD (in_Rj);
1942 
    referenced |= 1 << 0;
1943 
    referenced |= 1 << 1;
1944 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1945 
  }
1946 
  return cycles;
1947 
#undef FLD
1948 
}
1949 
 
1950 
static int
1951 
model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg)
1952 
{
1953 
#define FLD(f) abuf->fields.sfmt_str13.f
1954 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1955 
  const IDESC * UNUSED idesc = abuf->idesc;
1956 
  int cycles = 0;
1957 
  {
1958 
    int referenced = 0;
1959 
    int UNUSED insn_referenced = abuf->written;
1960 
    INT in_Ri = -1;
1961 
    INT in_Rj = -1;
1962 
    in_Ri = FLD (in_Ri);
1963 
    in_Rj = FLD (in_Rj);
1964 
    referenced |= 1 << 0;
1965 
    referenced |= 1 << 1;
1966 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1967 
  }
1968 
  return cycles;
1969 
#undef FLD
1970 
}
1971 
 
1972 
static int
1973 
model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg)
1974 
{
1975 
#define FLD(f) abuf->fields.sfmt_str14.f
1976 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1977 
  const IDESC * UNUSED idesc = abuf->idesc;
1978 
  int cycles = 0;
1979 
  {
1980 
    int referenced = 0;
1981 
    int UNUSED insn_referenced = abuf->written;
1982 
    INT in_Ri = -1;
1983 
    INT in_Rj = -1;
1984 
    in_Ri = FLD (in_Ri);
1985 
    referenced |= 1 << 0;
1986 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
1987 
  }
1988 
  return cycles;
1989 
#undef FLD
1990 
}
1991 
 
1992 
static int
1993 
model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg)
1994 
{
1995 
#define FLD(f) abuf->fields.sfmt_str14h.f
1996 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1997 
  const IDESC * UNUSED idesc = abuf->idesc;
1998 
  int cycles = 0;
1999 
  {
2000 
    int referenced = 0;
2001 
    int UNUSED insn_referenced = abuf->written;
2002 
    INT in_Ri = -1;
2003 
    INT in_Rj = -1;
2004 
    in_Ri = FLD (in_Ri);
2005 
    referenced |= 1 << 0;
2006 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2007 
  }
2008 
  return cycles;
2009 
#undef FLD
2010 
}
2011 
 
2012 
static int
2013 
model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg)
2014 
{
2015 
#define FLD(f) abuf->fields.sfmt_str14b.f
2016 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2017 
  const IDESC * UNUSED idesc = abuf->idesc;
2018 
  int cycles = 0;
2019 
  {
2020 
    int referenced = 0;
2021 
    int UNUSED insn_referenced = abuf->written;
2022 
    INT in_Ri = -1;
2023 
    INT in_Rj = -1;
2024 
    in_Ri = FLD (in_Ri);
2025 
    referenced |= 1 << 0;
2026 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2027 
  }
2028 
  return cycles;
2029 
#undef FLD
2030 
}
2031 
 
2032 
static int
2033 
model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg)
2034 
{
2035 
#define FLD(f) abuf->fields.sfmt_str15.f
2036 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2037 
  const IDESC * UNUSED idesc = abuf->idesc;
2038 
  int cycles = 0;
2039 
  {
2040 
    int referenced = 0;
2041 
    int UNUSED insn_referenced = abuf->written;
2042 
    INT in_Ri = -1;
2043 
    INT in_Rj = -1;
2044 
    in_Ri = FLD (in_Ri);
2045 
    referenced |= 1 << 0;
2046 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2047 
  }
2048 
  return cycles;
2049 
#undef FLD
2050 
}
2051 
 
2052 
static int
2053 
model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg)
2054 
{
2055 
#define FLD(f) abuf->fields.sfmt_str15gr.f
2056 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2057 
  const IDESC * UNUSED idesc = abuf->idesc;
2058 
  int cycles = 0;
2059 
  {
2060 
    int referenced = 0;
2061 
    int UNUSED insn_referenced = abuf->written;
2062 
    INT in_Ri = -1;
2063 
    INT in_Rj = -1;
2064 
    in_Ri = FLD (in_Ri);
2065 
    referenced |= 1 << 0;
2066 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2067 
  }
2068 
  return cycles;
2069 
#undef FLD
2070 
}
2071 
 
2072 
static int
2073 
model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg)
2074 
{
2075 
#define FLD(f) abuf->fields.sfmt_ldr15dr.f
2076 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2077 
  const IDESC * UNUSED idesc = abuf->idesc;
2078 
  int cycles = 0;
2079 
  {
2080 
    int referenced = 0;
2081 
    int UNUSED insn_referenced = abuf->written;
2082 
    INT in_Ri = -1;
2083 
    INT in_Rj = -1;
2084 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2085 
  }
2086 
  return cycles;
2087 
#undef FLD
2088 
}
2089 
 
2090 
static int
2091 
model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg)
2092 
{
2093 
#define FLD(f) abuf->fields.sfmt_addsp.f
2094 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2095 
  const IDESC * UNUSED idesc = abuf->idesc;
2096 
  int cycles = 0;
2097 
  {
2098 
    int referenced = 0;
2099 
    int UNUSED insn_referenced = abuf->written;
2100 
    INT in_Ri = -1;
2101 
    INT in_Rj = -1;
2102 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
2103 
  }
2104 
  return cycles;
2105 
#undef FLD
2106 
}
2107 
 
2108 
static int
2109 
model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg)
2110 
{
2111 
#define FLD(f) abuf->fields.sfmt_ldr13.f
2112 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2113 
  const IDESC * UNUSED idesc = abuf->idesc;
2114 
  int cycles = 0;
2115 
  {
2116 
    int referenced = 0;
2117 
    int UNUSED insn_referenced = abuf->written;
2118 
    INT in_Ri = -1;
2119 
    INT in_Rj = -1;
2120 
    INT out_Ri = -1;
2121 
    in_Rj = FLD (in_Rj);
2122 
    out_Ri = FLD (out_Ri);
2123 
    referenced |= 1 << 1;
2124 
    referenced |= 1 << 2;
2125 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2126 
  }
2127 
  return cycles;
2128 
#undef FLD
2129 
}
2130 
 
2131 
static int
2132 
model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg)
2133 
{
2134 
#define FLD(f) abuf->fields.sfmt_movdr.f
2135 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2136 
  const IDESC * UNUSED idesc = abuf->idesc;
2137 
  int cycles = 0;
2138 
  {
2139 
    int referenced = 0;
2140 
    int UNUSED insn_referenced = abuf->written;
2141 
    INT in_Ri = -1;
2142 
    INT in_Rj = -1;
2143 
    INT out_Ri = -1;
2144 
    out_Ri = FLD (out_Ri);
2145 
    referenced |= 1 << 2;
2146 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2147 
  }
2148 
  return cycles;
2149 
#undef FLD
2150 
}
2151 
 
2152 
static int
2153 
model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg)
2154 
{
2155 
#define FLD(f) abuf->fields.sfmt_movdr.f
2156 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2157 
  const IDESC * UNUSED idesc = abuf->idesc;
2158 
  int cycles = 0;
2159 
  {
2160 
    int referenced = 0;
2161 
    int UNUSED insn_referenced = abuf->written;
2162 
    INT in_Ri = -1;
2163 
    INT in_Rj = -1;
2164 
    INT out_Ri = -1;
2165 
    out_Ri = FLD (out_Ri);
2166 
    referenced |= 1 << 2;
2167 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2168 
  }
2169 
  return cycles;
2170 
#undef FLD
2171 
}
2172 
 
2173 
static int
2174 
model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg)
2175 
{
2176 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2177 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2178 
  const IDESC * UNUSED idesc = abuf->idesc;
2179 
  int cycles = 0;
2180 
  {
2181 
    int referenced = 0;
2182 
    int UNUSED insn_referenced = abuf->written;
2183 
    INT in_Ri = -1;
2184 
    INT in_Rj = -1;
2185 
    INT out_Ri = -1;
2186 
    in_Ri = FLD (in_Ri);
2187 
    referenced |= 1 << 0;
2188 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2189 
  }
2190 
  return cycles;
2191 
#undef FLD
2192 
}
2193 
 
2194 
static int
2195 
model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg)
2196 
{
2197 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2198 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2199 
  const IDESC * UNUSED idesc = abuf->idesc;
2200 
  int cycles = 0;
2201 
  {
2202 
    int referenced = 0;
2203 
    int UNUSED insn_referenced = abuf->written;
2204 
    INT in_Ri = -1;
2205 
    INT in_Rj = -1;
2206 
    INT out_Ri = -1;
2207 
    in_Ri = FLD (in_Ri);
2208 
    referenced |= 1 << 0;
2209 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2210 
  }
2211 
  return cycles;
2212 
#undef FLD
2213 
}
2214 
 
2215 
static int
2216 
model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg)
2217 
{
2218 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2219 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2220 
  const IDESC * UNUSED idesc = abuf->idesc;
2221 
  int cycles = 0;
2222 
  {
2223 
    int referenced = 0;
2224 
    int UNUSED insn_referenced = abuf->written;
2225 
    INT in_Ri = -1;
2226 
    in_Ri = FLD (in_Ri);
2227 
    referenced |= 1 << 0;
2228 
    referenced |= 1 << 1;
2229 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2230 
  }
2231 
  return cycles;
2232 
#undef FLD
2233 
}
2234 
 
2235 
static int
2236 
model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg)
2237 
{
2238 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2239 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2240 
  const IDESC * UNUSED idesc = abuf->idesc;
2241 
  int cycles = 0;
2242 
  {
2243 
    int referenced = 0;
2244 
    int UNUSED insn_referenced = abuf->written;
2245 
    INT in_Ri = -1;
2246 
    in_Ri = FLD (in_Ri);
2247 
    referenced |= 1 << 0;
2248 
    referenced |= 1 << 1;
2249 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2250 
  }
2251 
  return cycles;
2252 
#undef FLD
2253 
}
2254 
 
2255 
static int
2256 
model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg)
2257 
{
2258 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2259 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2260 
  const IDESC * UNUSED idesc = abuf->idesc;
2261 
  int cycles = 0;
2262 
  {
2263 
    int referenced = 0;
2264 
    int UNUSED insn_referenced = abuf->written;
2265 
    INT in_Ri = -1;
2266 
    in_Ri = FLD (in_Ri);
2267 
    referenced |= 1 << 0;
2268 
    referenced |= 1 << 1;
2269 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2270 
  }
2271 
  return cycles;
2272 
#undef FLD
2273 
}
2274 
 
2275 
static int
2276 
model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg)
2277 
{
2278 
#define FLD(f) abuf->fields.sfmt_mov2dr.f
2279 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2280 
  const IDESC * UNUSED idesc = abuf->idesc;
2281 
  int cycles = 0;
2282 
  {
2283 
    int referenced = 0;
2284 
    int UNUSED insn_referenced = abuf->written;
2285 
    INT in_Ri = -1;
2286 
    in_Ri = FLD (in_Ri);
2287 
    referenced |= 1 << 0;
2288 
    referenced |= 1 << 1;
2289 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2290 
  }
2291 
  return cycles;
2292 
#undef FLD
2293 
}
2294 
 
2295 
static int
2296 
model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg)
2297 
{
2298 
#define FLD(f) abuf->fields.sfmt_call.f
2299 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2300 
  const IDESC * UNUSED idesc = abuf->idesc;
2301 
  int cycles = 0;
2302 
  {
2303 
    int referenced = 0;
2304 
    int UNUSED insn_referenced = abuf->written;
2305 
    INT in_Ri = -1;
2306 
    referenced |= 1 << 1;
2307 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2308 
  }
2309 
  return cycles;
2310 
#undef FLD
2311 
}
2312 
 
2313 
static int
2314 
model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg)
2315 
{
2316 
#define FLD(f) abuf->fields.sfmt_call.f
2317 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2318 
  const IDESC * UNUSED idesc = abuf->idesc;
2319 
  int cycles = 0;
2320 
  {
2321 
    int referenced = 0;
2322 
    int UNUSED insn_referenced = abuf->written;
2323 
    INT in_Ri = -1;
2324 
    referenced |= 1 << 1;
2325 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2326 
  }
2327 
  return cycles;
2328 
#undef FLD
2329 
}
2330 
 
2331 
static int
2332 
model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg)
2333 
{
2334 
#define FLD(f) abuf->fields.fmt_empty.f
2335 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2336 
  const IDESC * UNUSED idesc = abuf->idesc;
2337 
  int cycles = 0;
2338 
  {
2339 
    int referenced = 0;
2340 
    int UNUSED insn_referenced = abuf->written;
2341 
    INT in_Ri = -1;
2342 
    referenced |= 1 << 1;
2343 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2344 
  }
2345 
  return cycles;
2346 
#undef FLD
2347 
}
2348 
 
2349 
static int
2350 
model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg)
2351 
{
2352 
#define FLD(f) abuf->fields.fmt_empty.f
2353 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2354 
  const IDESC * UNUSED idesc = abuf->idesc;
2355 
  int cycles = 0;
2356 
  {
2357 
    int referenced = 0;
2358 
    int UNUSED insn_referenced = abuf->written;
2359 
    INT in_Ri = -1;
2360 
    referenced |= 1 << 1;
2361 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2362 
  }
2363 
  return cycles;
2364 
#undef FLD
2365 
}
2366 
 
2367 
static int
2368 
model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg)
2369 
{
2370 
#define FLD(f) abuf->fields.sfmt_int.f
2371 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2372 
  const IDESC * UNUSED idesc = abuf->idesc;
2373 
  int cycles = 0;
2374 
  {
2375 
    int referenced = 0;
2376 
    int UNUSED insn_referenced = abuf->written;
2377 
    INT in_Ri = -1;
2378 
    INT in_Rj = -1;
2379 
    INT out_Ri = -1;
2380 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2381 
  }
2382 
  return cycles;
2383 
#undef FLD
2384 
}
2385 
 
2386 
static int
2387 
model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg)
2388 
{
2389 
#define FLD(f) abuf->fields.fmt_empty.f
2390 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2391 
  const IDESC * UNUSED idesc = abuf->idesc;
2392 
  int cycles = 0;
2393 
  {
2394 
    int referenced = 0;
2395 
    int UNUSED insn_referenced = abuf->written;
2396 
    INT in_Ri = -1;
2397 
    INT in_Rj = -1;
2398 
    INT out_Ri = -1;
2399 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2400 
  }
2401 
  return cycles;
2402 
#undef FLD
2403 
}
2404 
 
2405 
static int
2406 
model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg)
2407 
{
2408 
#define FLD(f) abuf->fields.fmt_empty.f
2409 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2410 
  const IDESC * UNUSED idesc = abuf->idesc;
2411 
  int cycles = 0;
2412 
  {
2413 
    int referenced = 0;
2414 
    int UNUSED insn_referenced = abuf->written;
2415 
    INT in_Ri = -1;
2416 
    INT in_Rj = -1;
2417 
    INT out_Ri = -1;
2418 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
2419 
  }
2420 
  return cycles;
2421 
#undef FLD
2422 
}
2423 
 
2424 
static int
2425 
model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg)
2426 
{
2427 
#define FLD(f) abuf->fields.sfmt_brad.f
2428 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2429 
  const IDESC * UNUSED idesc = abuf->idesc;
2430 
  int cycles = 0;
2431 
  {
2432 
    int referenced = 0;
2433 
    int UNUSED insn_referenced = abuf->written;
2434 
    INT in_Ri = -1;
2435 
    referenced |= 1 << 1;
2436 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2437 
  }
2438 
  return cycles;
2439 
#undef FLD
2440 
}
2441 
 
2442 
static int
2443 
model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg)
2444 
{
2445 
#define FLD(f) abuf->fields.sfmt_brad.f
2446 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2447 
  const IDESC * UNUSED idesc = abuf->idesc;
2448 
  int cycles = 0;
2449 
  {
2450 
    int referenced = 0;
2451 
    int UNUSED insn_referenced = abuf->written;
2452 
    INT in_Ri = -1;
2453 
    referenced |= 1 << 1;
2454 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2455 
  }
2456 
  return cycles;
2457 
#undef FLD
2458 
}
2459 
 
2460 
static int
2461 
model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg)
2462 
{
2463 
#define FLD(f) abuf->fields.fmt_empty.f
2464 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2465 
  const IDESC * UNUSED idesc = abuf->idesc;
2466 
  int cycles = 0;
2467 
  {
2468 
    int referenced = 0;
2469 
    int UNUSED insn_referenced = abuf->written;
2470 
    INT in_Ri = -1;
2471 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2472 
  }
2473 
  return cycles;
2474 
#undef FLD
2475 
}
2476 
 
2477 
static int
2478 
model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg)
2479 
{
2480 
#define FLD(f) abuf->fields.fmt_empty.f
2481 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2482 
  const IDESC * UNUSED idesc = abuf->idesc;
2483 
  int cycles = 0;
2484 
  {
2485 
    int referenced = 0;
2486 
    int UNUSED insn_referenced = abuf->written;
2487 
    INT in_Ri = -1;
2488 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2489 
  }
2490 
  return cycles;
2491 
#undef FLD
2492 
}
2493 
 
2494 
static int
2495 
model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg)
2496 
{
2497 
#define FLD(f) abuf->fields.sfmt_brad.f
2498 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2499 
  const IDESC * UNUSED idesc = abuf->idesc;
2500 
  int cycles = 0;
2501 
  {
2502 
    int referenced = 0;
2503 
    int UNUSED insn_referenced = abuf->written;
2504 
    INT in_Ri = -1;
2505 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2506 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2507 
  }
2508 
  return cycles;
2509 
#undef FLD
2510 
}
2511 
 
2512 
static int
2513 
model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg)
2514 
{
2515 
#define FLD(f) abuf->fields.sfmt_brad.f
2516 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2517 
  const IDESC * UNUSED idesc = abuf->idesc;
2518 
  int cycles = 0;
2519 
  {
2520 
    int referenced = 0;
2521 
    int UNUSED insn_referenced = abuf->written;
2522 
    INT in_Ri = -1;
2523 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2524 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2525 
  }
2526 
  return cycles;
2527 
#undef FLD
2528 
}
2529 
 
2530 
static int
2531 
model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg)
2532 
{
2533 
#define FLD(f) abuf->fields.sfmt_brad.f
2534 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2535 
  const IDESC * UNUSED idesc = abuf->idesc;
2536 
  int cycles = 0;
2537 
  {
2538 
    int referenced = 0;
2539 
    int UNUSED insn_referenced = abuf->written;
2540 
    INT in_Ri = -1;
2541 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2542 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2543 
  }
2544 
  return cycles;
2545 
#undef FLD
2546 
}
2547 
 
2548 
static int
2549 
model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg)
2550 
{
2551 
#define FLD(f) abuf->fields.sfmt_brad.f
2552 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2553 
  const IDESC * UNUSED idesc = abuf->idesc;
2554 
  int cycles = 0;
2555 
  {
2556 
    int referenced = 0;
2557 
    int UNUSED insn_referenced = abuf->written;
2558 
    INT in_Ri = -1;
2559 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2560 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2561 
  }
2562 
  return cycles;
2563 
#undef FLD
2564 
}
2565 
 
2566 
static int
2567 
model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg)
2568 
{
2569 
#define FLD(f) abuf->fields.sfmt_brad.f
2570 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2571 
  const IDESC * UNUSED idesc = abuf->idesc;
2572 
  int cycles = 0;
2573 
  {
2574 
    int referenced = 0;
2575 
    int UNUSED insn_referenced = abuf->written;
2576 
    INT in_Ri = -1;
2577 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2578 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2579 
  }
2580 
  return cycles;
2581 
#undef FLD
2582 
}
2583 
 
2584 
static int
2585 
model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg)
2586 
{
2587 
#define FLD(f) abuf->fields.sfmt_brad.f
2588 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2589 
  const IDESC * UNUSED idesc = abuf->idesc;
2590 
  int cycles = 0;
2591 
  {
2592 
    int referenced = 0;
2593 
    int UNUSED insn_referenced = abuf->written;
2594 
    INT in_Ri = -1;
2595 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2596 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2597 
  }
2598 
  return cycles;
2599 
#undef FLD
2600 
}
2601 
 
2602 
static int
2603 
model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg)
2604 
{
2605 
#define FLD(f) abuf->fields.sfmt_brad.f
2606 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2607 
  const IDESC * UNUSED idesc = abuf->idesc;
2608 
  int cycles = 0;
2609 
  {
2610 
    int referenced = 0;
2611 
    int UNUSED insn_referenced = abuf->written;
2612 
    INT in_Ri = -1;
2613 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2614 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2615 
  }
2616 
  return cycles;
2617 
#undef FLD
2618 
}
2619 
 
2620 
static int
2621 
model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg)
2622 
{
2623 
#define FLD(f) abuf->fields.sfmt_brad.f
2624 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2625 
  const IDESC * UNUSED idesc = abuf->idesc;
2626 
  int cycles = 0;
2627 
  {
2628 
    int referenced = 0;
2629 
    int UNUSED insn_referenced = abuf->written;
2630 
    INT in_Ri = -1;
2631 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2632 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2633 
  }
2634 
  return cycles;
2635 
#undef FLD
2636 
}
2637 
 
2638 
static int
2639 
model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg)
2640 
{
2641 
#define FLD(f) abuf->fields.sfmt_brad.f
2642 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2643 
  const IDESC * UNUSED idesc = abuf->idesc;
2644 
  int cycles = 0;
2645 
  {
2646 
    int referenced = 0;
2647 
    int UNUSED insn_referenced = abuf->written;
2648 
    INT in_Ri = -1;
2649 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2650 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2651 
  }
2652 
  return cycles;
2653 
#undef FLD
2654 
}
2655 
 
2656 
static int
2657 
model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg)
2658 
{
2659 
#define FLD(f) abuf->fields.sfmt_brad.f
2660 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2661 
  const IDESC * UNUSED idesc = abuf->idesc;
2662 
  int cycles = 0;
2663 
  {
2664 
    int referenced = 0;
2665 
    int UNUSED insn_referenced = abuf->written;
2666 
    INT in_Ri = -1;
2667 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2668 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2669 
  }
2670 
  return cycles;
2671 
#undef FLD
2672 
}
2673 
 
2674 
static int
2675 
model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg)
2676 
{
2677 
#define FLD(f) abuf->fields.sfmt_brad.f
2678 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2679 
  const IDESC * UNUSED idesc = abuf->idesc;
2680 
  int cycles = 0;
2681 
  {
2682 
    int referenced = 0;
2683 
    int UNUSED insn_referenced = abuf->written;
2684 
    INT in_Ri = -1;
2685 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2686 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2687 
  }
2688 
  return cycles;
2689 
#undef FLD
2690 
}
2691 
 
2692 
static int
2693 
model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg)
2694 
{
2695 
#define FLD(f) abuf->fields.sfmt_brad.f
2696 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2697 
  const IDESC * UNUSED idesc = abuf->idesc;
2698 
  int cycles = 0;
2699 
  {
2700 
    int referenced = 0;
2701 
    int UNUSED insn_referenced = abuf->written;
2702 
    INT in_Ri = -1;
2703 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2704 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2705 
  }
2706 
  return cycles;
2707 
#undef FLD
2708 
}
2709 
 
2710 
static int
2711 
model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg)
2712 
{
2713 
#define FLD(f) abuf->fields.sfmt_brad.f
2714 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2715 
  const IDESC * UNUSED idesc = abuf->idesc;
2716 
  int cycles = 0;
2717 
  {
2718 
    int referenced = 0;
2719 
    int UNUSED insn_referenced = abuf->written;
2720 
    INT in_Ri = -1;
2721 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2722 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2723 
  }
2724 
  return cycles;
2725 
#undef FLD
2726 
}
2727 
 
2728 
static int
2729 
model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg)
2730 
{
2731 
#define FLD(f) abuf->fields.sfmt_brad.f
2732 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2733 
  const IDESC * UNUSED idesc = abuf->idesc;
2734 
  int cycles = 0;
2735 
  {
2736 
    int referenced = 0;
2737 
    int UNUSED insn_referenced = abuf->written;
2738 
    INT in_Ri = -1;
2739 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2740 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2741 
  }
2742 
  return cycles;
2743 
#undef FLD
2744 
}
2745 
 
2746 
static int
2747 
model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg)
2748 
{
2749 
#define FLD(f) abuf->fields.sfmt_brad.f
2750 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2751 
  const IDESC * UNUSED idesc = abuf->idesc;
2752 
  int cycles = 0;
2753 
  {
2754 
    int referenced = 0;
2755 
    int UNUSED insn_referenced = abuf->written;
2756 
    INT in_Ri = -1;
2757 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2758 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2759 
  }
2760 
  return cycles;
2761 
#undef FLD
2762 
}
2763 
 
2764 
static int
2765 
model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg)
2766 
{
2767 
#define FLD(f) abuf->fields.sfmt_brad.f
2768 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2769 
  const IDESC * UNUSED idesc = abuf->idesc;
2770 
  int cycles = 0;
2771 
  {
2772 
    int referenced = 0;
2773 
    int UNUSED insn_referenced = abuf->written;
2774 
    INT in_Ri = -1;
2775 
    if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
2776 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2777 
  }
2778 
  return cycles;
2779 
#undef FLD
2780 
}
2781 
 
2782 
static int
2783 
model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg)
2784 
{
2785 
#define FLD(f) abuf->fields.sfmt_brad.f
2786 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2787 
  const IDESC * UNUSED idesc = abuf->idesc;
2788 
  int cycles = 0;
2789 
  {
2790 
    int referenced = 0;
2791 
    int UNUSED insn_referenced = abuf->written;
2792 
    INT in_Ri = -1;
2793 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2794 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2795 
  }
2796 
  return cycles;
2797 
#undef FLD
2798 
}
2799 
 
2800 
static int
2801 
model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg)
2802 
{
2803 
#define FLD(f) abuf->fields.sfmt_brad.f
2804 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2805 
  const IDESC * UNUSED idesc = abuf->idesc;
2806 
  int cycles = 0;
2807 
  {
2808 
    int referenced = 0;
2809 
    int UNUSED insn_referenced = abuf->written;
2810 
    INT in_Ri = -1;
2811 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2812 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2813 
  }
2814 
  return cycles;
2815 
#undef FLD
2816 
}
2817 
 
2818 
static int
2819 
model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg)
2820 
{
2821 
#define FLD(f) abuf->fields.sfmt_brad.f
2822 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2823 
  const IDESC * UNUSED idesc = abuf->idesc;
2824 
  int cycles = 0;
2825 
  {
2826 
    int referenced = 0;
2827 
    int UNUSED insn_referenced = abuf->written;
2828 
    INT in_Ri = -1;
2829 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2830 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2831 
  }
2832 
  return cycles;
2833 
#undef FLD
2834 
}
2835 
 
2836 
static int
2837 
model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg)
2838 
{
2839 
#define FLD(f) abuf->fields.sfmt_brad.f
2840 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2841 
  const IDESC * UNUSED idesc = abuf->idesc;
2842 
  int cycles = 0;
2843 
  {
2844 
    int referenced = 0;
2845 
    int UNUSED insn_referenced = abuf->written;
2846 
    INT in_Ri = -1;
2847 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2848 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2849 
  }
2850 
  return cycles;
2851 
#undef FLD
2852 
}
2853 
 
2854 
static int
2855 
model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg)
2856 
{
2857 
#define FLD(f) abuf->fields.sfmt_brad.f
2858 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2859 
  const IDESC * UNUSED idesc = abuf->idesc;
2860 
  int cycles = 0;
2861 
  {
2862 
    int referenced = 0;
2863 
    int UNUSED insn_referenced = abuf->written;
2864 
    INT in_Ri = -1;
2865 
    if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
2866 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2867 
  }
2868 
  return cycles;
2869 
#undef FLD
2870 
}
2871 
 
2872 
static int
2873 
model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg)
2874 
{
2875 
#define FLD(f) abuf->fields.sfmt_brad.f
2876 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2877 
  const IDESC * UNUSED idesc = abuf->idesc;
2878 
  int cycles = 0;
2879 
  {
2880 
    int referenced = 0;
2881 
    int UNUSED insn_referenced = abuf->written;
2882 
    INT in_Ri = -1;
2883 
    if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
2884 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2885 
  }
2886 
  return cycles;
2887 
#undef FLD
2888 
}
2889 
 
2890 
static int
2891 
model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg)
2892 
{
2893 
#define FLD(f) abuf->fields.sfmt_brad.f
2894 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2895 
  const IDESC * UNUSED idesc = abuf->idesc;
2896 
  int cycles = 0;
2897 
  {
2898 
    int referenced = 0;
2899 
    int UNUSED insn_referenced = abuf->written;
2900 
    INT in_Ri = -1;
2901 
    if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
2902 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2903 
  }
2904 
  return cycles;
2905 
#undef FLD
2906 
}
2907 
 
2908 
static int
2909 
model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg)
2910 
{
2911 
#define FLD(f) abuf->fields.sfmt_brad.f
2912 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2913 
  const IDESC * UNUSED idesc = abuf->idesc;
2914 
  int cycles = 0;
2915 
  {
2916 
    int referenced = 0;
2917 
    int UNUSED insn_referenced = abuf->written;
2918 
    INT in_Ri = -1;
2919 
    if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
2920 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2921 
  }
2922 
  return cycles;
2923 
#undef FLD
2924 
}
2925 
 
2926 
static int
2927 
model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg)
2928 
{
2929 
#define FLD(f) abuf->fields.sfmt_brad.f
2930 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2931 
  const IDESC * UNUSED idesc = abuf->idesc;
2932 
  int cycles = 0;
2933 
  {
2934 
    int referenced = 0;
2935 
    int UNUSED insn_referenced = abuf->written;
2936 
    INT in_Ri = -1;
2937 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2938 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2939 
  }
2940 
  return cycles;
2941 
#undef FLD
2942 
}
2943 
 
2944 
static int
2945 
model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg)
2946 
{
2947 
#define FLD(f) abuf->fields.sfmt_brad.f
2948 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2949 
  const IDESC * UNUSED idesc = abuf->idesc;
2950 
  int cycles = 0;
2951 
  {
2952 
    int referenced = 0;
2953 
    int UNUSED insn_referenced = abuf->written;
2954 
    INT in_Ri = -1;
2955 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2956 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2957 
  }
2958 
  return cycles;
2959 
#undef FLD
2960 
}
2961 
 
2962 
static int
2963 
model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg)
2964 
{
2965 
#define FLD(f) abuf->fields.sfmt_brad.f
2966 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2967 
  const IDESC * UNUSED idesc = abuf->idesc;
2968 
  int cycles = 0;
2969 
  {
2970 
    int referenced = 0;
2971 
    int UNUSED insn_referenced = abuf->written;
2972 
    INT in_Ri = -1;
2973 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2974 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2975 
  }
2976 
  return cycles;
2977 
#undef FLD
2978 
}
2979 
 
2980 
static int
2981 
model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg)
2982 
{
2983 
#define FLD(f) abuf->fields.sfmt_brad.f
2984 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2985 
  const IDESC * UNUSED idesc = abuf->idesc;
2986 
  int cycles = 0;
2987 
  {
2988 
    int referenced = 0;
2989 
    int UNUSED insn_referenced = abuf->written;
2990 
    INT in_Ri = -1;
2991 
    if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
2992 
    cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
2993 
  }
2994 
  return cycles;
2995 
#undef FLD
2996 
}
2997 
 
2998 
static int
2999 
model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg)
3000 
{
3001 
#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
3002 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3003 
  const IDESC * UNUSED idesc = abuf->idesc;
3004 
  int cycles = 0;
3005 
  {
3006 
    int referenced = 0;
3007 
    int UNUSED insn_referenced = abuf->written;
3008 
    INT in_Ri = -1;
3009 
    INT in_Rj = -1;
3010 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
3011 
  }
3012 
  return cycles;
3013 
#undef FLD
3014 
}
3015 
 
3016 
static int
3017 
model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg)
3018 
{
3019 
#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
3020 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3021 
  const IDESC * UNUSED idesc = abuf->idesc;
3022 
  int cycles = 0;
3023 
  {
3024 
    int referenced = 0;
3025 
    int UNUSED insn_referenced = abuf->written;
3026 
    INT in_Ri = -1;
3027 
    INT in_Rj = -1;
3028 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
3029 
  }
3030 
  return cycles;
3031 
#undef FLD
3032 
}
3033 
 
3034 
static int
3035 
model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg)
3036 
{
3037 
#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
3038 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3039 
  const IDESC * UNUSED idesc = abuf->idesc;
3040 
  int cycles = 0;
3041 
  {
3042 
    int referenced = 0;
3043 
    int UNUSED insn_referenced = abuf->written;
3044 
    INT in_Ri = -1;
3045 
    INT in_Rj = -1;
3046 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
3047 
  }
3048 
  return cycles;
3049 
#undef FLD
3050 
}
3051 
 
3052 
static int
3053 
model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg)
3054 
{
3055 
#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
3056 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3057 
  const IDESC * UNUSED idesc = abuf->idesc;
3058 
  int cycles = 0;
3059 
  {
3060 
    int referenced = 0;
3061 
    int UNUSED insn_referenced = abuf->written;
3062 
    INT in_Rj = -1;
3063 
    INT out_Ri = -1;
3064 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3065 
  }
3066 
  {
3067 
    int referenced = 0;
3068 
    int UNUSED insn_referenced = abuf->written;
3069 
    INT in_Ri = -1;
3070 
    INT in_Rj = -1;
3071 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3072 
  }
3073 
  return cycles;
3074 
#undef FLD
3075 
}
3076 
 
3077 
static int
3078 
model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg)
3079 
{
3080 
#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
3081 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3082 
  const IDESC * UNUSED idesc = abuf->idesc;
3083 
  int cycles = 0;
3084 
  {
3085 
    int referenced = 0;
3086 
    int UNUSED insn_referenced = abuf->written;
3087 
    INT in_Rj = -1;
3088 
    INT out_Ri = -1;
3089 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3090 
  }
3091 
  {
3092 
    int referenced = 0;
3093 
    int UNUSED insn_referenced = abuf->written;
3094 
    INT in_Ri = -1;
3095 
    INT in_Rj = -1;
3096 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3097 
  }
3098 
  return cycles;
3099 
#undef FLD
3100 
}
3101 
 
3102 
static int
3103 
model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg)
3104 
{
3105 
#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
3106 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3107 
  const IDESC * UNUSED idesc = abuf->idesc;
3108 
  int cycles = 0;
3109 
  {
3110 
    int referenced = 0;
3111 
    int UNUSED insn_referenced = abuf->written;
3112 
    INT in_Rj = -1;
3113 
    INT out_Ri = -1;
3114 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3115 
  }
3116 
  {
3117 
    int referenced = 0;
3118 
    int UNUSED insn_referenced = abuf->written;
3119 
    INT in_Ri = -1;
3120 
    INT in_Rj = -1;
3121 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3122 
  }
3123 
  return cycles;
3124 
#undef FLD
3125 
}
3126 
 
3127 
static int
3128 
model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg)
3129 
{
3130 
#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
3131 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3132 
  const IDESC * UNUSED idesc = abuf->idesc;
3133 
  int cycles = 0;
3134 
  {
3135 
    int referenced = 0;
3136 
    int UNUSED insn_referenced = abuf->written;
3137 
    INT in_Rj = -1;
3138 
    INT out_Ri = -1;
3139 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3140 
  }
3141 
  {
3142 
    int referenced = 0;
3143 
    int UNUSED insn_referenced = abuf->written;
3144 
    INT in_Ri = -1;
3145 
    INT in_Rj = -1;
3146 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3147 
  }
3148 
  return cycles;
3149 
#undef FLD
3150 
}
3151 
 
3152 
static int
3153 
model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg)
3154 
{
3155 
#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
3156 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3157 
  const IDESC * UNUSED idesc = abuf->idesc;
3158 
  int cycles = 0;
3159 
  {
3160 
    int referenced = 0;
3161 
    int UNUSED insn_referenced = abuf->written;
3162 
    INT in_Rj = -1;
3163 
    INT out_Ri = -1;
3164 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3165 
  }
3166 
  return cycles;
3167 
#undef FLD
3168 
}
3169 
 
3170 
static int
3171 
model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg)
3172 
{
3173 
#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
3174 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3175 
  const IDESC * UNUSED idesc = abuf->idesc;
3176 
  int cycles = 0;
3177 
  {
3178 
    int referenced = 0;
3179 
    int UNUSED insn_referenced = abuf->written;
3180 
    INT in_Rj = -1;
3181 
    INT out_Ri = -1;
3182 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3183 
  }
3184 
  return cycles;
3185 
#undef FLD
3186 
}
3187 
 
3188 
static int
3189 
model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg)
3190 
{
3191 
#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
3192 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3193 
  const IDESC * UNUSED idesc = abuf->idesc;
3194 
  int cycles = 0;
3195 
  {
3196 
    int referenced = 0;
3197 
    int UNUSED insn_referenced = abuf->written;
3198 
    INT in_Rj = -1;
3199 
    INT out_Ri = -1;
3200 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3201 
  }
3202 
  return cycles;
3203 
#undef FLD
3204 
}
3205 
 
3206 
static int
3207 
model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg)
3208 
{
3209 
#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
3210 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3211 
  const IDESC * UNUSED idesc = abuf->idesc;
3212 
  int cycles = 0;
3213 
  {
3214 
    int referenced = 0;
3215 
    int UNUSED insn_referenced = abuf->written;
3216 
    INT in_Rj = -1;
3217 
    INT out_Ri = -1;
3218 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3219 
  }
3220 
  {
3221 
    int referenced = 0;
3222 
    int UNUSED insn_referenced = abuf->written;
3223 
    INT in_Ri = -1;
3224 
    INT in_Rj = -1;
3225 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3226 
  }
3227 
  return cycles;
3228 
#undef FLD
3229 
}
3230 
 
3231 
static int
3232 
model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg)
3233 
{
3234 
#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
3235 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3236 
  const IDESC * UNUSED idesc = abuf->idesc;
3237 
  int cycles = 0;
3238 
  {
3239 
    int referenced = 0;
3240 
    int UNUSED insn_referenced = abuf->written;
3241 
    INT in_Rj = -1;
3242 
    INT out_Ri = -1;
3243 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3244 
  }
3245 
  {
3246 
    int referenced = 0;
3247 
    int UNUSED insn_referenced = abuf->written;
3248 
    INT in_Ri = -1;
3249 
    INT in_Rj = -1;
3250 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3251 
  }
3252 
  return cycles;
3253 
#undef FLD
3254 
}
3255 
 
3256 
static int
3257 
model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg)
3258 
{
3259 
#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
3260 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3261 
  const IDESC * UNUSED idesc = abuf->idesc;
3262 
  int cycles = 0;
3263 
  {
3264 
    int referenced = 0;
3265 
    int UNUSED insn_referenced = abuf->written;
3266 
    INT in_Rj = -1;
3267 
    INT out_Ri = -1;
3268 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3269 
  }
3270 
  {
3271 
    int referenced = 0;
3272 
    int UNUSED insn_referenced = abuf->written;
3273 
    INT in_Ri = -1;
3274 
    INT in_Rj = -1;
3275 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3276 
  }
3277 
  return cycles;
3278 
#undef FLD
3279 
}
3280 
 
3281 
static int
3282 
model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg)
3283 
{
3284 
#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
3285 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3286 
  const IDESC * UNUSED idesc = abuf->idesc;
3287 
  int cycles = 0;
3288 
  {
3289 
    int referenced = 0;
3290 
    int UNUSED insn_referenced = abuf->written;
3291 
    INT in_Rj = -1;
3292 
    INT out_Ri = -1;
3293 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3294 
  }
3295 
  {
3296 
    int referenced = 0;
3297 
    int UNUSED insn_referenced = abuf->written;
3298 
    INT in_Ri = -1;
3299 
    INT in_Rj = -1;
3300 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3301 
  }
3302 
  return cycles;
3303 
#undef FLD
3304 
}
3305 
 
3306 
static int
3307 
model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg)
3308 
{
3309 
#define FLD(f) abuf->fields.sfmt_add2.f
3310 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3311 
  const IDESC * UNUSED idesc = abuf->idesc;
3312 
  int cycles = 0;
3313 
  {
3314 
    int referenced = 0;
3315 
    int UNUSED insn_referenced = abuf->written;
3316 
    INT in_Ri = -1;
3317 
    INT in_Rj = -1;
3318 
    INT out_Ri = -1;
3319 
    in_Ri = FLD (in_Ri);
3320 
    out_Ri = FLD (out_Ri);
3321 
    referenced |= 1 << 0;
3322 
    referenced |= 1 << 2;
3323 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3324 
  }
3325 
  return cycles;
3326 
#undef FLD
3327 
}
3328 
 
3329 
static int
3330 
model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg)
3331 
{
3332 
#define FLD(f) abuf->fields.sfmt_add2.f
3333 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3334 
  const IDESC * UNUSED idesc = abuf->idesc;
3335 
  int cycles = 0;
3336 
  {
3337 
    int referenced = 0;
3338 
    int UNUSED insn_referenced = abuf->written;
3339 
    INT in_Ri = -1;
3340 
    INT in_Rj = -1;
3341 
    INT out_Ri = -1;
3342 
    in_Ri = FLD (in_Ri);
3343 
    out_Ri = FLD (out_Ri);
3344 
    referenced |= 1 << 0;
3345 
    referenced |= 1 << 2;
3346 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3347 
  }
3348 
  return cycles;
3349 
#undef FLD
3350 
}
3351 
 
3352 
static int
3353 
model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg)
3354 
{
3355 
#define FLD(f) abuf->fields.fmt_empty.f
3356 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3357 
  const IDESC * UNUSED idesc = abuf->idesc;
3358 
  int cycles = 0;
3359 
  {
3360 
    int referenced = 0;
3361 
    int UNUSED insn_referenced = abuf->written;
3362 
    INT in_Ri = -1;
3363 
    INT in_Rj = -1;
3364 
    INT out_Ri = -1;
3365 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3366 
  }
3367 
  return cycles;
3368 
#undef FLD
3369 
}
3370 
 
3371 
static int
3372 
model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg)
3373 
{
3374 
#define FLD(f) abuf->fields.fmt_empty.f
3375 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3376 
  const IDESC * UNUSED idesc = abuf->idesc;
3377 
  int cycles = 0;
3378 
  {
3379 
    int referenced = 0;
3380 
    int UNUSED insn_referenced = abuf->written;
3381 
    INT in_Ri = -1;
3382 
    INT in_Rj = -1;
3383 
    INT out_Ri = -1;
3384 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3385 
  }
3386 
  return cycles;
3387 
#undef FLD
3388 
}
3389 
 
3390 
static int
3391 
model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg)
3392 
{
3393 
#define FLD(f) abuf->fields.fmt_empty.f
3394 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3395 
  const IDESC * UNUSED idesc = abuf->idesc;
3396 
  int cycles = 0;
3397 
  {
3398 
    int referenced = 0;
3399 
    int UNUSED insn_referenced = abuf->written;
3400 
    INT in_Ri = -1;
3401 
    INT in_Rj = -1;
3402 
    INT out_Ri = -1;
3403 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3404 
  }
3405 
  return cycles;
3406 
#undef FLD
3407 
}
3408 
 
3409 
static int
3410 
model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg)
3411 
{
3412 
#define FLD(f) abuf->fields.fmt_empty.f
3413 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3414 
  const IDESC * UNUSED idesc = abuf->idesc;
3415 
  int cycles = 0;
3416 
  {
3417 
    int referenced = 0;
3418 
    int UNUSED insn_referenced = abuf->written;
3419 
    INT in_Ri = -1;
3420 
    INT in_Rj = -1;
3421 
    INT out_Ri = -1;
3422 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3423 
  }
3424 
  return cycles;
3425 
#undef FLD
3426 
}
3427 
 
3428 
static int
3429 
model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg)
3430 
{
3431 
#define FLD(f) abuf->fields.fmt_empty.f
3432 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3433 
  const IDESC * UNUSED idesc = abuf->idesc;
3434 
  int cycles = 0;
3435 
  {
3436 
    int referenced = 0;
3437 
    int UNUSED insn_referenced = abuf->written;
3438 
    INT in_Ri = -1;
3439 
    INT in_Rj = -1;
3440 
    INT out_Ri = -1;
3441 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3442 
  }
3443 
  return cycles;
3444 
#undef FLD
3445 
}
3446 
 
3447 
static int
3448 
model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg)
3449 
{
3450 
#define FLD(f) abuf->fields.sfmt_int.f
3451 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3452 
  const IDESC * UNUSED idesc = abuf->idesc;
3453 
  int cycles = 0;
3454 
  {
3455 
    int referenced = 0;
3456 
    int UNUSED insn_referenced = abuf->written;
3457 
    INT in_Ri = -1;
3458 
    INT in_Rj = -1;
3459 
    INT out_Ri = -1;
3460 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3461 
  }
3462 
  return cycles;
3463 
#undef FLD
3464 
}
3465 
 
3466 
static int
3467 
model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg)
3468 
{
3469 
#define FLD(f) abuf->fields.sfmt_int.f
3470 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3471 
  const IDESC * UNUSED idesc = abuf->idesc;
3472 
  int cycles = 0;
3473 
  {
3474 
    int referenced = 0;
3475 
    int UNUSED insn_referenced = abuf->written;
3476 
    INT in_Ri = -1;
3477 
    INT in_Rj = -1;
3478 
    INT out_Ri = -1;
3479 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3480 
  }
3481 
  return cycles;
3482 
#undef FLD
3483 
}
3484 
 
3485 
static int
3486 
model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg)
3487 
{
3488 
#define FLD(f) abuf->fields.sfmt_int.f
3489 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3490 
  const IDESC * UNUSED idesc = abuf->idesc;
3491 
  int cycles = 0;
3492 
  {
3493 
    int referenced = 0;
3494 
    int UNUSED insn_referenced = abuf->written;
3495 
    INT in_Ri = -1;
3496 
    INT in_Rj = -1;
3497 
    INT out_Ri = -1;
3498 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3499 
  }
3500 
  return cycles;
3501 
#undef FLD
3502 
}
3503 
 
3504 
static int
3505 
model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg)
3506 
{
3507 
#define FLD(f) abuf->fields.sfmt_addsp.f
3508 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3509 
  const IDESC * UNUSED idesc = abuf->idesc;
3510 
  int cycles = 0;
3511 
  {
3512 
    int referenced = 0;
3513 
    int UNUSED insn_referenced = abuf->written;
3514 
    INT in_Ri = -1;
3515 
    INT in_Rj = -1;
3516 
    INT out_Ri = -1;
3517 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3518 
  }
3519 
  return cycles;
3520 
#undef FLD
3521 
}
3522 
 
3523 
static int
3524 
model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg)
3525 
{
3526 
#define FLD(f) abuf->fields.sfmt_add2.f
3527 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3528 
  const IDESC * UNUSED idesc = abuf->idesc;
3529 
  int cycles = 0;
3530 
  {
3531 
    int referenced = 0;
3532 
    int UNUSED insn_referenced = abuf->written;
3533 
    INT in_Ri = -1;
3534 
    INT in_Rj = -1;
3535 
    INT out_Ri = -1;
3536 
    in_Ri = FLD (in_Ri);
3537 
    out_Ri = FLD (out_Ri);
3538 
    referenced |= 1 << 0;
3539 
    referenced |= 1 << 2;
3540 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3541 
  }
3542 
  return cycles;
3543 
#undef FLD
3544 
}
3545 
 
3546 
static int
3547 
model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg)
3548 
{
3549 
#define FLD(f) abuf->fields.sfmt_add2.f
3550 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3551 
  const IDESC * UNUSED idesc = abuf->idesc;
3552 
  int cycles = 0;
3553 
  {
3554 
    int referenced = 0;
3555 
    int UNUSED insn_referenced = abuf->written;
3556 
    INT in_Ri = -1;
3557 
    INT in_Rj = -1;
3558 
    INT out_Ri = -1;
3559 
    in_Ri = FLD (in_Ri);
3560 
    out_Ri = FLD (out_Ri);
3561 
    referenced |= 1 << 0;
3562 
    referenced |= 1 << 2;
3563 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3564 
  }
3565 
  return cycles;
3566 
#undef FLD
3567 
}
3568 
 
3569 
static int
3570 
model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg)
3571 
{
3572 
#define FLD(f) abuf->fields.sfmt_add2.f
3573 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3574 
  const IDESC * UNUSED idesc = abuf->idesc;
3575 
  int cycles = 0;
3576 
  {
3577 
    int referenced = 0;
3578 
    int UNUSED insn_referenced = abuf->written;
3579 
    INT in_Ri = -1;
3580 
    INT in_Rj = -1;
3581 
    INT out_Ri = -1;
3582 
    in_Ri = FLD (in_Ri);
3583 
    out_Ri = FLD (out_Ri);
3584 
    referenced |= 1 << 0;
3585 
    referenced |= 1 << 2;
3586 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3587 
  }
3588 
  return cycles;
3589 
#undef FLD
3590 
}
3591 
 
3592 
static int
3593 
model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg)
3594 
{
3595 
#define FLD(f) abuf->fields.sfmt_add2.f
3596 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3597 
  const IDESC * UNUSED idesc = abuf->idesc;
3598 
  int cycles = 0;
3599 
  {
3600 
    int referenced = 0;
3601 
    int UNUSED insn_referenced = abuf->written;
3602 
    INT in_Ri = -1;
3603 
    INT in_Rj = -1;
3604 
    INT out_Ri = -1;
3605 
    in_Ri = FLD (in_Ri);
3606 
    out_Ri = FLD (out_Ri);
3607 
    referenced |= 1 << 0;
3608 
    referenced |= 1 << 2;
3609 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3610 
  }
3611 
  return cycles;
3612 
#undef FLD
3613 
}
3614 
 
3615 
static int
3616 
model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg)
3617 
{
3618 
#define FLD(f) abuf->fields.sfmt_ldm0.f
3619 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3620 
  const IDESC * UNUSED idesc = abuf->idesc;
3621 
  int cycles = 0;
3622 
  {
3623 
    int referenced = 0;
3624 
    int UNUSED insn_referenced = abuf->written;
3625 
    INT in_reglist = 0;
3626 
    cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist);
3627 
  }
3628 
  return cycles;
3629 
#undef FLD
3630 
}
3631 
 
3632 
static int
3633 
model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg)
3634 
{
3635 
#define FLD(f) abuf->fields.sfmt_ldm1.f
3636 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3637 
  const IDESC * UNUSED idesc = abuf->idesc;
3638 
  int cycles = 0;
3639 
  {
3640 
    int referenced = 0;
3641 
    int UNUSED insn_referenced = abuf->written;
3642 
    INT in_reglist = 0;
3643 
    cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist);
3644 
  }
3645 
  return cycles;
3646 
#undef FLD
3647 
}
3648 
 
3649 
static int
3650 
model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg)
3651 
{
3652 
#define FLD(f) abuf->fields.sfmt_stm0.f
3653 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3654 
  const IDESC * UNUSED idesc = abuf->idesc;
3655 
  int cycles = 0;
3656 
  {
3657 
    int referenced = 0;
3658 
    int UNUSED insn_referenced = abuf->written;
3659 
    INT in_reglist = 0;
3660 
    cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist);
3661 
  }
3662 
  return cycles;
3663 
#undef FLD
3664 
}
3665 
 
3666 
static int
3667 
model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg)
3668 
{
3669 
#define FLD(f) abuf->fields.sfmt_stm1.f
3670 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3671 
  const IDESC * UNUSED idesc = abuf->idesc;
3672 
  int cycles = 0;
3673 
  {
3674 
    int referenced = 0;
3675 
    int UNUSED insn_referenced = abuf->written;
3676 
    INT in_reglist = 0;
3677 
    cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist);
3678 
  }
3679 
  return cycles;
3680 
#undef FLD
3681 
}
3682 
 
3683 
static int
3684 
model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg)
3685 
{
3686 
#define FLD(f) abuf->fields.sfmt_enter.f
3687 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3688 
  const IDESC * UNUSED idesc = abuf->idesc;
3689 
  int cycles = 0;
3690 
  {
3691 
    int referenced = 0;
3692 
    int UNUSED insn_referenced = abuf->written;
3693 
    INT in_Ri = -1;
3694 
    INT in_Rj = -1;
3695 
    INT out_Ri = -1;
3696 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3697 
  }
3698 
  return cycles;
3699 
#undef FLD
3700 
}
3701 
 
3702 
static int
3703 
model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg)
3704 
{
3705 
#define FLD(f) abuf->fields.sfmt_enter.f
3706 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3707 
  const IDESC * UNUSED idesc = abuf->idesc;
3708 
  int cycles = 0;
3709 
  {
3710 
    int referenced = 0;
3711 
    int UNUSED insn_referenced = abuf->written;
3712 
    INT in_Ri = -1;
3713 
    INT in_Rj = -1;
3714 
    INT out_Ri = -1;
3715 
    cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
3716 
  }
3717 
  return cycles;
3718 
#undef FLD
3719 
}
3720 
 
3721 
static int
3722 
model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg)
3723 
{
3724 
#define FLD(f) abuf->fields.sfmt_add.f
3725 
  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3726 
  const IDESC * UNUSED idesc = abuf->idesc;
3727 
  int cycles = 0;
3728 
  {
3729 
    int referenced = 0;
3730 
    int UNUSED insn_referenced = abuf->written;
3731 
    INT in_Rj = -1;
3732 
    INT out_Ri = -1;
3733 
    in_Rj = FLD (in_Rj);
3734 
    out_Ri = FLD (out_Ri);
3735 
    referenced |= 1 << 0;
3736 
    referenced |= 1 << 1;
3737 
    cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
3738 
  }
3739 
  {
3740 
    int referenced = 0;
3741 
    int UNUSED insn_referenced = abuf->written;
3742 
    INT in_Ri = -1;
3743 
    INT in_Rj = -1;
3744 
    in_Ri = FLD (in_Ri);
3745 
    in_Rj = FLD (in_Rj);
3746 
    referenced |= 1 << 0;
3747 
    referenced |= 1 << 1;
3748 
    cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
3749 
  }
3750 
  return cycles;
3751 
#undef FLD
3752 
}
3753 
 
3754 
/* We assume UNIT_NONE == 0 because the tables don't always terminate
3755 
   entries with it.  */
3756 
 
3757 
/* Model timing data for `fr30-1'.  */
3758 
 
3759 
static const INSN_TIMING fr30_1_timing[] = {
3760 
  { FR30BF_INSN_X_INVALID, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3761 
  { FR30BF_INSN_X_AFTER, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3762 
  { FR30BF_INSN_X_BEFORE, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3763 
  { FR30BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3764 
  { FR30BF_INSN_X_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3765 
  { FR30BF_INSN_X_BEGIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3766 
  { FR30BF_INSN_ADD, model_fr30_1_add, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3767 
  { FR30BF_INSN_ADDI, model_fr30_1_addi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3768 
  { FR30BF_INSN_ADD2, model_fr30_1_add2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3769 
  { FR30BF_INSN_ADDC, model_fr30_1_addc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3770 
  { FR30BF_INSN_ADDN, model_fr30_1_addn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3771 
  { FR30BF_INSN_ADDNI, model_fr30_1_addni, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3772 
  { FR30BF_INSN_ADDN2, model_fr30_1_addn2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3773 
  { FR30BF_INSN_SUB, model_fr30_1_sub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3774 
  { FR30BF_INSN_SUBC, model_fr30_1_subc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3775 
  { FR30BF_INSN_SUBN, model_fr30_1_subn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3776 
  { FR30BF_INSN_CMP, model_fr30_1_cmp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3777 
  { FR30BF_INSN_CMPI, model_fr30_1_cmpi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3778 
  { FR30BF_INSN_CMP2, model_fr30_1_cmp2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3779 
  { FR30BF_INSN_AND, model_fr30_1_and, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3780 
  { FR30BF_INSN_OR, model_fr30_1_or, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3781 
  { FR30BF_INSN_EOR, model_fr30_1_eor, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3782 
  { FR30BF_INSN_ANDM, model_fr30_1_andm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3783 
  { FR30BF_INSN_ANDH, model_fr30_1_andh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3784 
  { FR30BF_INSN_ANDB, model_fr30_1_andb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3785 
  { FR30BF_INSN_ORM, model_fr30_1_orm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3786 
  { FR30BF_INSN_ORH, model_fr30_1_orh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3787 
  { FR30BF_INSN_ORB, model_fr30_1_orb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3788 
  { FR30BF_INSN_EORM, model_fr30_1_eorm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3789 
  { FR30BF_INSN_EORH, model_fr30_1_eorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3790 
  { FR30BF_INSN_EORB, model_fr30_1_eorb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3791 
  { FR30BF_INSN_BANDL, model_fr30_1_bandl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3792 
  { FR30BF_INSN_BORL, model_fr30_1_borl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3793 
  { FR30BF_INSN_BEORL, model_fr30_1_beorl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3794 
  { FR30BF_INSN_BANDH, model_fr30_1_bandh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3795 
  { FR30BF_INSN_BORH, model_fr30_1_borh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3796 
  { FR30BF_INSN_BEORH, model_fr30_1_beorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3797 
  { FR30BF_INSN_BTSTL, model_fr30_1_btstl, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
3798 
  { FR30BF_INSN_BTSTH, model_fr30_1_btsth, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
3799 
  { FR30BF_INSN_MUL, model_fr30_1_mul, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } },
3800 
  { FR30BF_INSN_MULU, model_fr30_1_mulu, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } },
3801 
  { FR30BF_INSN_MULH, model_fr30_1_mulh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
3802 
  { FR30BF_INSN_MULUH, model_fr30_1_muluh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
3803 
  { FR30BF_INSN_DIV0S, model_fr30_1_div0s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3804 
  { FR30BF_INSN_DIV0U, model_fr30_1_div0u, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3805 
  { FR30BF_INSN_DIV1, model_fr30_1_div1, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3806 
  { FR30BF_INSN_DIV2, model_fr30_1_div2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3807 
  { FR30BF_INSN_DIV3, model_fr30_1_div3, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3808 
  { FR30BF_INSN_DIV4S, model_fr30_1_div4s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3809 
  { FR30BF_INSN_LSL, model_fr30_1_lsl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3810 
  { FR30BF_INSN_LSLI, model_fr30_1_lsli, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3811 
  { FR30BF_INSN_LSL2, model_fr30_1_lsl2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3812 
  { FR30BF_INSN_LSR, model_fr30_1_lsr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3813 
  { FR30BF_INSN_LSRI, model_fr30_1_lsri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3814 
  { FR30BF_INSN_LSR2, model_fr30_1_lsr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3815 
  { FR30BF_INSN_ASR, model_fr30_1_asr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3816 
  { FR30BF_INSN_ASRI, model_fr30_1_asri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3817 
  { FR30BF_INSN_ASR2, model_fr30_1_asr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3818 
  { FR30BF_INSN_LDI8, model_fr30_1_ldi8, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3819 
  { FR30BF_INSN_LDI20, model_fr30_1_ldi20, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
3820 
  { FR30BF_INSN_LDI32, model_fr30_1_ldi32, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
3821 
  { FR30BF_INSN_LD, model_fr30_1_ld, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3822 
  { FR30BF_INSN_LDUH, model_fr30_1_lduh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3823 
  { FR30BF_INSN_LDUB, model_fr30_1_ldub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3824 
  { FR30BF_INSN_LDR13, model_fr30_1_ldr13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3825 
  { FR30BF_INSN_LDR13UH, model_fr30_1_ldr13uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3826 
  { FR30BF_INSN_LDR13UB, model_fr30_1_ldr13ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3827 
  { FR30BF_INSN_LDR14, model_fr30_1_ldr14, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3828 
  { FR30BF_INSN_LDR14UH, model_fr30_1_ldr14uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3829 
  { FR30BF_INSN_LDR14UB, model_fr30_1_ldr14ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3830 
  { FR30BF_INSN_LDR15, model_fr30_1_ldr15, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3831 
  { FR30BF_INSN_LDR15GR, model_fr30_1_ldr15gr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3832 
  { FR30BF_INSN_LDR15DR, model_fr30_1_ldr15dr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3833 
  { FR30BF_INSN_LDR15PS, model_fr30_1_ldr15ps, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3834 
  { FR30BF_INSN_ST, model_fr30_1_st, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3835 
  { FR30BF_INSN_STH, model_fr30_1_sth, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3836 
  { FR30BF_INSN_STB, model_fr30_1_stb, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3837 
  { FR30BF_INSN_STR13, model_fr30_1_str13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3838 
  { FR30BF_INSN_STR13H, model_fr30_1_str13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3839 
  { FR30BF_INSN_STR13B, model_fr30_1_str13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3840 
  { FR30BF_INSN_STR14, model_fr30_1_str14, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3841 
  { FR30BF_INSN_STR14H, model_fr30_1_str14h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3842 
  { FR30BF_INSN_STR14B, model_fr30_1_str14b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3843 
  { FR30BF_INSN_STR15, model_fr30_1_str15, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3844 
  { FR30BF_INSN_STR15GR, model_fr30_1_str15gr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3845 
  { FR30BF_INSN_STR15DR, model_fr30_1_str15dr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3846 
  { FR30BF_INSN_STR15PS, model_fr30_1_str15ps, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3847 
  { FR30BF_INSN_MOV, model_fr30_1_mov, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3848 
  { FR30BF_INSN_MOVDR, model_fr30_1_movdr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3849 
  { FR30BF_INSN_MOVPS, model_fr30_1_movps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3850 
  { FR30BF_INSN_MOV2DR, model_fr30_1_mov2dr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3851 
  { FR30BF_INSN_MOV2PS, model_fr30_1_mov2ps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3852 
  { FR30BF_INSN_JMP, model_fr30_1_jmp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3853 
  { FR30BF_INSN_JMPD, model_fr30_1_jmpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3854 
  { FR30BF_INSN_CALLR, model_fr30_1_callr, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3855 
  { FR30BF_INSN_CALLRD, model_fr30_1_callrd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3856 
  { FR30BF_INSN_CALL, model_fr30_1_call, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3857 
  { FR30BF_INSN_CALLD, model_fr30_1_calld, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3858 
  { FR30BF_INSN_RET, model_fr30_1_ret, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3859 
  { FR30BF_INSN_RET_D, model_fr30_1_ret_d, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3860 
  { FR30BF_INSN_INT, model_fr30_1_int, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } },
3861 
  { FR30BF_INSN_INTE, model_fr30_1_inte, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } },
3862 
  { FR30BF_INSN_RETI, model_fr30_1_reti, { { (int) UNIT_FR30_1_U_EXEC, 1, 4 } } },
3863 
  { FR30BF_INSN_BRAD, model_fr30_1_brad, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3864 
  { FR30BF_INSN_BRA, model_fr30_1_bra, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3865 
  { FR30BF_INSN_BNOD, model_fr30_1_bnod, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3866 
  { FR30BF_INSN_BNO, model_fr30_1_bno, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3867 
  { FR30BF_INSN_BEQD, model_fr30_1_beqd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3868 
  { FR30BF_INSN_BEQ, model_fr30_1_beq, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3869 
  { FR30BF_INSN_BNED, model_fr30_1_bned, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3870 
  { FR30BF_INSN_BNE, model_fr30_1_bne, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3871 
  { FR30BF_INSN_BCD, model_fr30_1_bcd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3872 
  { FR30BF_INSN_BC, model_fr30_1_bc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3873 
  { FR30BF_INSN_BNCD, model_fr30_1_bncd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3874 
  { FR30BF_INSN_BNC, model_fr30_1_bnc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3875 
  { FR30BF_INSN_BND, model_fr30_1_bnd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3876 
  { FR30BF_INSN_BN, model_fr30_1_bn, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3877 
  { FR30BF_INSN_BPD, model_fr30_1_bpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3878 
  { FR30BF_INSN_BP, model_fr30_1_bp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3879 
  { FR30BF_INSN_BVD, model_fr30_1_bvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3880 
  { FR30BF_INSN_BV, model_fr30_1_bv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3881 
  { FR30BF_INSN_BNVD, model_fr30_1_bnvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3882 
  { FR30BF_INSN_BNV, model_fr30_1_bnv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3883 
  { FR30BF_INSN_BLTD, model_fr30_1_bltd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3884 
  { FR30BF_INSN_BLT, model_fr30_1_blt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3885 
  { FR30BF_INSN_BGED, model_fr30_1_bged, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3886 
  { FR30BF_INSN_BGE, model_fr30_1_bge, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3887 
  { FR30BF_INSN_BLED, model_fr30_1_bled, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3888 
  { FR30BF_INSN_BLE, model_fr30_1_ble, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3889 
  { FR30BF_INSN_BGTD, model_fr30_1_bgtd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3890 
  { FR30BF_INSN_BGT, model_fr30_1_bgt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3891 
  { FR30BF_INSN_BLSD, model_fr30_1_blsd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3892 
  { FR30BF_INSN_BLS, model_fr30_1_bls, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3893 
  { FR30BF_INSN_BHID, model_fr30_1_bhid, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3894 
  { FR30BF_INSN_BHI, model_fr30_1_bhi, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
3895 
  { FR30BF_INSN_DMOVR13, model_fr30_1_dmovr13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3896 
  { FR30BF_INSN_DMOVR13H, model_fr30_1_dmovr13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3897 
  { FR30BF_INSN_DMOVR13B, model_fr30_1_dmovr13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3898 
  { FR30BF_INSN_DMOVR13PI, model_fr30_1_dmovr13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3899 
  { FR30BF_INSN_DMOVR13PIH, model_fr30_1_dmovr13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3900 
  { FR30BF_INSN_DMOVR13PIB, model_fr30_1_dmovr13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3901 
  { FR30BF_INSN_DMOVR15PI, model_fr30_1_dmovr15pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3902 
  { FR30BF_INSN_DMOV2R13, model_fr30_1_dmov2r13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3903 
  { FR30BF_INSN_DMOV2R13H, model_fr30_1_dmov2r13h, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3904 
  { FR30BF_INSN_DMOV2R13B, model_fr30_1_dmov2r13b, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
3905 
  { FR30BF_INSN_DMOV2R13PI, model_fr30_1_dmov2r13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3906 
  { FR30BF_INSN_DMOV2R13PIH, model_fr30_1_dmov2r13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3907 
  { FR30BF_INSN_DMOV2R13PIB, model_fr30_1_dmov2r13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3908 
  { FR30BF_INSN_DMOV2R15PD, model_fr30_1_dmov2r15pd, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3909 
  { FR30BF_INSN_LDRES, model_fr30_1_ldres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3910 
  { FR30BF_INSN_STRES, model_fr30_1_stres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3911 
  { FR30BF_INSN_COPOP, model_fr30_1_copop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3912 
  { FR30BF_INSN_COPLD, model_fr30_1_copld, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3913 
  { FR30BF_INSN_COPST, model_fr30_1_copst, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3914 
  { FR30BF_INSN_COPSV, model_fr30_1_copsv, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3915 
  { FR30BF_INSN_NOP, model_fr30_1_nop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3916 
  { FR30BF_INSN_ANDCCR, model_fr30_1_andccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3917 
  { FR30BF_INSN_ORCCR, model_fr30_1_orccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3918 
  { FR30BF_INSN_STILM, model_fr30_1_stilm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3919 
  { FR30BF_INSN_ADDSP, model_fr30_1_addsp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3920 
  { FR30BF_INSN_EXTSB, model_fr30_1_extsb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3921 
  { FR30BF_INSN_EXTUB, model_fr30_1_extub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3922 
  { FR30BF_INSN_EXTSH, model_fr30_1_extsh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3923 
  { FR30BF_INSN_EXTUH, model_fr30_1_extuh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3924 
  { FR30BF_INSN_LDM0, model_fr30_1_ldm0, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } },
3925 
  { FR30BF_INSN_LDM1, model_fr30_1_ldm1, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } },
3926 
  { FR30BF_INSN_STM0, model_fr30_1_stm0, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } },
3927 
  { FR30BF_INSN_STM1, model_fr30_1_stm1, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } },
3928 
  { FR30BF_INSN_ENTER, model_fr30_1_enter, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
3929 
  { FR30BF_INSN_LEAVE, model_fr30_1_leave, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
3930 
  { FR30BF_INSN_XCHB, model_fr30_1_xchb, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
3931 
};
3932 
 
3933 
#endif /* WITH_PROFILE_MODEL_P */
3934 
 
3935 
static void
3936 
fr30_1_model_init (SIM_CPU *cpu)
3937 
{
3938 
  CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR30_1_DATA));
3939 
}
3940 
 
3941 
#if WITH_PROFILE_MODEL_P
3942 
#define TIMING_DATA(td) td
3943 
#else
3944 
#define TIMING_DATA(td) 0
3945 
#endif
3946 
 
3947 
static const MODEL fr30_models[] =
3948 
{
3949 
  { "fr30-1", & fr30_mach, MODEL_FR30_1, TIMING_DATA (& fr30_1_timing[0]), fr30_1_model_init },
3950 
  { 0 }
3951 
};
3952 
 
3953 
/* The properties of this cpu's implementation.  */
3954 
 
3955 
static const MACH_IMP_PROPERTIES fr30bf_imp_properties =
3956 
{
3957 
  sizeof (SIM_CPU),
3958 
#if WITH_SCACHE
3959 
  sizeof (SCACHE)
3960 
#else
3961 
 
3962 
#endif
3963 
};
3964 
 
3965 
 
3966 
static void
3967 
fr30bf_prepare_run (SIM_CPU *cpu)
3968 
{
3969 
  if (CPU_IDESC (cpu) == NULL)
3970 
    fr30bf_init_idesc_table (cpu);
3971 
}
3972 
 
3973 
static const CGEN_INSN *
3974 
fr30bf_get_idata (SIM_CPU *cpu, int inum)
3975 
{
3976 
  return CPU_IDESC (cpu) [inum].idata;
3977 
}
3978 
 
3979 
static void
3980 
fr30_init_cpu (SIM_CPU *cpu)
3981 
{
3982 
  CPU_REG_FETCH (cpu) = fr30bf_fetch_register;
3983 
  CPU_REG_STORE (cpu) = fr30bf_store_register;
3984 
  CPU_PC_FETCH (cpu) = fr30bf_h_pc_get;
3985 
  CPU_PC_STORE (cpu) = fr30bf_h_pc_set;
3986 
  CPU_GET_IDATA (cpu) = fr30bf_get_idata;
3987 
  CPU_MAX_INSNS (cpu) = FR30BF_INSN_MAX;
3988 
  CPU_INSN_NAME (cpu) = cgen_insn_name;
3989 
  CPU_FULL_ENGINE_FN (cpu) = fr30bf_engine_run_full;
3990 
#if WITH_FAST
3991 
  CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_fast;
3992 
#else
3993 
  CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_full;
3994 
#endif
3995 
}
3996 
 
3997 
const MACH fr30_mach =
3998 
{
3999 
  "fr30", "fr30", MACH_FR30,
4000 
  32, 32, & fr30_models[0], & fr30bf_imp_properties,
4001 
  fr30_init_cpu,
4002 
  fr30bf_prepare_run
4003 
};
4004 
 

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