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[/] [or1k_old/] [trunk/] [gdb-5.0/] [sim/] [mn10300/] [dv-mn103ser.c] - Blame information for rev 1782

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/*  This file is part of the program GDB, the GNU debugger.
 
    Copyright (C) 1998 Free Software Foundation, Inc.
    Contributed by Cygnus Solutions.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 
    */
 
#include "sim-main.h"
#include "hw-main.h"
#include "dv-sockser.h"
 
 
/* DEVICE
 
 
   mn103ser - mn103002 serial devices 0, 1 and 2.
 
 
   DESCRIPTION
 
   Implements the mn103002 serial interfaces as described in the
   mn103002 user guide.
 
 
   PROPERTIES
 
   reg = <serial-addr> <serial-size>
 
 
   BUGS
 
   */
 
 
/* The serial devices' registers' address block */
 
struct mn103ser_block {
  unsigned_word base;
  unsigned_word bound;
};
 
 
 
enum serial_register_types {
    SC0CTR,
    SC1CTR,
    SC2CTR,
    SC0ICR,
    SC1ICR,
    SC2ICR,
    SC0TXB,
    SC1TXB,
    SC2TXB,
    SC0RXB,
    SC1RXB,
    SC2RXB,
    SC0STR,
    SC1STR,
    SC2STR,
    SC2TIM,
};
 
 
/* Access dv-sockser state */
extern char* sockser_addr;
#define USE_SOCKSER_P (sockser_addr != NULL)
 
 
#define NR_SERIAL_DEVS  3
#define SIO_STAT_RRDY 0x0010
 
typedef struct _mn10300_serial {
  unsigned16 status, control;
  unsigned8  txb, rxb, intmode;
  struct hw_event *event;
} mn10300_serial;
 
 
 
struct mn103ser {
  struct mn103ser_block block;
  mn10300_serial device[NR_SERIAL_DEVS];
  unsigned8      serial2_timer_reg;
  do_hw_poll_read_method *reader;
};
 
/* output port ID's */
 
/* for mn103002 */
enum {
  SERIAL0_RECEIVE,
  SERIAL1_RECEIVE,
  SERIAL2_RECEIVE,
  SERIAL0_SEND,
  SERIAL1_SEND,
  SERIAL2_SEND,
};
 
 
static const struct hw_port_descriptor mn103ser_ports[] = {
 
  { "serial-0-receive",  SERIAL0_RECEIVE, 0, output_port, },
  { "serial-1-receive",  SERIAL1_RECEIVE, 0, output_port, },
  { "serial-2-receive",  SERIAL2_RECEIVE, 0, output_port, },
  { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
  { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
  { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
 
  { NULL, },
};
 
 
 
/* Finish off the partially created hw device.  Attach our local
   callbacks.  Wire up our port names etc */
 
static hw_io_read_buffer_method mn103ser_io_read_buffer;
static hw_io_write_buffer_method mn103ser_io_write_buffer;
 
static void
attach_mn103ser_regs (struct hw *me,
                      struct mn103ser *serial)
{
  unsigned_word attach_address;
  int attach_space;
  unsigned attach_size;
  reg_property_spec reg;
 
  if (hw_find_property (me, "reg") == NULL)
    hw_abort (me, "Missing \"reg\" property");
 
  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
    hw_abort (me, "\"reg\" property must contain three addr/size entries");
  hw_unit_address_to_attach_address (hw_parent (me),
                                     &reg.address,
                                     &attach_space,
                                     &attach_address,
                                     me);
  serial->block.base = attach_address;
  hw_unit_size_to_attach_size (hw_parent (me),
                               &reg.size,
                               &attach_size, me);
  serial->block.bound = attach_address + (attach_size - 1);
  hw_attach_address (hw_parent (me),
                     0,
                     attach_space, attach_address, attach_size,
                     me);
}
 
static void
mn103ser_finish (struct hw *me)
{
  struct mn103ser *serial;
  int i;
 
  serial = HW_ZALLOC (me, struct mn103ser);
  set_hw_data (me, serial);
  set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
  set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
  set_hw_ports (me, mn103ser_ports);
 
  /* Attach ourself to our parent bus */
  attach_mn103ser_regs (me, serial);
 
  /* If so configured, enable polled input */
  if (hw_find_property (me, "poll?") != NULL
      && hw_find_boolean_property (me, "poll?"))
    {
      serial->reader = sim_io_poll_read;
    }
  else
    {
      serial->reader = sim_io_read;
    }
 
  /* Initialize the serial device registers. */
  for ( i=0; i<NR_SERIAL_DEVS; ++i )
    {
      serial->device[i].txb = 0;
      serial->device[i].rxb = 0;
      serial->device[i].status = 0;
      serial->device[i].control = 0;
      serial->device[i].intmode = 0;
      serial->device[i].event = NULL;
    }
}
 
 
/* read and write */
 
static int
decode_addr (struct hw *me,
             struct mn103ser *serial,
             unsigned_word address)
{
  unsigned_word offset;
  offset = address - serial->block.base;
  switch (offset)
    {
    case 0x00: return SC0CTR;
    case 0x04: return SC0ICR;
    case 0x08: return SC0TXB;
    case 0x09: return SC0RXB;
    case 0x0C: return SC0STR;
    case 0x10: return SC1CTR;
    case 0x14: return SC1ICR;
    case 0x18: return SC1TXB;
    case 0x19: return SC1RXB;
    case 0x1C: return SC1STR;
    case 0x20: return SC2CTR;
    case 0x24: return SC2ICR;
    case 0x28: return SC2TXB;
    case 0x29: return SC2RXB;
    case 0x2C: return SC2STR;
    case 0x2D: return SC2TIM;
    default:
      {
        hw_abort (me, "bad address");
        return -1;
      }
    }
}
 
static void
do_polling_event (struct hw *me,
                  void *data)
{
  struct mn103ser *serial = hw_data(me);
  int serial_reg = (int) data;
  char c;
  int count;
 
  if(USE_SOCKSER_P)
    {
      int rd;
      rd = dv_sockser_read (hw_system (me));
      if(rd != -1)
        {
          c = (char) rd;
          count = 1;
        }
      else
        {
          count = HW_IO_NOT_READY;
        }
    }
  else
    {
      count = do_hw_poll_read (me, serial->reader,
                               0/*STDIN*/, &c, sizeof(c));
    }
 
 
  switch (count)
    {
    case HW_IO_NOT_READY:
    case HW_IO_EOF:
      serial->device[serial_reg].rxb = 0;
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
      break;
    default:
      serial->device[serial_reg].rxb = c;
      serial->device[serial_reg].status |= SIO_STAT_RRDY;
      hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
    }
 
  /* Schedule next polling event */
  serial->device[serial_reg].event
    = hw_event_queue_schedule (me, 1000,
                               do_polling_event, (void *)serial_reg);
 
}
 
static void
read_control_reg (struct hw *me,
                  struct mn103ser *serial,
                  unsigned_word serial_reg,
                  void *dest,
                  unsigned  nr_bytes)
{
  /* really allow 1 byte read, too */
  if ( nr_bytes == 2 )
    {
      *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].control);
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
read_intmode_reg (struct hw *me,
                  struct mn103ser *serial,
                  unsigned_word serial_reg,
                  void *dest,
                  unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(unsigned8 *)dest = serial->device[serial_reg].intmode;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
read_txb (struct hw *me,
          struct mn103ser *serial,
          unsigned_word serial_reg,
          void *dest,
          unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(unsigned8 *)dest = serial->device[serial_reg].txb;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
read_rxb (struct hw *me,
          struct mn103ser *serial,
          unsigned_word serial_reg,
          void *dest,
          unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      *(unsigned8 *)dest = serial->device[serial_reg].rxb;
      /* Reception buffer is now empty. */
      serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
read_status_reg (struct hw *me,
                 struct mn103ser *serial,
                 unsigned_word serial_reg,
                 void *dest,
                 unsigned  nr_bytes)
{
  char c;
  int count;
 
  if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
    {
      /* FIFO is empty */
      /* Kill current poll event */
      if ( NULL != serial->device[serial_reg].event )
        {
          hw_event_queue_deschedule (me, serial->device[serial_reg].event);
          serial->device[serial_reg].event = NULL;
        }
 
      if(USE_SOCKSER_P)
        {
          int rd;
          rd = dv_sockser_read (hw_system (me));
          if(rd != -1)
            {
              c = (char) rd;
              count = 1;
            }
          else
            {
              count = HW_IO_NOT_READY;
            }
        }
      else
        {
          count = do_hw_poll_read (me, serial->reader,
                                   0/*STDIN*/, &c, sizeof(c));
        }
 
      switch (count)
        {
        case HW_IO_NOT_READY:
        case HW_IO_EOF:
          serial->device[serial_reg].rxb = 0;
          serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
          break;
        default:
          serial->device[serial_reg].rxb = c;
          serial->device[serial_reg].status |= SIO_STAT_RRDY;
          hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
        }
 
      /* schedule polling event */
      serial->device[serial_reg].event
        = hw_event_queue_schedule (me, 1000,
                                   do_polling_event,
                                   (void *)serial_reg);
    }
 
  if ( nr_bytes == 1 )
    {
      *(unsigned8 *)dest = (unsigned8)serial->device[serial_reg].status;
    }
  else if ( nr_bytes == 2 && serial_reg != SC2STR )
    {
      *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].status);
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
read_serial2_timer_reg (struct hw *me,
                        struct mn103ser *serial,
                        void *dest,
                        unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      * (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
    }
}
 
 
static unsigned
mn103ser_io_read_buffer (struct hw *me,
                         void *dest,
                         int space,
                         unsigned_word base,
                         unsigned nr_bytes)
{
  struct mn103ser *serial = hw_data (me);
  enum serial_register_types serial_reg;
  HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
 
  serial_reg = decode_addr (me, serial, base);
  switch (serial_reg)
    {
    /* control registers */
    case SC0CTR:
    case SC1CTR:
    case SC2CTR:
      read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
      HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
                 *(unsigned8 *)dest));
      break;
 
    /* interrupt mode registers */
    case SC0ICR:
    case SC1ICR:
    case SC2ICR:
      read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
      HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
                 *(unsigned8 *)dest));
      break;
 
    /* transmission buffers */
    case SC0TXB:
    case SC1TXB:
    case SC2TXB:
      read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
      HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
                 *(char *)dest));
      break;
 
    /* reception buffers */
    case SC0RXB:
    case SC1RXB:
    case SC2RXB:
      read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
      HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
                 *(char *)dest));
     break;
 
    /* status registers */
    case SC0STR:
    case SC1STR:
    case SC2STR:
      read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
      HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
                 *(unsigned8 *)dest));
      break;
 
    case SC2TIM:
      read_serial2_timer_reg(me, serial, dest, nr_bytes);
      HW_TRACE ((me, "read - serial2 timer reg %d\n", *(unsigned8 *)dest));
      break;
 
    default:
      hw_abort(me, "invalid address");
    }
 
  return nr_bytes;
}
 
 
static void
write_control_reg (struct hw *me,
                   struct mn103ser *serial,
                   unsigned_word serial_reg,
                   const void *source,
                   unsigned  nr_bytes)
{
  unsigned16 val = LE2H_2 (*(unsigned16 *)source);
 
  /* really allow 1 byte write, too */
  if ( nr_bytes == 2 )
    {
      if ( serial_reg == 2 && (val & 0x0C04) != 0 )
        {
          hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
        }
      else
        {
          serial->device[serial_reg].control = val;
        }
    }
  else
    {
      hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
write_intmode_reg (struct hw *me,
                   struct mn103ser *serial,
                   unsigned_word serial_reg,
                   const void *source,
                   unsigned  nr_bytes)
{
unsigned8 val = *(unsigned8 *)source;
 
  if ( nr_bytes == 1 )
    {
      /* Check for attempt to write to read-only bits of register. */
      if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
           || ( serial_reg != 2 && (val & 0x4A) != 0 ) )
        {
          hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
                   serial_reg);
        }
      else
        {
          serial->device[serial_reg].intmode = val;
        }
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
write_txb (struct hw *me,
           struct mn103ser *serial,
           unsigned_word serial_reg,
           const void *source,
           unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      serial->device[serial_reg].txb = *(unsigned8 *)source;
 
      if(USE_SOCKSER_P)
        {
          dv_sockser_write(hw_system (me), * (char*) source);
        }
      else
        {
          sim_io_write_stdout(hw_system (me), (char *)source, 1);
          sim_io_flush_stdout(hw_system (me));
        }
 
      hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
                serial_reg);
    }
}
 
 
static void
write_serial2_timer_reg (struct hw *me,
                         struct mn103ser *serial,
                         const void *source,
                         unsigned  nr_bytes)
{
  if ( nr_bytes == 1 )
    {
      serial->serial2_timer_reg = *(unsigned8 *)source;
    }
  else
    {
      hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
    }
}
 
 
static unsigned
mn103ser_io_write_buffer (struct hw *me,
                          const void *source,
                          int space,
                          unsigned_word base,
                          unsigned nr_bytes)
{
  struct mn103ser *serial = hw_data (me);
  enum serial_register_types serial_reg;
  HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
 
  serial_reg = decode_addr (me, serial, base);
  switch (serial_reg)
    {
    /* control registers */
    case SC0CTR:
    case SC1CTR:
    case SC2CTR:
      HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
                 serial_reg-SC0CTR, *(unsigned8 *)source, nr_bytes));
      write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
      break;
 
    /* interrupt mode registers */
    case SC0ICR:
    case SC1ICR:
    case SC2ICR:
      HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
                 serial_reg-SC0ICR, *(unsigned8 *)source, nr_bytes));
      write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
      break;
 
    /* transmission buffers */
    case SC0TXB:
    case SC1TXB:
    case SC2TXB:
      HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
                 serial_reg-SC0TXB, *(char *)source, nr_bytes));
      write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
      break;
 
    /* reception buffers */
    case SC0RXB:
    case SC1RXB:
    case SC2RXB:
      hw_abort(me, "Cannot write to reception buffer.");
     break;
 
    /* status registers */
    case SC0STR:
    case SC1STR:
    case SC2STR:
      hw_abort(me, "Cannot write to status register.");
      break;
 
    case SC2TIM:
      HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
                 *(unsigned8 *)source, nr_bytes));
      write_serial2_timer_reg(me, serial, source, nr_bytes);
      break;
 
    default:
      hw_abort(me, "invalid address");
    }
 
  return nr_bytes;
}
 
 
const struct hw_descriptor dv_mn103ser_descriptor[] = {
  { "mn103ser", mn103ser_finish, },
  { NULL },
};

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[/] [or1k_old/] [trunk/] [gdb-5.0/] [sim/] [mn10300/] [dv-mn103ser.c] - Blame information for rev 1782

Line No.	Rev	Author	Line
1	106	markom	`/* This file is part of the program GDB, the GNU debugger.`
2
3			`Copyright (C) 1998 Free Software Foundation, Inc.`
4			`Contributed by Cygnus Solutions.`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License as published by`
8			`the Free Software Foundation; either version 2 of the License, or`
9			`(at your option) any later version.`
10
11			`This program is distributed in the hope that it will be useful,`
12			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
14			`GNU General Public License for more details.`
15
16			`You should have received a copy of the GNU General Public License`
17			`along with this program; if not, write to the Free Software`
18			`Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.`
19
20			`*/`
21
22			`#include "sim-main.h"`
23			`#include "hw-main.h"`
24			`#include "dv-sockser.h"`
25
26
27			`/* DEVICE`
28
29
30			`mn103ser - mn103002 serial devices 0, 1 and 2.`
31
32
33			`DESCRIPTION`
34
35			`Implements the mn103002 serial interfaces as described in the`
36			`mn103002 user guide.`
37
38
39			`PROPERTIES`
40
41			`reg = <serial-addr> <serial-size>`
42
43
44			`BUGS`
45
46			`*/`
47
48
49			`/* The serial devices' registers' address block */`
50
51			`struct mn103ser_block {`
52			`unsigned_word base;`
53			`unsigned_word bound;`
54			`};`
55
56
57
58			`enum serial_register_types {`
59			`SC0CTR,`
60			`SC1CTR,`
61			`SC2CTR,`
62			`SC0ICR,`
63			`SC1ICR,`
64			`SC2ICR,`
65			`SC0TXB,`
66			`SC1TXB,`
67			`SC2TXB,`
68			`SC0RXB,`
69			`SC1RXB,`
70			`SC2RXB,`
71			`SC0STR,`
72			`SC1STR,`
73			`SC2STR,`
74			`SC2TIM,`
75			`};`
76
77
78			`/* Access dv-sockser state */`
79			`extern char* sockser_addr;`
80			`#define USE_SOCKSER_P (sockser_addr != NULL)`
81
82
83			`#define NR_SERIAL_DEVS 3`
84			`#define SIO_STAT_RRDY 0x0010`
85
86			`typedef struct _mn10300_serial {`
87			`unsigned16 status, control;`
88			`unsigned8 txb, rxb, intmode;`
89			`struct hw_event *event;`
90			`} mn10300_serial;`
91
92
93
94			`struct mn103ser {`
95			`struct mn103ser_block block;`
96			`mn10300_serial device[NR_SERIAL_DEVS];`
97			`unsigned8 serial2_timer_reg;`
98			`do_hw_poll_read_method *reader;`
99			`};`
100
101			`/* output port ID's */`
102
103			`/* for mn103002 */`
104			`enum {`
105			`SERIAL0_RECEIVE,`
106			`SERIAL1_RECEIVE,`
107			`SERIAL2_RECEIVE,`
108			`SERIAL0_SEND,`
109			`SERIAL1_SEND,`
110			`SERIAL2_SEND,`
111			`};`
112
113
114			`static const struct hw_port_descriptor mn103ser_ports[] = {`
115
116			`{ "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },`
117			`{ "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },`
118			`{ "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },`
119			`{ "serial-0-transmit", SERIAL0_SEND, 0, output_port, },`
120			`{ "serial-1-transmit", SERIAL1_SEND, 0, output_port, },`
121			`{ "serial-2-transmit", SERIAL2_SEND, 0, output_port, },`
122
123			`{ NULL, },`
124			`};`
125
126
127
128			`/* Finish off the partially created hw device. Attach our local`
129			`callbacks. Wire up our port names etc */`
130
131			`static hw_io_read_buffer_method mn103ser_io_read_buffer;`
132			`static hw_io_write_buffer_method mn103ser_io_write_buffer;`
133
134			`static void`
135			`attach_mn103ser_regs (struct hw *me,`
136			`struct mn103ser *serial)`
137			`{`
138			`unsigned_word attach_address;`
139			`int attach_space;`
140			`unsigned attach_size;`
141			`reg_property_spec reg;`
142
143			`if (hw_find_property (me, "reg") == NULL)`
144			`hw_abort (me, "Missing \"reg\" property");`
145
146			`if (!hw_find_reg_array_property (me, "reg", 0, &reg))`
147			`hw_abort (me, "\"reg\" property must contain three addr/size entries");`
148			`hw_unit_address_to_attach_address (hw_parent (me),`
149			`&reg.address,`
150			`&attach_space,`
151			`&attach_address,`
152			`me);`
153			`serial->block.base = attach_address;`
154			`hw_unit_size_to_attach_size (hw_parent (me),`
155			`&reg.size,`
156			`&attach_size, me);`
157			`serial->block.bound = attach_address + (attach_size - 1);`
158			`hw_attach_address (hw_parent (me),`
159			`0,`
160			`attach_space, attach_address, attach_size,`
161			`me);`
162			`}`
163
164			`static void`
165			`mn103ser_finish (struct hw *me)`
166			`{`
167			`struct mn103ser *serial;`
168			`int i;`
169
170			`serial = HW_ZALLOC (me, struct mn103ser);`
171			`set_hw_data (me, serial);`
172			`set_hw_io_read_buffer (me, mn103ser_io_read_buffer);`
173			`set_hw_io_write_buffer (me, mn103ser_io_write_buffer);`
174			`set_hw_ports (me, mn103ser_ports);`
175
176			`/* Attach ourself to our parent bus */`
177			`attach_mn103ser_regs (me, serial);`
178
179			`/* If so configured, enable polled input */`
180			`if (hw_find_property (me, "poll?") != NULL`
181			`&& hw_find_boolean_property (me, "poll?"))`
182			`{`
183			`serial->reader = sim_io_poll_read;`
184			`}`
185			`else`
186			`{`
187			`serial->reader = sim_io_read;`
188			`}`
189
190			`/* Initialize the serial device registers. */`
191			`for ( i=0; i<NR_SERIAL_DEVS; ++i )`
192			`{`
193			`serial->device[i].txb = 0;`
194			`serial->device[i].rxb = 0;`
195			`serial->device[i].status = 0;`
196			`serial->device[i].control = 0;`
197			`serial->device[i].intmode = 0;`
198			`serial->device[i].event = NULL;`
199			`}`
200			`}`
201
202
203			`/* read and write */`
204
205			`static int`
206			`decode_addr (struct hw *me,`
207			`struct mn103ser *serial,`
208			`unsigned_word address)`
209			`{`
210			`unsigned_word offset;`
211			`offset = address - serial->block.base;`
212			`switch (offset)`
213			`{`
214			`case 0x00: return SC0CTR;`
215			`case 0x04: return SC0ICR;`
216			`case 0x08: return SC0TXB;`
217			`case 0x09: return SC0RXB;`
218			`case 0x0C: return SC0STR;`
219			`case 0x10: return SC1CTR;`
220			`case 0x14: return SC1ICR;`
221			`case 0x18: return SC1TXB;`
222			`case 0x19: return SC1RXB;`
223			`case 0x1C: return SC1STR;`
224			`case 0x20: return SC2CTR;`
225			`case 0x24: return SC2ICR;`
226			`case 0x28: return SC2TXB;`
227			`case 0x29: return SC2RXB;`
228			`case 0x2C: return SC2STR;`
229			`case 0x2D: return SC2TIM;`
230			`default:`
231			`{`
232			`hw_abort (me, "bad address");`
233			`return -1;`
234			`}`
235			`}`
236			`}`
237
238			`static void`
239			`do_polling_event (struct hw *me,`
240			`void *data)`
241			`{`
242			`struct mn103ser *serial = hw_data(me);`
243			`int serial_reg = (int) data;`
244			`char c;`
245			`int count;`
246
247			`if(USE_SOCKSER_P)`
248			`{`
249			`int rd;`
250			`rd = dv_sockser_read (hw_system (me));`
251			`if(rd != -1)`
252			`{`
253			`c = (char) rd;`
254			`count = 1;`
255			`}`
256			`else`
257			`{`
258			`count = HW_IO_NOT_READY;`
259			`}`
260			`}`
261			`else`
262			`{`
263			`count = do_hw_poll_read (me, serial->reader,`
264			`0/STDIN/, &c, sizeof(c));`
265			`}`
266
267
268			`switch (count)`
269			`{`
270			`case HW_IO_NOT_READY:`
271			`case HW_IO_EOF:`
272			`serial->device[serial_reg].rxb = 0;`
273			`serial->device[serial_reg].status &= ~SIO_STAT_RRDY;`
274			`break;`
275			`default:`
276			`serial->device[serial_reg].rxb = c;`
277			`serial->device[serial_reg].status \|= SIO_STAT_RRDY;`
278			`hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);`
279			`}`
280
281			`/* Schedule next polling event */`
282			`serial->device[serial_reg].event`
283			`= hw_event_queue_schedule (me, 1000,`
284			`do_polling_event, (void *)serial_reg);`
285
286			`}`
287
288			`static void`
289			`read_control_reg (struct hw *me,`
290			`struct mn103ser *serial,`
291			`unsigned_word serial_reg,`
292			`void *dest,`
293			`unsigned nr_bytes)`
294			`{`
295			`/* really allow 1 byte read, too */`
296			`if ( nr_bytes == 2 )`
297			`{`
298			`(unsigned16 )dest = H2LE_2 (serial->device[serial_reg].control);`
299			`}`
300			`else`
301			`{`
302			`hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,`
303			`serial_reg);`
304			`}`
305			`}`
306
307
308			`static void`
309			`read_intmode_reg (struct hw *me,`
310			`struct mn103ser *serial,`
311			`unsigned_word serial_reg,`
312			`void *dest,`
313			`unsigned nr_bytes)`
314			`{`
315			`if ( nr_bytes == 1 )`
316			`{`
317			`(unsigned8 )dest = serial->device[serial_reg].intmode;`
318			`}`
319			`else`
320			`{`
321			`hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,`
322			`serial_reg);`
323			`}`
324			`}`
325
326
327			`static void`
328			`read_txb (struct hw *me,`
329			`struct mn103ser *serial,`
330			`unsigned_word serial_reg,`
331			`void *dest,`
332			`unsigned nr_bytes)`
333			`{`
334			`if ( nr_bytes == 1 )`
335			`{`
336			`(unsigned8 )dest = serial->device[serial_reg].txb;`
337			`}`
338			`else`
339			`{`
340			`hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,`
341			`serial_reg);`
342			`}`
343			`}`
344
345
346			`static void`
347			`read_rxb (struct hw *me,`
348			`struct mn103ser *serial,`
349			`unsigned_word serial_reg,`
350			`void *dest,`
351			`unsigned nr_bytes)`
352			`{`
353			`if ( nr_bytes == 1 )`
354			`{`
355			`(unsigned8 )dest = serial->device[serial_reg].rxb;`
356			`/* Reception buffer is now empty. */`
357			`serial->device[serial_reg].status &= ~SIO_STAT_RRDY;`
358			`}`
359			`else`
360			`{`
361			`hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,`
362			`serial_reg);`
363			`}`
364			`}`
365
366
367			`static void`
368			`read_status_reg (struct hw *me,`
369			`struct mn103ser *serial,`
370			`unsigned_word serial_reg,`
371			`void *dest,`
372			`unsigned nr_bytes)`
373			`{`
374			`char c;`
375			`int count;`
376
377			`if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )`
378			`{`
379			`/* FIFO is empty */`
380			`/* Kill current poll event */`
381			`if ( NULL != serial->device[serial_reg].event )`
382			`{`
383			`hw_event_queue_deschedule (me, serial->device[serial_reg].event);`
384			`serial->device[serial_reg].event = NULL;`
385			`}`
386
387			`if(USE_SOCKSER_P)`
388			`{`
389			`int rd;`
390			`rd = dv_sockser_read (hw_system (me));`
391			`if(rd != -1)`
392			`{`
393			`c = (char) rd;`
394			`count = 1;`
395			`}`
396			`else`
397			`{`
398			`count = HW_IO_NOT_READY;`
399			`}`
400			`}`
401			`else`
402			`{`
403			`count = do_hw_poll_read (me, serial->reader,`
404			`0/STDIN/, &c, sizeof(c));`
405			`}`
406
407			`switch (count)`
408			`{`
409			`case HW_IO_NOT_READY:`
410			`case HW_IO_EOF:`
411			`serial->device[serial_reg].rxb = 0;`
412			`serial->device[serial_reg].status &= ~SIO_STAT_RRDY;`
413			`break;`
414			`default:`
415			`serial->device[serial_reg].rxb = c;`
416			`serial->device[serial_reg].status \|= SIO_STAT_RRDY;`
417			`hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);`
418			`}`
419
420			`/* schedule polling event */`
421			`serial->device[serial_reg].event`
422			`= hw_event_queue_schedule (me, 1000,`
423			`do_polling_event,`
424			`(void *)serial_reg);`
425			`}`
426
427			`if ( nr_bytes == 1 )`
428			`{`
429			`(unsigned8 )dest = (unsigned8)serial->device[serial_reg].status;`
430			`}`
431			`else if ( nr_bytes == 2 && serial_reg != SC2STR )`
432			`{`
433			`(unsigned16 )dest = H2LE_2 (serial->device[serial_reg].status);`
434			`}`
435			`else`
436			`{`
437			`hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,`
438			`serial_reg);`
439			`}`
440			`}`
441
442
443			`static void`
444			`read_serial2_timer_reg (struct hw *me,`
445			`struct mn103ser *serial,`
446			`void *dest,`
447			`unsigned nr_bytes)`
448			`{`
449			`if ( nr_bytes == 1 )`
450			`{`
451			`* (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;`
452			`}`
453			`else`
454			`{`
455			`hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);`
456			`}`
457			`}`
458
459
460			`static unsigned`
461			`mn103ser_io_read_buffer (struct hw *me,`
462			`void *dest,`
463			`int space,`
464			`unsigned_word base,`
465			`unsigned nr_bytes)`
466			`{`
467			`struct mn103ser *serial = hw_data (me);`
468			`enum serial_register_types serial_reg;`
469			`HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));`
470
471			`serial_reg = decode_addr (me, serial, base);`
472			`switch (serial_reg)`
473			`{`
474			`/* control registers */`
475			`case SC0CTR:`
476			`case SC1CTR:`
477			`case SC2CTR:`
478			`read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);`
479			`HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,`
480			`(unsigned8 )dest));`
481			`break;`
482
483			`/* interrupt mode registers */`
484			`case SC0ICR:`
485			`case SC1ICR:`
486			`case SC2ICR:`
487			`read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);`
488			`HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,`
489			`(unsigned8 )dest));`
490			`break;`
491
492			`/* transmission buffers */`
493			`case SC0TXB:`
494			`case SC1TXB:`
495			`case SC2TXB:`
496			`read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);`
497			`HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,`
498			`(char )dest));`
499			`break;`
500
501			`/* reception buffers */`
502			`case SC0RXB:`
503			`case SC1RXB:`
504			`case SC2RXB:`
505			`read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);`
506			`HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,`
507			`(char )dest));`
508			`break;`
509
510			`/* status registers */`
511			`case SC0STR:`
512			`case SC1STR:`
513			`case SC2STR:`
514			`read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);`
515			`HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,`
516			`(unsigned8 )dest));`
517			`break;`
518
519			`case SC2TIM:`
520			`read_serial2_timer_reg(me, serial, dest, nr_bytes);`
521			`HW_TRACE ((me, "read - serial2 timer reg %d\n", (unsigned8 )dest));`
522			`break;`
523
524			`default:`
525			`hw_abort(me, "invalid address");`
526			`}`
527
528			`return nr_bytes;`
529			`}`
530
531
532			`static void`
533			`write_control_reg (struct hw *me,`
534			`struct mn103ser *serial,`
535			`unsigned_word serial_reg,`
536			`const void *source,`
537			`unsigned nr_bytes)`
538			`{`
539			`unsigned16 val = LE2H_2 ((unsigned16 )source);`
540
541			`/* really allow 1 byte write, too */`
542			`if ( nr_bytes == 2 )`
543			`{`
544			`if ( serial_reg == 2 && (val & 0x0C04) != 0 )`
545			`{`
546			`hw_abort(me, "Cannot write to read-only bits of SC2CTR.");`
547			`}`
548			`else`
549			`{`
550			`serial->device[serial_reg].control = val;`
551			`}`
552			`}`
553			`else`
554			`{`
555			`hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,`
556			`serial_reg);`
557			`}`
558			`}`
559
560
561			`static void`
562			`write_intmode_reg (struct hw *me,`
563			`struct mn103ser *serial,`
564			`unsigned_word serial_reg,`
565			`const void *source,`
566			`unsigned nr_bytes)`
567			`{`
568			`unsigned8 val = (unsigned8 )source;`
569
570			`if ( nr_bytes == 1 )`
571			`{`
572			`/* Check for attempt to write to read-only bits of register. */`
573			`if ( ( serial_reg == 2 && (val & 0xCA) != 0 )`
574			`\|\| ( serial_reg != 2 && (val & 0x4A) != 0 ) )`
575			`{`
576			`hw_abort(me, "Cannot write to read-only bits of SC%dICR.",`
577			`serial_reg);`
578			`}`
579			`else`
580			`{`
581			`serial->device[serial_reg].intmode = val;`
582			`}`
583			`}`
584			`else`
585			`{`
586			`hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,`
587			`serial_reg);`
588			`}`
589			`}`
590
591
592			`static void`
593			`write_txb (struct hw *me,`
594			`struct mn103ser *serial,`
595			`unsigned_word serial_reg,`
596			`const void *source,`
597			`unsigned nr_bytes)`
598			`{`
599			`if ( nr_bytes == 1 )`
600			`{`
601			`serial->device[serial_reg].txb = (unsigned8 )source;`
602
603			`if(USE_SOCKSER_P)`
604			`{`
605			`dv_sockser_write(hw_system (me), * (char*) source);`
606			`}`
607			`else`
608			`{`
609			`sim_io_write_stdout(hw_system (me), (char *)source, 1);`
610			`sim_io_flush_stdout(hw_system (me));`
611			`}`
612
613			`hw_port_event (me, serial_reg+SERIAL0_SEND, 1);`
614			`}`
615			`else`
616			`{`
617			`hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,`
618			`serial_reg);`
619			`}`
620			`}`
621
622
623			`static void`
624			`write_serial2_timer_reg (struct hw *me,`
625			`struct mn103ser *serial,`
626			`const void *source,`
627			`unsigned nr_bytes)`
628			`{`
629			`if ( nr_bytes == 1 )`
630			`{`
631			`serial->serial2_timer_reg = (unsigned8 )source;`
632			`}`
633			`else`
634			`{`
635			`hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);`
636			`}`
637			`}`
638
639
640			`static unsigned`
641			`mn103ser_io_write_buffer (struct hw *me,`
642			`const void *source,`
643			`int space,`
644			`unsigned_word base,`
645			`unsigned nr_bytes)`
646			`{`
647			`struct mn103ser *serial = hw_data (me);`
648			`enum serial_register_types serial_reg;`
649			`HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));`
650
651			`serial_reg = decode_addr (me, serial, base);`
652			`switch (serial_reg)`
653			`{`
654			`/* control registers */`
655			`case SC0CTR:`
656			`case SC1CTR:`
657			`case SC2CTR:`
658			`HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",`
659			`serial_reg-SC0CTR, (unsigned8 )source, nr_bytes));`
660			`write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);`
661			`break;`
662
663			`/* interrupt mode registers */`
664			`case SC0ICR:`
665			`case SC1ICR:`
666			`case SC2ICR:`
667			`HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",`
668			`serial_reg-SC0ICR, (unsigned8 )source, nr_bytes));`
669			`write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);`
670			`break;`
671
672			`/* transmission buffers */`
673			`case SC0TXB:`
674			`case SC1TXB:`
675			`case SC2TXB:`
676			`HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",`
677			`serial_reg-SC0TXB, (char )source, nr_bytes));`
678			`write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);`
679			`break;`
680
681			`/* reception buffers */`
682			`case SC0RXB:`
683			`case SC1RXB:`
684			`case SC2RXB:`
685			`hw_abort(me, "Cannot write to reception buffer.");`
686			`break;`
687
688			`/* status registers */`
689			`case SC0STR:`
690			`case SC1STR:`
691			`case SC2STR:`
692			`hw_abort(me, "Cannot write to status register.");`
693			`break;`
694
695			`case SC2TIM:`
696			`HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",`
697			`(unsigned8 )source, nr_bytes));`
698			`write_serial2_timer_reg(me, serial, source, nr_bytes);`
699			`break;`
700
701			`default:`
702			`hw_abort(me, "invalid address");`
703			`}`
704
705			`return nr_bytes;`
706			`}`
707
708
709			`const struct hw_descriptor dv_mn103ser_descriptor[] = {`
710			`{ "mn103ser", mn103ser_finish, },`
711			`{ NULL },`
712			`};`