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sfurman |
/* mips-opc.c -- MIPS opcode list.
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by Ralph Campbell and OSF
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Commented and modified by Ian Lance Taylor, Cygnus Support
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Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
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MIPS-3D and MDMX support added by Broadcom Corporation (SiByte).
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version
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1, or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "opcode/mips.h"
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/* Short hand so the lines aren't too long. */
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#define LDD INSN_LOAD_MEMORY_DELAY
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#define LCD INSN_LOAD_COPROC_DELAY
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#define UBD INSN_UNCOND_BRANCH_DELAY
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#define CBD INSN_COND_BRANCH_DELAY
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#define COD INSN_COPROC_MOVE_DELAY
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#define CLD INSN_COPROC_MEMORY_DELAY
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#define CBL INSN_COND_BRANCH_LIKELY
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#define TRAP INSN_TRAP
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#define SM INSN_STORE_MEMORY
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#define WR_d INSN_WRITE_GPR_D
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#define WR_t INSN_WRITE_GPR_T
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#define WR_31 INSN_WRITE_GPR_31
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#define WR_D INSN_WRITE_FPR_D
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#define WR_T INSN_WRITE_FPR_T
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#define WR_S INSN_WRITE_FPR_S
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#define RD_s INSN_READ_GPR_S
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#define RD_b INSN_READ_GPR_S
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#define RD_t INSN_READ_GPR_T
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#define RD_S INSN_READ_FPR_S
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#define RD_T INSN_READ_FPR_T
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#define RD_R INSN_READ_FPR_R
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#define WR_CC INSN_WRITE_COND_CODE
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#define RD_CC INSN_READ_COND_CODE
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#define RD_C0 INSN_COP
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#define RD_C1 INSN_COP
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#define RD_C2 INSN_COP
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#define RD_C3 INSN_COP
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#define WR_C0 INSN_COP
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#define WR_C1 INSN_COP
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#define WR_C2 INSN_COP
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#define WR_C3 INSN_COP
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#define WR_HI INSN_WRITE_HI
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#define RD_HI INSN_READ_HI
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#define MOD_HI WR_HI|RD_HI
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#define WR_LO INSN_WRITE_LO
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#define RD_LO INSN_READ_LO
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#define MOD_LO WR_LO|RD_LO
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#define WR_HILO WR_HI|WR_LO
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#define RD_HILO RD_HI|RD_LO
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#define MOD_HILO WR_HILO|RD_HILO
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#define IS_M INSN_MULT
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#define WR_MACC INSN_WRITE_MDMX_ACC
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#define RD_MACC INSN_READ_MDMX_ACC
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#define I1 INSN_ISA1
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#define I2 INSN_ISA2
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#define I3 INSN_ISA3
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#define I4 INSN_ISA4
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#define I5 INSN_ISA5
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#define I32 INSN_ISA32
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#define I64 INSN_ISA64
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/* MIPS64 MIPS-3D ASE support. */
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#define I16 INSN_MIPS16
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/* MIPS64 MIPS-3D ASE support. */
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#define M3D INSN_MIPS3D
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/* MIPS64 MDMX ASE support. */
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#define MX INSN_MDMX
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#define P3 INSN_4650
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#define L1 INSN_4010
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#define V1 INSN_4100
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#define T3 INSN_3900
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#define M1 INSN_10000
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#define SB1 INSN_SB1
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#define G1 (T3 \
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)
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#define G2 (T3 \
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)
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#define G3 (I4 \
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)
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/* The order of overloaded instructions matters. Label arguments and
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register arguments look the same. Instructions that can have either
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for arguments must apear in the correct order in this table for the
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assembler to pick the right one. In other words, entries with
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immediate operands must apear after the same instruction with
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registers.
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Because of the lookup algorithm used, entries with the same opcode
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name must be contiguous.
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Many instructions are short hand for other instructions (i.e., The
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jal <register> instruction is short for jalr <register>). */
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const struct mips_opcode mips_builtin_opcodes[] =
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{
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/* These instructions appear first so that the disassembler will find
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them first. The assemblers uses a hash table based on the
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instruction name anyhow. */
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/* name, args, match, mask, pinfo, membership */
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{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I4|I32|G3 },
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{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
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{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
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{"ssnop", "", 0x00000040, 0xffffffff, 0, I32 },
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{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
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{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
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{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
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{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, I1 },
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{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
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{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
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{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
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{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
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{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
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{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
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{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
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{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
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{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
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{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
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{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
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{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
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{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
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{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
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{"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
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{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
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{"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
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{"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
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{"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
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{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
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{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
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{"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
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{"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
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{"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
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{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
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{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
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{"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
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{"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_D|RD_S|RD_T|FP_D, MX },
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{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5 },
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{"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, MX|SB1 },
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{"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, MX },
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{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
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{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
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{"and.ob", "X,Y,Q", 0x7800000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
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{"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
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{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
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/* b is at the top of the table. */
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/* bal is at the top of the table. */
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{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
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{"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
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{"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
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{"bc1any4t", "N,p", 0x45410000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
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{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
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{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
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{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
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{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
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{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
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{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
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{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
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{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
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{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
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{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
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{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
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209 |
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{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2|T3 },
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210 |
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{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
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211 |
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{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
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212 |
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{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2|T3 },
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213 |
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{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2|T3 },
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214 |
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{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
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215 |
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{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
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216 |
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{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2|T3 },
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217 |
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{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2|T3 },
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218 |
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{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
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219 |
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{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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220 |
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{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
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221 |
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{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
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222 |
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{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
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223 |
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{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
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224 |
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{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2|T3 },
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225 |
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{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2|T3 },
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226 |
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{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
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227 |
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{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
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228 |
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{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2|T3 },
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229 |
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{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2|T3 },
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230 |
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{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
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231 |
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{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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232 |
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{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
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233 |
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{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
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234 |
|
|
{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2|T3 },
|
235 |
|
|
{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2|T3 },
|
236 |
|
|
{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
|
237 |
|
|
{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
|
238 |
|
|
{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2|T3 },
|
239 |
|
|
{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2|T3 },
|
240 |
|
|
{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
|
241 |
|
|
{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
|
242 |
|
|
{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
|
243 |
|
|
{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
|
244 |
|
|
{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2|T3 },
|
245 |
|
|
{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2|T3 },
|
246 |
|
|
{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
|
247 |
|
|
{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
|
248 |
|
|
{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2|T3 },
|
249 |
|
|
{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2|T3 },
|
250 |
|
|
{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
|
251 |
|
|
{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
|
252 |
|
|
{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
|
253 |
|
|
{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
|
254 |
|
|
{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
|
255 |
|
|
{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
|
256 |
|
|
{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
|
257 |
|
|
{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
|
258 |
|
|
{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
|
259 |
|
|
{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2|T3 },
|
260 |
|
|
{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
|
261 |
|
|
{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
|
262 |
|
|
{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
|
263 |
|
|
{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
|
264 |
|
|
{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
265 |
|
|
{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
266 |
|
|
{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
267 |
|
|
{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
268 |
|
|
{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
269 |
|
|
{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
270 |
|
|
{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
271 |
|
|
{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
272 |
|
|
{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
273 |
|
|
{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
274 |
|
|
{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
275 |
|
|
{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
276 |
|
|
{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
277 |
|
|
{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
278 |
|
|
{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
279 |
|
|
{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
280 |
|
|
{"c.eq.ob", "Y,Q", 0x78000001, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX|SB1 },
|
281 |
|
|
{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
282 |
|
|
{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
283 |
|
|
{"c.eq.qh", "Y,Q", 0x78200001, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX },
|
284 |
|
|
{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
285 |
|
|
{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
286 |
|
|
{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
287 |
|
|
{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
288 |
|
|
{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
289 |
|
|
{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
290 |
|
|
{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
291 |
|
|
{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
292 |
|
|
{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
293 |
|
|
{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
294 |
|
|
{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
295 |
|
|
{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
296 |
|
|
{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
297 |
|
|
{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
298 |
|
|
{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
299 |
|
|
{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
300 |
|
|
{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
301 |
|
|
{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
302 |
|
|
{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
303 |
|
|
{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
304 |
|
|
{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
305 |
|
|
{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
306 |
|
|
{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
307 |
|
|
{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
308 |
|
|
{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
309 |
|
|
{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
310 |
|
|
{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
311 |
|
|
{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
312 |
|
|
{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
313 |
|
|
{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
314 |
|
|
{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
315 |
|
|
{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
316 |
|
|
{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
317 |
|
|
{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
318 |
|
|
{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
319 |
|
|
{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
320 |
|
|
{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
321 |
|
|
{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
322 |
|
|
{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
323 |
|
|
{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
324 |
|
|
{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
325 |
|
|
{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
326 |
|
|
{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
327 |
|
|
{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
328 |
|
|
{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
329 |
|
|
{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
330 |
|
|
{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
331 |
|
|
{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
332 |
|
|
{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
333 |
|
|
{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
334 |
|
|
{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
335 |
|
|
{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
336 |
|
|
{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
337 |
|
|
{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
338 |
|
|
{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
339 |
|
|
{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
340 |
|
|
{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
341 |
|
|
{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
342 |
|
|
{"c.lt.ob", "Y,Q", 0x78000004, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX|SB1 },
|
343 |
|
|
{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
344 |
|
|
{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
345 |
|
|
{"c.lt.qh", "Y,Q", 0x78200004, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX },
|
346 |
|
|
{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
347 |
|
|
{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
348 |
|
|
{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
349 |
|
|
{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
350 |
|
|
{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
351 |
|
|
{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
352 |
|
|
{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
353 |
|
|
{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
354 |
|
|
{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
355 |
|
|
{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
356 |
|
|
{"c.le.ob", "Y,Q", 0x78000005, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX|SB1 },
|
357 |
|
|
{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
358 |
|
|
{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
359 |
|
|
{"c.le.qh", "Y,Q", 0x78200005, 0xfc2007ff, WR_CC|RD_S|RD_T|FP_D, MX },
|
360 |
|
|
{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
361 |
|
|
{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
|
362 |
|
|
{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
363 |
|
|
{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
|
364 |
|
|
{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
365 |
|
|
{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
|
366 |
|
|
{"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
367 |
|
|
{"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
368 |
|
|
{"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
369 |
|
|
{"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
370 |
|
|
{"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
371 |
|
|
{"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
372 |
|
|
{"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
373 |
|
|
{"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
374 |
|
|
{"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
375 |
|
|
{"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
376 |
|
|
{"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
377 |
|
|
{"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
378 |
|
|
{"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
379 |
|
|
{"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
380 |
|
|
{"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
381 |
|
|
{"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
382 |
|
|
{"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
383 |
|
|
{"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
384 |
|
|
{"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
385 |
|
|
{"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
386 |
|
|
{"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
387 |
|
|
{"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
388 |
|
|
{"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
389 |
|
|
{"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
390 |
|
|
{"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
391 |
|
|
{"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
392 |
|
|
{"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
393 |
|
|
{"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
394 |
|
|
{"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
395 |
|
|
{"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
396 |
|
|
{"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
397 |
|
|
{"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
398 |
|
|
{"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
399 |
|
|
{"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
400 |
|
|
{"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
401 |
|
|
{"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
402 |
|
|
{"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
403 |
|
|
{"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
404 |
|
|
{"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
405 |
|
|
{"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
406 |
|
|
{"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
407 |
|
|
{"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
408 |
|
|
{"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
409 |
|
|
{"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
410 |
|
|
{"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
411 |
|
|
{"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
412 |
|
|
{"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
|
413 |
|
|
{"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
|
414 |
|
|
{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|I32|T3},
|
415 |
|
|
{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
416 |
|
|
{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
417 |
|
|
{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
418 |
|
|
{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
419 |
|
|
{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
|
420 |
|
|
{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
|
421 |
|
|
{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
|
422 |
|
|
{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
|
423 |
|
|
{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
|
424 |
|
|
{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
|
425 |
|
|
{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
|
426 |
|
|
{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
|
427 |
|
|
{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
|
428 |
|
|
{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
|
429 |
|
|
{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
|
430 |
|
|
{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
|
431 |
|
|
{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
432 |
|
|
{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
|
433 |
|
|
{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
|
434 |
|
|
{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
435 |
|
|
{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
436 |
|
|
{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
437 |
|
|
{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
|
438 |
|
|
{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
|
439 |
|
|
{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
|
440 |
|
|
{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
|
441 |
|
|
{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
|
442 |
|
|
{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
|
443 |
|
|
{"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
|
444 |
|
|
{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
445 |
|
|
{"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
|
446 |
|
|
{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
|
447 |
|
|
{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
|
448 |
|
|
{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
|
449 |
|
|
{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
|
450 |
|
|
{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
|
451 |
|
|
{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
|
452 |
|
|
{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
|
453 |
|
|
{"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
|
454 |
|
|
{"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
|
455 |
|
|
/* dctr and dctw are used on the r5000. */
|
456 |
|
|
{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
|
457 |
|
|
{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
|
458 |
|
|
{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 },
|
459 |
|
|
/* For ddiv, see the comments about div. */
|
460 |
|
|
{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
461 |
|
|
{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
|
462 |
|
|
{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
|
463 |
|
|
/* For ddivu, see the comments about div. */
|
464 |
|
|
{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
465 |
|
|
{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
|
466 |
|
|
{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
|
467 |
|
|
/* The MIPS assembler treats the div opcode with two operands as
|
468 |
|
|
though the first operand appeared twice (the first operand is both
|
469 |
|
|
a source and a destination). To get the div machine instruction,
|
470 |
|
|
you must use an explicit destination of $0. */
|
471 |
|
|
{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
472 |
|
|
{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
|
473 |
|
|
{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
|
474 |
|
|
{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
|
475 |
|
|
{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
476 |
|
|
{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
477 |
|
|
{"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, SB1 },
|
478 |
|
|
/* For divu, see the comments about div. */
|
479 |
|
|
{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
480 |
|
|
{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
|
481 |
|
|
{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
|
482 |
|
|
{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
|
483 |
|
|
{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
|
484 |
|
|
{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
|
485 |
|
|
{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
|
486 |
|
|
{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
|
487 |
|
|
|
488 |
|
|
{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, V1 },
|
489 |
|
|
{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
|
490 |
|
|
{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 },
|
491 |
|
|
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
|
492 |
|
|
{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 },
|
493 |
|
|
{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
|
494 |
|
|
{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
|
495 |
|
|
{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
|
496 |
|
|
{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
|
497 |
|
|
{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, I3 },
|
498 |
|
|
{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 },
|
499 |
|
|
{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I3 },
|
500 |
|
|
{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 },
|
501 |
|
|
{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, I3 },
|
502 |
|
|
{"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 },
|
503 |
|
|
{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I3 },
|
504 |
|
|
{"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I64 },
|
505 |
|
|
{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
|
506 |
|
|
{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
|
507 |
|
|
{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
|
508 |
|
|
{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
|
509 |
|
|
{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
|
510 |
|
|
{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
|
511 |
|
|
{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
512 |
|
|
{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
513 |
|
|
{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
|
514 |
|
|
{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
|
515 |
|
|
{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
516 |
|
|
{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
|
517 |
|
|
{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
|
518 |
|
|
{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
519 |
|
|
{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
|
520 |
|
|
{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
|
521 |
|
|
{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 },
|
522 |
|
|
{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
|
523 |
|
|
{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
|
524 |
|
|
{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
|
525 |
|
|
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
|
526 |
|
|
{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
|
527 |
|
|
{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
|
528 |
|
|
{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
|
529 |
|
|
{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
|
530 |
|
|
{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
|
531 |
|
|
{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
|
532 |
|
|
{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
|
533 |
|
|
{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
|
534 |
|
|
{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
|
535 |
|
|
{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
|
536 |
|
|
{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
|
537 |
|
|
{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
|
538 |
|
|
{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
|
539 |
|
|
{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
|
540 |
|
|
{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
|
541 |
|
|
{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
|
542 |
|
|
{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
|
543 |
|
|
{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
|
544 |
|
|
{"eret", "", 0x42000018, 0xffffffff, 0, I3|I32 },
|
545 |
|
|
{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
546 |
|
|
{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
547 |
|
|
{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
548 |
|
|
{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
549 |
|
|
{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
|
550 |
|
|
{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
|
551 |
|
|
{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
|
552 |
|
|
{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
|
553 |
|
|
{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
|
554 |
|
|
{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
|
555 |
|
|
/* SVR4 PIC code requires special handling for j, so it must be a
|
556 |
|
|
macro. */
|
557 |
|
|
{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
|
558 |
|
|
/* This form of j is used by the disassembler and internally by the
|
559 |
|
|
assembler, but will never match user input (because the line above
|
560 |
|
|
will match first). */
|
561 |
|
|
{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
|
562 |
|
|
{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
|
563 |
|
|
{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
|
564 |
|
|
/* SVR4 PIC code requires special handling for jal, so it must be a
|
565 |
|
|
macro. */
|
566 |
|
|
{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
|
567 |
|
|
{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
|
568 |
|
|
{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
|
569 |
|
|
/* This form of jal is used by the disassembler and internally by the
|
570 |
|
|
assembler, but will never match user input (because the line above
|
571 |
|
|
will match first). */
|
572 |
|
|
{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
|
573 |
|
|
{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I16 },
|
574 |
|
|
{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
|
575 |
|
|
{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
576 |
|
|
{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
|
577 |
|
|
{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
578 |
|
|
{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
|
579 |
|
|
{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
|
580 |
|
|
{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
|
581 |
|
|
{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
|
582 |
|
|
{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
|
583 |
|
|
{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
|
584 |
|
|
{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
|
585 |
|
|
{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
|
586 |
|
|
{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
|
587 |
|
|
{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
|
588 |
|
|
{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
|
589 |
|
|
{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
|
590 |
|
|
{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
|
591 |
|
|
{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
|
592 |
|
|
{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
|
593 |
|
|
{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
|
594 |
|
|
{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
|
595 |
|
|
{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
|
596 |
|
|
{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
|
597 |
|
|
{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
|
598 |
|
|
{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
599 |
|
|
{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
|
600 |
|
|
{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
601 |
|
|
{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
|
602 |
|
|
/* li is at the start of the table. */
|
603 |
|
|
{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
|
604 |
|
|
{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
|
605 |
|
|
{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
|
606 |
|
|
{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
|
607 |
|
|
{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
|
608 |
|
|
{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
|
609 |
|
|
{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
|
610 |
|
|
{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
|
611 |
|
|
{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
|
612 |
|
|
{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
|
613 |
|
|
{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
614 |
|
|
{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
|
615 |
|
|
{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
|
616 |
|
|
{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
|
617 |
|
|
{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
|
618 |
|
|
{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
|
619 |
|
|
{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
|
620 |
|
|
{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
|
621 |
|
|
{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
|
622 |
|
|
{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
|
623 |
|
|
{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
|
624 |
|
|
{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
|
625 |
|
|
{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
|
626 |
|
|
{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
|
627 |
|
|
{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
628 |
|
|
{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
|
629 |
|
|
{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
|
630 |
|
|
{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
|
631 |
|
|
{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
|
632 |
|
|
{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
|
633 |
|
|
{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
|
634 |
|
|
{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
|
635 |
|
|
{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
|
636 |
|
|
{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
|
637 |
|
|
{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
|
638 |
|
|
{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
|
639 |
|
|
{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
|
640 |
|
|
{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
641 |
|
|
{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
642 |
|
|
{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
643 |
|
|
{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
644 |
|
|
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
|
645 |
|
|
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
|
646 |
|
|
{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
647 |
|
|
{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
648 |
|
|
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
|
649 |
|
|
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
|
650 |
|
|
{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
651 |
|
|
{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, V1 },
|
652 |
|
|
{"max.ob", "X,Y,Q", 0x78000007, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
653 |
|
|
{"max.qh", "X,Y,Q", 0x78200007, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
654 |
|
|
{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
|
655 |
|
|
{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
|
656 |
|
|
{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
|
657 |
|
|
{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
|
658 |
|
|
{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
|
659 |
|
|
{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
|
660 |
|
|
{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
|
661 |
|
|
{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
|
662 |
|
|
{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
|
663 |
|
|
{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 },
|
664 |
|
|
{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
|
665 |
|
|
{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
|
666 |
|
|
{"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
667 |
|
|
{"min.qh", "X,Y,Q", 0x78200006, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
668 |
|
|
{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
|
669 |
|
|
{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
|
670 |
|
|
{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
|
671 |
|
|
{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|I32},
|
672 |
|
|
{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
|
673 |
|
|
{"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, MX|SB1 },
|
674 |
|
|
{"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, MX|SB1 },
|
675 |
|
|
{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
|
676 |
|
|
{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
|
677 |
|
|
{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
|
678 |
|
|
{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, L1 },
|
679 |
|
|
{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
|
680 |
|
|
{"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, MX|SB1 },
|
681 |
|
|
{"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, MX|SB1 },
|
682 |
|
|
{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
|
683 |
|
|
{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
|
684 |
|
|
{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|I32 },
|
685 |
|
|
{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
|
686 |
|
|
{"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, MX|SB1 },
|
687 |
|
|
{"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, MX|SB1 },
|
688 |
|
|
{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
|
689 |
|
|
{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
|
690 |
|
|
{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
|
691 |
|
|
{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, L1 },
|
692 |
|
|
{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
|
693 |
|
|
{"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, MX|SB1 },
|
694 |
|
|
{"movz.l", "X,Y,t", 0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, MX|SB1 },
|
695 |
|
|
{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
|
696 |
|
|
{"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
|
697 |
|
|
/* move is at the top of the table. */
|
698 |
|
|
{"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
699 |
|
|
{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
700 |
|
|
{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
701 |
|
|
{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
702 |
|
|
{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
703 |
|
|
{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
704 |
|
|
{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
705 |
|
|
{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
706 |
|
|
{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
|
707 |
|
|
{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
|
708 |
|
|
{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
|
709 |
|
|
{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
|
710 |
|
|
{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
|
711 |
|
|
{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
|
712 |
|
|
{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
|
713 |
|
|
{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
|
714 |
|
|
{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
|
715 |
|
|
{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 },
|
716 |
|
|
{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
|
717 |
|
|
{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
|
718 |
|
|
{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
719 |
|
|
{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
720 |
|
|
{"mul.ob", "X,Y,Q", 0x78000030, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
721 |
|
|
{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
722 |
|
|
{"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
723 |
|
|
{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3 },
|
724 |
|
|
{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
|
725 |
|
|
{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
|
726 |
|
|
{"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
727 |
|
|
{"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
728 |
|
|
{"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
729 |
|
|
{"mull.qh", "Y,Q", 0x78200433, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
730 |
|
|
{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
|
731 |
|
|
{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
|
732 |
|
|
{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
|
733 |
|
|
{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
|
734 |
|
|
{"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
|
735 |
|
|
{"muls.ob", "Y,Q", 0x78000032, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
736 |
|
|
{"muls.qh", "Y,Q", 0x78200032, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
737 |
|
|
{"mulsl.ob", "Y,Q", 0x78000432, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
738 |
|
|
{"mulsl.qh", "Y,Q", 0x78200432, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
739 |
|
|
{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
|
740 |
|
|
{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
741 |
|
|
{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
|
742 |
|
|
{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
743 |
|
|
{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
|
744 |
|
|
{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
|
745 |
|
|
{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
|
746 |
|
|
{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
|
747 |
|
|
{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D, I5 },
|
748 |
|
|
{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
749 |
|
|
{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
750 |
|
|
{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
751 |
|
|
{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
752 |
|
|
{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
753 |
|
|
{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
754 |
|
|
/* nop is at the start of the table. */
|
755 |
|
|
{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
756 |
|
|
{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
|
757 |
|
|
{"nor.ob", "X,Y,Q", 0x7800000f, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
758 |
|
|
{"nor.qh", "X,Y,Q", 0x7820000f, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
759 |
|
|
{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
|
760 |
|
|
{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
761 |
|
|
{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
|
762 |
|
|
{"or.ob", "X,Y,Q", 0x7800000e, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
763 |
|
|
{"or.qh", "X,Y,Q", 0x7820000e, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
764 |
|
|
{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
|
765 |
|
|
{"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, SB1 },
|
766 |
|
|
{"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, SB1 },
|
767 |
|
|
{"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, SB1 },
|
768 |
|
|
{"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
769 |
|
|
{"pickf.qh", "X,Y,Q", 0x78200002, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
770 |
|
|
{"pickt.ob", "X,Y,Q", 0x78000003, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
771 |
|
|
{"pickt.qh", "X,Y,Q", 0x78200003, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
772 |
|
|
{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
773 |
|
|
{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
774 |
|
|
/* pref and prefx are at the start of the table. */
|
775 |
|
|
{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
776 |
|
|
{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
777 |
|
|
{"rach.ob", "X", 0x7a00003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX|SB1 },
|
778 |
|
|
{"rach.qh", "X", 0x7a20003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX },
|
779 |
|
|
{"racl.ob", "X", 0x7800003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX|SB1 },
|
780 |
|
|
{"racl.qh", "X", 0x7820003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX },
|
781 |
|
|
{"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX|SB1 },
|
782 |
|
|
{"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_D|RD_MACC|FP_D, MX },
|
783 |
|
|
{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
784 |
|
|
{"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
|
785 |
|
|
{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
786 |
|
|
{"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D|RD_S|FP_D, M3D },
|
787 |
|
|
{"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
|
788 |
|
|
{"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
|
789 |
|
|
{"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
|
790 |
|
|
{"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
|
791 |
|
|
{"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
|
792 |
|
|
{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
793 |
|
|
{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
|
794 |
|
|
{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
|
795 |
|
|
{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
796 |
|
|
{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
|
797 |
|
|
{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
|
798 |
|
|
{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
|
799 |
|
|
{"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
800 |
|
|
{"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX|SB1 },
|
801 |
|
|
{"rnau.qh", "X,Q", 0x78200021, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
802 |
|
|
{"rnes.qh", "X,Q", 0x78200026, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
803 |
|
|
{"rneu.ob", "X,Q", 0x78000022, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX|SB1 },
|
804 |
|
|
{"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
805 |
|
|
{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
|
806 |
|
|
{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
|
807 |
|
|
{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
|
808 |
|
|
{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
|
809 |
|
|
{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
810 |
|
|
{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
811 |
|
|
{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
812 |
|
|
{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
813 |
|
|
{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
814 |
|
|
{"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
|
815 |
|
|
{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
816 |
|
|
{"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D|RD_S|FP_D, M3D },
|
817 |
|
|
{"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
|
818 |
|
|
{"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
|
819 |
|
|
{"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
|
820 |
|
|
{"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
|
821 |
|
|
{"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
|
822 |
|
|
{"rzs.qh", "X,Q", 0x78200024, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
823 |
|
|
{"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX|SB1 },
|
824 |
|
|
{"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX },
|
825 |
|
|
{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
826 |
|
|
{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
|
827 |
|
|
{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
|
828 |
|
|
{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
|
829 |
|
|
{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
|
830 |
|
|
{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
|
831 |
|
|
{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
832 |
|
|
{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
|
833 |
|
|
{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
|
834 |
|
|
{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
|
835 |
|
|
{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2 },
|
836 |
|
|
{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2 },
|
837 |
|
|
{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
|
838 |
|
|
{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
|
839 |
|
|
{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
840 |
|
|
{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
841 |
|
|
{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
842 |
|
|
{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
843 |
|
|
{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
|
844 |
|
|
{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
|
845 |
|
|
{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
|
846 |
|
|
{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
|
847 |
|
|
{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
848 |
|
|
{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
|
849 |
|
|
{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
|
850 |
|
|
{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
851 |
|
|
{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
|
852 |
|
|
{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
853 |
|
|
{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
|
854 |
|
|
{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
|
855 |
|
|
{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
|
856 |
|
|
{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
|
857 |
|
|
{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
|
858 |
|
|
{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
|
859 |
|
|
{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
|
860 |
|
|
{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
|
861 |
|
|
{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
|
862 |
|
|
{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
|
863 |
|
|
{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
|
864 |
|
|
{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
|
865 |
|
|
{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
|
866 |
|
|
{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
|
867 |
|
|
{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
868 |
|
|
{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
|
869 |
|
|
{"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
870 |
|
|
{"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
871 |
|
|
{"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
872 |
|
|
{"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
873 |
|
|
{"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
874 |
|
|
{"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
875 |
|
|
{"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
876 |
|
|
{"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
877 |
|
|
{"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX },
|
878 |
|
|
{"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
879 |
|
|
{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
|
880 |
|
|
{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
|
881 |
|
|
{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
|
882 |
|
|
{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
|
883 |
|
|
{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
884 |
|
|
{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
|
885 |
|
|
{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
|
886 |
|
|
{"sll.ob", "X,Y,Q", 0x78000010, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
887 |
|
|
{"sll.qh", "X,Y,Q", 0x78200010, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
888 |
|
|
{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
889 |
|
|
{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
|
890 |
|
|
{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
|
891 |
|
|
{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
|
892 |
|
|
{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
893 |
|
|
{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
|
894 |
|
|
{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
|
895 |
|
|
{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
|
896 |
|
|
{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
897 |
|
|
{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
898 |
|
|
{"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
|
899 |
|
|
{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
900 |
|
|
{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
|
901 |
|
|
{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
|
902 |
|
|
{"sra.qh", "X,Y,Q", 0x78200013, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
903 |
|
|
{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
904 |
|
|
{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
|
905 |
|
|
{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
|
906 |
|
|
{"srl.ob", "X,Y,Q", 0x78000012, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
907 |
|
|
{"srl.qh", "X,Y,Q", 0x78200012, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
908 |
|
|
/* ssnop is at the start of the table. */
|
909 |
|
|
{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
|
910 |
|
|
{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
911 |
|
|
{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
|
912 |
|
|
{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
913 |
|
|
{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
914 |
|
|
{"sub.ob", "X,Y,Q", 0x7800000a, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
915 |
|
|
{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
916 |
|
|
{"sub.qh", "X,Y,Q", 0x7820000a, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
917 |
|
|
{"suba.ob", "Y,Q", 0x78000036, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
918 |
|
|
{"suba.qh", "Y,Q", 0x78200036, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
919 |
|
|
{"subl.ob", "Y,Q", 0x78000436, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
920 |
|
|
{"subl.qh", "Y,Q", 0x78200436, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
921 |
|
|
{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
922 |
|
|
{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
|
923 |
|
|
{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
|
924 |
|
|
{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
|
925 |
|
|
{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
926 |
|
|
{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
|
927 |
|
|
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
|
928 |
|
|
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
|
929 |
|
|
{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
|
930 |
|
|
{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
|
931 |
|
|
{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
932 |
|
|
{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
933 |
|
|
{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
|
934 |
|
|
{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
935 |
|
|
{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
|
936 |
|
|
{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
|
937 |
|
|
{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
|
938 |
|
|
{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
|
939 |
|
|
{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
940 |
|
|
{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
|
941 |
|
|
{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
942 |
|
|
{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
|
943 |
|
|
{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
944 |
|
|
{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
|
945 |
|
|
{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
946 |
|
|
{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
|
947 |
|
|
{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
|
948 |
|
|
{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
|
949 |
|
|
{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
|
950 |
|
|
{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
|
951 |
|
|
{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
|
952 |
|
|
{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
|
953 |
|
|
{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
954 |
|
|
{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
955 |
|
|
{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
956 |
|
|
{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
|
957 |
|
|
{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
|
958 |
|
|
{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
|
959 |
|
|
{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
960 |
|
|
{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
961 |
|
|
{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
|
962 |
|
|
{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
|
963 |
|
|
{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
|
964 |
|
|
{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
965 |
|
|
{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
966 |
|
|
{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
|
967 |
|
|
{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
|
968 |
|
|
{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
|
969 |
|
|
{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
|
970 |
|
|
{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
|
971 |
|
|
{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
|
972 |
|
|
{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
973 |
|
|
{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
974 |
|
|
{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
975 |
|
|
{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
|
976 |
|
|
{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
|
977 |
|
|
{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
978 |
|
|
{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
979 |
|
|
{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
980 |
|
|
{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
|
981 |
|
|
{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
|
982 |
|
|
{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
983 |
|
|
{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
984 |
|
|
{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
985 |
|
|
{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
|
986 |
|
|
{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
|
987 |
|
|
{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
988 |
|
|
{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
989 |
|
|
{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
990 |
|
|
{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
991 |
|
|
{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
|
992 |
|
|
{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
993 |
|
|
{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
994 |
|
|
{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
|
995 |
|
|
{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
|
996 |
|
|
{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
|
997 |
|
|
{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
|
998 |
|
|
{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
|
999 |
|
|
{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
|
1000 |
|
|
{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
|
1001 |
|
|
{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
|
1002 |
|
|
{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
|
1003 |
|
|
{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
|
1004 |
|
|
{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
|
1005 |
|
|
{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
|
1006 |
|
|
{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
|
1007 |
|
|
{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
|
1008 |
|
|
{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
|
1009 |
|
|
{"wach.ob", "Y", 0x7a00003e, 0xffff07ff, WR_MACC|RD_S|FP_D, MX|SB1 },
|
1010 |
|
|
{"wach.qh", "Y", 0x7a20003e, 0xffff07ff, WR_MACC|RD_S|FP_D, MX },
|
1011 |
|
|
{"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },
|
1012 |
|
|
{"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, WR_MACC|RD_S|RD_T|FP_D, MX },
|
1013 |
|
|
{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32 },
|
1014 |
|
|
{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
|
1015 |
|
|
{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
|
1016 |
|
|
{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
|
1017 |
|
|
{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
1018 |
|
|
{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
|
1019 |
|
|
{"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 },
|
1020 |
|
|
{"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
|
1021 |
|
|
{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
|
1022 |
|
|
|
1023 |
|
|
/* No hazard protection on coprocessor instructions--they shouldn't
|
1024 |
|
|
change the state of the processor and if they do it's up to the
|
1025 |
|
|
user to put in nops as necessary. These are at the end so that the
|
1026 |
|
|
disassembler recognizes more specific versions first. */
|
1027 |
|
|
{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
|
1028 |
|
|
{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
|
1029 |
|
|
{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
|
1030 |
|
|
{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
|
1031 |
|
|
{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
|
1032 |
|
|
{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
|
1033 |
|
|
{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
|
1034 |
|
|
{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
|
1035 |
|
|
|
1036 |
|
|
/* Conflicts with the 4650's "mul" instruction. Nobody's using the
|
1037 |
|
|
4010 any more, so move this insn out of the way. If the object
|
1038 |
|
|
format gave us more info, we could do this right. */
|
1039 |
|
|
{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
|
1040 |
|
|
};
|
1041 |
|
|
|
1042 |
|
|
#define MIPS_NUM_OPCODES \
|
1043 |
|
|
((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
|
1044 |
|
|
const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
|
1045 |
|
|
|
1046 |
|
|
/* const removed from the following to allow for dynamic extensions to the
|
1047 |
|
|
* built-in instruction set. */
|
1048 |
|
|
struct mips_opcode *mips_opcodes =
|
1049 |
|
|
(struct mips_opcode *) mips_builtin_opcodes;
|
1050 |
|
|
int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
|
1051 |
|
|
#undef MIPS_NUM_OPCODES
|