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[/] [or1k_old/] [trunk/] [gdb-5.3/] [sim/] [ppc/] [hw_cpu.c] - Blame information for rev 1782

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1 1181 sfurman
/*  This file is part of the program psim.
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    Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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    */
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#ifndef _HW_CPU_C_
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#define _HW_CPU_C_
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#ifndef STATIC_INLINE_HW_CPU
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#define STATIC_INLINE_HW_CPU STATIC_INLINE
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#endif
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#include "device_table.h"
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#include "hw_cpu.h"
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#include "interrupts.h"
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#include "cpu.h"
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/* DEVICE
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   cpu - Interface to a Processor
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   DESCRIPTION
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   The CPU device provides the connection between the interrupt net
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   (linking the devices and the interrupt controller) and the
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   simulated model of each processor.  This device contains interrupt
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   ports that correspond directly to the external interrupt stimulus
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   that can be sent to a given processor.  Sending an interrupt to one
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   of the ports results in an interrupt being delivered to the
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   corresponding processor.
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   Typically, an interrupt controller would have its inputs connected
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   to device interrupt sources and its outputs (sreset, int, et.al.)
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   connected to this device.
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   PROPERTIES
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   cpu-nr = <integer> (required)
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   Specify the processor (1..N) that this cpu device node should
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   control.
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   EXAMPLES
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   Connect an OpenPIC interrupt controller interrupt ports to
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   processor zero.
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   | -o '/phb/opic@0 > irq0 int /cpus/cpu@0' \
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   | -o '/phb/opic@0 > init hreset /cpus/cpu@0' \
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   */
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typedef struct _hw_cpu_device {
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  int cpu_nr;
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  cpu *processor;
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} hw_cpu_device;
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static const device_interrupt_port_descriptor hw_cpu_interrupt_ports[] = {
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  { "hreset", hw_cpu_hard_reset },
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  { "sreset", hw_cpu_soft_reset },
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  { "int", hw_cpu_external_interrupt },
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  { "mci", hw_cpu_machine_check_interrupt },
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  { "smi", hw_cpu_system_management_interrupt },
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  { NULL }
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};
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static void *
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hw_cpu_create(const char *name,
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              const device_unit *unit_address,
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              const char *args)
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{
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  hw_cpu_device *hw_cpu = ZALLOC(hw_cpu_device);
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  return hw_cpu;
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}
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/* during address initialization ensure that any missing cpu
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   properties are added to this devices node */
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static void
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hw_cpu_init_address(device *me)
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{
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  hw_cpu_device *hw_cpu = (hw_cpu_device*)device_data(me);
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  /* populate the node with properties */
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  /* clear our data */
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  memset(hw_cpu, 0x0, sizeof(hw_cpu_device));
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  hw_cpu->cpu_nr = device_find_integer_property(me, "cpu-nr");
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  hw_cpu->processor = psim_cpu(device_system(me), hw_cpu->cpu_nr);
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}
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/* Take the interrupt and synchronize its delivery with the clock.  If
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   we've not yet scheduled an interrupt for the next clock tick, take
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   the oportunity to do it now */
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static void
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hw_cpu_interrupt_event(device *me,
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                       int my_port,
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                       device *source,
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                       int source_port,
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                       int level,
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                       cpu *processor,
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                       unsigned_word cia)
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{
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  hw_cpu_device *hw_cpu = (hw_cpu_device*)device_data(me);
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  if (my_port < 0 || my_port >= hw_cpu_nr_interrupt_ports)
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    error("hw_cpu_interrupt_event_callback: interrupt port out of range %d\n",
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          my_port);
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  switch (my_port) {
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    /*case hw_cpu_hard_reset:*/
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    /*case hw_cpu_soft_reset:*/
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  case hw_cpu_external_interrupt:
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    external_interrupt(hw_cpu->processor, level);
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    break;
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    /*case hw_cpu_machine_check_interrupt:*/
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  default:
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    error("hw_cpu_deliver_interrupt: unimplemented interrupt port %d\n",
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          my_port);
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    break;
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  }
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}
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static device_callbacks const hw_cpu_callbacks = {
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  { hw_cpu_init_address, }, /* init */
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  { NULL, }, /* address */
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  { NULL, }, /* io */
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  { NULL, }, /* DMA */
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  { hw_cpu_interrupt_event, NULL, hw_cpu_interrupt_ports }, /* interrupts */
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  { NULL, NULL, },
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};
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const device_descriptor hw_cpu_device_descriptor[] = {
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  { "hw-cpu", hw_cpu_create, &hw_cpu_callbacks },
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  { "cpu", hw_cpu_create, &hw_cpu_callbacks },
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  { NULL, },
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};
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#endif /* _HW_CPU_C_ */

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