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[/] [or1k_old/] [trunk/] [mp3/] [lib/] [xilinx/] [unisims/] [OR5B1.v] - Blame information for rev 1782

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1 266 lampret
// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/OR5B1.v,v 1.1.1.1 2001-11-04 18:59:50 lampret Exp $
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/*
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FUNCTION        : 5-INPUT OR GATE
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*/
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`timescale  100 ps / 10 ps
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`celldefine
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module OR5B1 (O, I0, I1, I2, I3, I4);
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    parameter cds_action = "ignore";
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    output O;
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    input  I0, I1, I2, I3, I4;
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    not N0 (i0_inv, I0);
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    or O1 (O, i0_inv, I1, I2, I3, I4);
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    specify
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        (I0 *> O) = (1, 1);
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        (I1 *> O) = (1, 1);
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        (I2 *> O) = (1, 1);
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        (I3 *> O) = (1, 1);
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        (I4 *> O) = (1, 1);
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    endspecify
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endmodule
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`endcelldefine

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