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[/] [or1k_old/] [trunk/] [or1ksim/] [peripheral/] [vga.c] - Blame information for rev 1477

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1 261 markom
/* vga.c -- Definition of types and structures for VGA/LCD
2
   Copyright (C) 2001 Marko Mlinar, markom@opencores.org
3
 
4
This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program; if not, write to the Free Software
18
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
 
20 645 markom
#include <stdio.h>
21 1358 nogj
#include <string.h>
22 1350 nogj
 
23
#include "config.h"
24
 
25
#ifdef HAVE_INTTYPES_H
26
#include <inttypes.h>
27
#endif
28
 
29
#include "port.h"
30
#include "arch.h"
31 645 markom
#include "sim-config.h"
32
#include "vga.h"
33
#include "abstract.h"
34 805 markom
#include "sched.h"
35 645 markom
 
36
/* When this counter reaches config.vgas[].refresh_rate, a screenshot is taken and outputted */
37 1368 nogj
struct vga_state {
38 1461 nogj
  int enabled;
39 645 markom
  int pics;
40
  unsigned long ctrl, stat, htim, vtim;
41
  int vbindex;
42
  unsigned long vbar[2];
43
  unsigned hlen, vlen;
44
  int pindex;
45
  unsigned long palette[2][256];
46 1368 nogj
  oraddr_t baseaddr;
47
  int refresh_rate;
48
  int irq;
49
  char *filename;
50
};
51 645 markom
 
52
 
53
/* Write a register */
54 1359 nogj
void vga_write32(oraddr_t addr, uint32_t value, void *dat)
55 645 markom
{
56 1368 nogj
  struct vga_state *vga = dat;
57 645 markom
 
58 1368 nogj
  addr -= vga->baseaddr;
59 645 markom
 
60
  switch (addr) {
61 1368 nogj
    case VGA_CTRL:  vga->ctrl = value; break;
62
    case VGA_STAT:  vga->stat = value; break;
63
    case VGA_HTIM:  vga->htim = value; break;
64
    case VGA_VTIM:  vga->vtim = value; break;
65
    case VGA_HVLEN: vga->hlen = (value >> 16) + 2; vga->hlen = (value & 0xffff) + 2; break;
66
    case VGA_VBARA: vga->vbar[0] = value; break;
67
    case VGA_VBARB: vga->vbar[1] = value; break;
68 645 markom
    default:
69
      if (addr >= VGA_CLUTA && addr < VGA_CLUTB) {
70 1368 nogj
        vga->palette[0][addr - VGA_CLUTA] = value & 0x00ffffff;
71 645 markom
      } else if (addr >= VGA_CLUTB) {
72 1368 nogj
        vga->palette[1][addr - VGA_CLUTB] = value & 0x00ffffff;
73 645 markom
      } else {
74 1368 nogj
        fprintf( stderr, "vga_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Out of range\n", addr + vga->baseaddr, value);
75 645 markom
        return;
76
      }
77
      break;
78
  }
79
}
80
 
81
/* Read a register */
82 1359 nogj
uint32_t vga_read32(oraddr_t addr, void *dat)
83 645 markom
{
84 1368 nogj
  struct vga_state *vga = dat;
85 645 markom
 
86 1368 nogj
  addr -= vga->baseaddr;
87 645 markom
 
88
  switch (addr) {
89 1368 nogj
    case VGA_CTRL:  return vga->ctrl;
90
    case VGA_STAT:  return vga->stat;
91
    case VGA_HTIM:  return vga->htim;
92
    case VGA_VTIM:  return vga->vtim;
93
    case VGA_HVLEN: return ((vga->hlen - 2) << 16) | (vga->vlen - 2);
94
    case VGA_VBARA: return vga->vbar[0];
95
    case VGA_VBARB: return vga->vbar[1];
96 645 markom
    default:
97
      if (addr >= VGA_CLUTA && addr < VGA_CLUTB) {
98 1368 nogj
        return vga->palette[0][addr - VGA_CLUTA];
99 645 markom
      } else if (addr >= VGA_CLUTB) {
100 1368 nogj
        return vga->palette[1][addr - VGA_CLUTB];
101 645 markom
      } else {
102 1350 nogj
        fprintf( stderr, "vga_read32( 0x%"PRIxADDR" ): Out of range\n", addr);
103 645 markom
        return 0;
104
      }
105
      break;
106
  }
107
  return 0;
108
}
109
 
110
/* This code will only work on little endian machines */
111
#ifdef __BIG_ENDIAN__
112
#warning Image dump not supported on big endian machines 
113
 
114 1368 nogj
static int vga_dump_image (char *filename, struct vga_start *vga)
115 645 markom
{
116
  return 1;
117
}
118
 
119
#else 
120
 
121
typedef struct {
122
   unsigned short int type;                 /* Magic identifier            */
123
   unsigned int size;                       /* File size in bytes          */
124
   unsigned short int reserved1, reserved2;
125
   unsigned int offset;                     /* Offset to image data, bytes */
126
} BMP_HEADER;
127
 
128
typedef struct {
129
   unsigned int size;               /* Header size in bytes      */
130
   int width,height;                /* Width and height of image */
131
   unsigned short int planes;       /* Number of colour planes   */
132
   unsigned short int bits;         /* Bits per pixel            */
133
   unsigned int compression;        /* Compression type          */
134
   unsigned int imagesize;          /* Image size in bytes       */
135
   int xresolution,yresolution;     /* Pixels per meter          */
136
   unsigned int ncolours;           /* Number of colours         */
137
   unsigned int importantcolours;   /* Important colours         */
138
} INFOHEADER;
139
 
140
 
141
/* Dumps a bmp file, based on current image */
142 1368 nogj
static int vga_dump_image (char *filename, struct vga_state *vga)
143 645 markom
{
144 1368 nogj
  int sx = vga->hlen;
145
  int sy = vga->vlen;
146 645 markom
  int i, x, y;
147 1368 nogj
  int pc = vga->ctrl & VGA_CTRL_PC;
148
  int rbpp = vga->ctrl & VGA_CTRL_CD;
149 645 markom
  int bpp = rbpp >> 8;
150
 
151
  BMP_HEADER bh;
152
  INFOHEADER ih;
153
  FILE *fo;
154
 
155 1368 nogj
  if (!sx || !sy) return 1;
156 645 markom
 
157
  /* 16bpp and 32 bpp will be converted to 24bpp */
158
  if (bpp == 1 || bpp == 3) bpp = 2;
159
 
160
  bh.type = 19778; /* BM */
161
  bh.size = sizeof (BMP_HEADER) + sizeof (INFOHEADER) + sx * sy * (bpp * 4 + 4) + (pc ? 1024 : 0);
162
  bh.reserved1 = bh.reserved2 = 0;
163
  bh.offset = sizeof (BMP_HEADER) + sizeof (INFOHEADER) + (pc ? 1024 : 0);
164
 
165
  ih.size = sizeof (INFOHEADER);
166
  ih.width = sx; ih.height = sy;
167
  ih.planes = 1; ih.bits = bpp * 4 + 4;
168
  ih.compression = 0; ih.imagesize = x * y * (bpp * 4 + 4);
169
  ih.xresolution = ih.yresolution = 0;
170
  ih.ncolours = 0; /* should be generated */
171
  ih.importantcolours = 0; /* all are important */
172
 
173
  fo = fopen (filename, "wb+");
174
  if (!fwrite (&bh, sizeof (BMP_HEADER), 1, fo)) return 1;
175
  if (!fwrite (&ih, sizeof (INFOHEADER), 1, fo)) return 1;
176
 
177
  if (pc) { /* Write palette? */
178
    for (i = 0; i < 256; i++) {
179
      unsigned long val, d;
180 1368 nogj
      d = vga->palette[vga->pindex][i];
181 645 markom
      val = (d >> 0) & 0xff;   /* Blue */
182
      val |= (d >> 8) & 0xff;  /* Green */
183
      val |= (d >> 16) & 0xff; /* Red */
184
      if (!fwrite (&val, sizeof (val), 1, fo)) return 1;
185
    }
186
  }
187
 
188
  /* Data is stored upside down */
189
  for (y = sy - 1; y >= 0; y--) {
190
    int align = 4 - ((bpp + 1) * sx) % 4;
191
    int zero = 0;
192
    for (x = 0; x < sx; x++) {
193 1368 nogj
      unsigned long pixel = evalsim_mem32 (vga->vbar[vga->vbindex] + (y * sx + x) * (bpp + 1));
194 645 markom
      if (!fwrite (&pixel, sizeof (pixel), 1, fo)) return 1;
195
    }
196
    if (!fwrite (&zero, align, 1, fo)) return 1;
197
  }
198
 
199
  fclose (fo);
200
  return 0;
201
}
202
#endif /* !__BIG_ENDIAN__ */
203
 
204 1368 nogj
void vga_job (void *dat)
205 805 markom
{
206 1368 nogj
  struct vga_state *vga = dat;
207 805 markom
  /* dump the image? */
208
  char temp[STR_SIZE];
209 1368 nogj
  sprintf (temp, "%s%04i.bmp", vga->filename, vga->pics++);
210
  vga_dump_image (temp, vga);
211 805 markom
 
212 1390 nogj
  SCHED_ADD(vga_job, dat, vga->refresh_rate);
213 805 markom
}
214
 
215 645 markom
/* Reset all VGAs */
216 1368 nogj
void vga_reset (void *dat)
217 645 markom
{
218 1368 nogj
  struct vga_state *vga = dat;
219 645 markom
 
220 1368 nogj
  int i;
221 645 markom
 
222 1368 nogj
  /* Init palette */
223
  for (i = 0; i < 256; i++)
224
    vga->palette[0][i] = vga->palette[1][i] = 0;
225 645 markom
 
226 1368 nogj
  vga->ctrl = vga->stat = vga->htim = vga->vtim = 0;
227
  vga->hlen = vga->vlen = 0;
228
  vga->vbar[0] = vga->vbar[1] = 0;
229
 
230
  /* Init screen dumping machine */
231
  vga->pics = 0;
232 645 markom
 
233 1368 nogj
  vga->pindex = 0;
234
  vga->vbindex = 0;
235
 
236 1390 nogj
  SCHED_ADD(vga_job, dat, vga->refresh_rate);
237 645 markom
}
238 1358 nogj
 
239
/*----------------------------------------------------[ VGA Configuration ]---*/
240
void vga_baseaddr(union param_val val, void *dat)
241
{
242 1368 nogj
  struct vga_state *vga = dat;
243
  vga->baseaddr = val.addr_val;
244 1358 nogj
}
245
 
246
void vga_irq(union param_val val, void *dat)
247
{
248 1368 nogj
  struct vga_state *vga = dat;
249
  vga->irq = val.int_val;
250 1358 nogj
}
251
 
252
void vga_refresh_rate(union param_val val, void *dat)
253
{
254 1368 nogj
  struct vga_state *vga = dat;
255
  vga->refresh_rate = val.int_val;
256 1358 nogj
}
257
 
258
void vga_filename(union param_val val, void *dat)
259
{
260 1368 nogj
  struct vga_state *vga = dat;
261
  if(!(vga->filename = strdup (val.str_val)));
262 1358 nogj
}
263
 
264 1461 nogj
void vga_enabled(union param_val val, void *dat)
265
{
266
  struct vga_state *vga = dat;
267 1477 nogj
  vga->enabled = val.int_val;
268 1461 nogj
}
269
 
270 1368 nogj
void *vga_sec_start(void)
271
{
272
  struct vga_state *new = malloc(sizeof(struct vga_state));
273
 
274
  if(!new) {
275
    fprintf(stderr, "Peripheral VGA: Run out of memory\n");
276
    exit(-1);
277
  }
278
 
279
  new->baseaddr = 0;
280 1461 nogj
  new->enabled = 1;
281 1368 nogj
 
282
  return new;
283
}
284
 
285
void vga_sec_end(void *dat)
286
{
287
  struct vga_state *vga = dat;
288
 
289 1461 nogj
  if(!vga->enabled) {
290
    free(dat);
291
    return;
292
  }
293
 
294 1368 nogj
  if (vga->baseaddr)
295
    register_memoryarea(vga->baseaddr, VGA_ADDR_SPACE, 4, 0, vga_read32, vga_write32, dat);
296
 
297
  reg_sim_reset(vga_reset, dat);
298
}
299
 
300 1358 nogj
void reg_vga_sec(void)
301
{
302 1368 nogj
  struct config_section *sec = reg_config_sec("vga", vga_sec_start, vga_sec_end);
303 1358 nogj
 
304
  reg_config_param(sec, "baseaddr", paramt_addr, vga_baseaddr);
305 1461 nogj
  reg_config_param(sec, "enabled", paramt_int, vga_enabled);
306 1358 nogj
  reg_config_param(sec, "irq", paramt_int, vga_irq);
307
  reg_config_param(sec, "refresh_rate", paramt_int, vga_refresh_rate);
308
  reg_config_param(sec, "filename", paramt_str, vga_filename);
309
}

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