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  /*

   3-Jul-97 - the VCS simulator does not allow overwriting parameters. I

           changed then to integers and inited them in the initial clause.

           This should make the model better suited for all Verilog simulators.

   3-Jul-97 - Stretch size of OpBlock, CmdAdd_1 and CmdAdd_2 for 32 block parts.

  11-Jul-97 - added variable flash_cycle. Only check TAVAV timing when CEn is

           asserted. This avoids errorious ERRORS when the address toggles

           to fast when CEn is disabled.

  */

  /*

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  */

  // This model is representative of the flash device described in the

  // Byte-Wide Smart 3 FlashFile(tm) Memory Family datasheet (Order

  // Number 290598).

  `timescale      1ns/1ns

  //generic defines for readability (already defined!)

  `define FALSE           1'b0

  `define TRUE            1'b1

  `define Byte            7:0

  `define VIL             1'b0

  `define VIH             1'b1

  `define rpb_vil         2'b00

  `define rpb_vih         2'b01

  `define rpb_vhh         2'b10

  `define Ready           1'b1

  `define Busy            1'b0

  // These constants are the actual command codes

  `define ClearCSRCmd     8'h50

  `define ProgramCmd      8'h10

  `define Program2Cmd     8'h40

  `define EraseBlockCmd   8'h20

  `define ReadArrayCmd    8'hFF

  `define ReadCSRCmd      8'h70

  `define ReadIDCmd       8'h90

  `define SuspendCmd      8'hB0  //Valid for both erase

  `define ResumeCmd       8'hD0  //and write suspend

  `define ConfirmCmd      8'hD0

  `define LBSetupCmd      8'h60

  `define SetBlockLBCmd   8'h01

  `define SetMasterLBCmd  8'hF1

  `define ClearLBCmd      8'hD0

  `define ReadMode_T      2:0

  `define rdARRAY         3'b000

  `define rdCSR           3'b011

  `define rdID            3'b100

  `define   Program       2'b00

  `define   Erase         2'b01

  `define   Lock          2'b10

  // Cmd_T record

  `define   Cmd_T             157:0

  `define   CmdAdd_1          157:137

  `define   CmdAdd_2          136:116

  `define   Add               115:96

  `define   CmdData_1         95:88

  `define   CmdData_2         87:78

  `define   Cmd               79:72

  `define   Count             71:40

  `define   Time              39:8

  `define   Confirm           7

  `define   OpBlock           6:2

  `define   OpType            1:0

  `define WritePtr_T          1:0

  `define NewCmd              2'b01

  `define CmdField            2'b10

  `define Locked              1'b1

  `define Unlocked            1'b0

  `define Vcc2700             3'b100

  `define Vcc3300             3'b010

  `define Vcc5000             3'b001

  `include "dp016s3.v"

  // device specific

  //module definition for Intel Smartvoltage FlashFile(tm) Flash

  //

  //vpp and vcc are are 32 bit vectors which are treated as unsigned int

  //scale for vpp and vcc is millivolts.  ie. 0 = 0V, 5000 = 5V

  //

  module i28f016s3(dq, addr, ceb, oeb, web, rpb, ryby, vpp, vcc, rpblevel);

  inout [`MaxOutputs-1:0] dq;     //8 outputs

  input [`AddrSize-1:0]   addr;   //address pins.

  input          ceb,    //CE# - chip enable bar

                 oeb,    //OE# - output enable bar

                 web,    //WE# - write enable bar

                 rpb;    //RP# - reset bar, powerdown

  output         ryby;   //RY/BY# - Ready/Busy signal

  input [31:0]   vpp,    //vpp in millivolts

                 vcc;    //vcc in millivolts

  input [1:0]    rpblevel;   //rpb at vil or vih or vhh

  reg [`Byte]    MainArray[`MainArraySize];  //flash array

  //  Flag to show that a Cmd has been written

  //  and needs predecoding

  reg        CmdValid ;

  // This points to where data written to the part will

  // go. By default it is to NewCmd. CmdField means the

  // chip is waiting on more data for the cmd (ie confirm)

  reg [`WritePtr_T]   WriteToPtr ;

  // Contains the current executing command and all its

  // support information.

  reg [`Cmd_T]   Cmd ;

  reg [`Cmd_T]   Algorithm;

  reg [`Cmd_T]   SuspendedAlg;

  // Output of Data

  reg [7:0]  ArrayOut ;

  // Current output of the Compatible status register

  reg [7:0]  CSROut ;

  // Current output of the ID register

  reg [7:0]  IDOut ;

  //  Startup Flag phase

  reg        StartUpFlag ;

  //  Global Reset Flag

  reg        Reset ;

  //  Variable to see if chip can only be read -- 2.7V Vcc

  reg        ReadOnly;

  //  Vpp Monitoring

  reg        VppFlag ;

  reg        VppError ;

  reg        VppErrFlag ;

  reg        ClearVppFlag ;

  //  Internal representation of the CSR SR.1 bit

  reg        Protected;

  //  Internal representation of the CSR SR.4 bit

  reg        Program_SetLBError ;

  //  Internal representation of the CSR SR.5 bit

  reg        Erase_ClearLBError ;

  //  Internal representation of GSR bit

  reg [`ReadMode_T] ReadMode ;

  //  Current value of the CSR

  wire [`Byte] CSR ;

  //  Flag that determines if the chip is driving

  //  the outputs

  reg        DriveOutputs ;

  //  Internal value of the out data.  If DriveOutputs

  //  is active this value will be placed on the

  //  outputs.  -1 == Unknown or XXXX

  reg [`MaxOutputs-1:0]    InternalOutput ;

  //  Number of addition writes necessary to

  //  supply the current command information.

  //  When it hits zero it goes to Decode

  integer       DataPtr ;

  //  Master internal write enable

  wire       Internal_WE ;

  //  Master internal output enable

  wire       Internal_OE ;

  wire       Internal_OE2 ;

  wire       Internal_OE3 ;

  //  Master internal read enable

  wire       Internal_RE ;

  //  Internal flag to tell if an algorithm is running

  reg        ReadyBusy ;

  //  Flag to represent if the chip is write suspended

  reg        WriteSuspended ;

  //  Flag to represent if the chip is erase suspended

  reg        EraseSuspended ;

  //  Flag to represent the chip should be suspended

  reg        Suspend ;

  //  Variable to hold which algorithm (program or erase)

  //  is to be suspended

  reg [1:0]  ToBeSuspended;

  // Array to hold block lock-bit information

  reg        BlockLockBit[`NumberOfBlocks-1:0];

  // Variable for block number to be locked

  integer    WhichBlock;

  // Flag to represent state of master lock-bit

  reg        MasterLock;

  //  Algorithm Timer

  reg        TimerClk ;

  //  Flag to show the running algorithm is done.

  reg        AlgDone ;

  // Number of timer cycles remaining for the

  // current algorithm

  integer    AlgTime;

  // Number of timer cycles remaining for erase operation

  // when erase suspended and program operation in progress

  integer    TimeLeft;

  // Generic temporary varible

  integer    LoopCntr ;

  reg        Other ;

  //Block begin and end address

  reg [`AddrSize-1:0] BlocksBegin[0:`NumberOfBlocks-1];

  reg [`AddrSize-1:0] BlocksEnd[0:`NumberOfBlocks-1];

  reg [31:0]  BlocksEraseCount[0:`NumberOfBlocks-1];

  // states the flash is in a cycle

  reg     flash_cycle;

  //**********************************************************************

  //TIMING VALUES

  //**********************************************************************

  time    ToOut ;

  time    last_addr_time ,curr_addr_time;

  time    last_oe_time, curr_oe_time;

  time    last_ce_time, curr_ce_time;

  time    last_rp_time, curr_rp_time;

  time    last_ReadMode_time, curr_ReadMode_time ;

  time    last_Internal_RE_time, curr_Internal_RE_time ;

  time    last_Internal_WE_time, curr_Internal_WE_time ;

  time    last_dq_time ,curr_dq_time;

  time    last_rpb_time, curr_rpb_time ;

  time    WriteRecovery ;

  time    TempTime;

  time    Program_Time_Byte;

  time    Block_Erase_Time;

  time    Set_LockBit_Time;

  time    Clear_LockBit_Time;

  time    Program_Suspend_Time;  // latency time

  time    Erase_Suspend_Time;    // latency time

  //**********************************************************************

  //input configuration

  parameter

      LoadOnPowerup   = 1,          //load array from file

`ifdef DAMJAN

      LoadFileName    = "../src/damjan_flash.in",  //File to load array with

`else

      LoadFileName    = "../src/flash.in",  //File to load array with

`endif

      SaveOnPowerdown = `TRUE,         //save array to file

      SaveFileName    = "../out/flash.out"; //save file name

  //TIMING PARAMETERS

  integer

      TAVAV       ,

      TPHQV       ,

      TELQV       ,

      TGLQV       ,

      TAVQV       ,

      TGLQX       ,

      TGHQZ       ,

      TEHQZ       ,

      TOH         ,

      TWPH        ,

      TWP         ,

      TPHWL       ,

      TPHHWH      ,

      TAVWH       ,

      TDVWH       ,

      TWHDX       ,

      TWHAX       ,

      TimerPeriod ;

  //**********************************************************************

  initial begin

      flash_cycle      =      0     ;

      Other               =       `FALSE  ;

      AlgDone             =       `FALSE  ;

      Reset               =        1'bx   ;

      Reset               <=      `TRUE   ;

      StartUpFlag         =       `TRUE   ;

      StartUpFlag         <=  #2  `FALSE  ;

      DriveOutputs        =       `FALSE  ;

      ToOut               =        0      ;

      VppError            =       `FALSE  ;

      VppErrFlag          =       `FALSE  ;

      ClearVppFlag        =       `FALSE  ;

      VppFlag             =       `FALSE  ;

      WriteSuspended      =       `FALSE  ;

      EraseSuspended      =       `FALSE  ;

      Suspend             =       `FALSE  ;

      ToBeSuspended       =       `Program;

      MasterLock          =       `Unlocked;

      Erase_ClearLBError  =       `FALSE  ;

      Protected           =       `FALSE  ;

      TimerClk            =        1'b0   ;

      ArrayOut            =       `MaxOutputs'hxx ;

      CSROut              =        0      ;

      IDOut               =        0      ;

      CmdValid            =       `FALSE  ;

      WriteToPtr          =       `NewCmd ;

      last_addr_time      =        0      ;

      curr_addr_time      =        0      ;

      last_ce_time        =        0      ;

      curr_ce_time        =        0      ;

      last_oe_time        =        0      ;

      curr_oe_time        =        0      ;

      last_rp_time        =        0      ;

      curr_rp_time        =        0      ;

      last_ReadMode_time  =        0      ;

      curr_ReadMode_time  =        0      ;

      last_dq_time        =        0      ;

      curr_dq_time        =        0      ;

      last_rpb_time       =        0      ;

      curr_rpb_time       =        0      ;

      WriteRecovery       =        0      ;

      last_Internal_RE_time =      0      ;

      curr_Internal_RE_time =      0      ;

      InternalOutput        =     `MaxOutputs'hxx ;

      last_Internal_WE_time =      0      ;

      curr_Internal_WE_time =      0      ;

      Program_Time_Byte    = `AC_ProgramTime_Byte_50_12 ;

      Block_Erase_Time     = `AC_EraseTime_Block_50_12;

      Set_LockBit_Time     = `AC_Set_LockBit_50_12;

      Clear_LockBit_Time   = `AC_Clear_LockBit_50_12;

      Program_Suspend_Time = `AC_Program_Suspend_50_12;

      Erase_Suspend_Time   = `AC_Erase_Suspend_50_12;

      $readmemh(`BlockFileBegin,BlocksBegin);

      $readmemh(`BlockFileEnd,BlocksEnd);

      for (LoopCntr = 0; LoopCntr <= `NumberOfBlocks; LoopCntr = LoopCntr

  + 1) begin

        BlocksEraseCount [LoopCntr] = 0 ;

      end

      for (LoopCntr = 0; LoopCntr < `NumberOfBlocks; LoopCntr = LoopCntr

  + 1) begin

        BlockLockBit[LoopCntr] = `Unlocked;

      end

  //--------------------------------------------------------------------

  // Array Init

  //--------------------------------------------------------------------

  //Constant condition expression: LoadOnPowerup == 1'b1

    if (LoadOnPowerup)

      LoadFromFile;

    else begin

      $display("Initializing Memory to 'hFF");

      for (LoopCntr = 0; LoopCntr <= `MaxAddr; LoopCntr = LoopCntr + 1) begin

        MainArray [LoopCntr] = 8'hFF ;

      end

    end

  end  //initial

  //--------------------------------------------------------------------

  // LoadFromFile

  //  This is used when the LoadOnPowerup parameter is set so that the

  //  Main array contains code at startup.  Basically it loads the array

  //  from data in a file (LoadFileName).

  //--------------------------------------------------------------------

  task LoadFromFile ;

    begin

      $display("Loading from file %s",LoadFileName);

      $readmemh(LoadFileName,MainArray, 1048576);

    end

  endtask

  //--------------------------------------------------------------------

  // StoreToFile

  //  This is used when the SaveOnPowerDown flag is set so that the Main

  //  Array stores code at powerdown.  Basically it stores the array into

  //  a file (SaveFileName).

  //--------------------------------------------------------------------

  task  StoreToFile;

    reg [31:0]  ArrayAddr ;

    reg [31:0]  outfile ;

    begin

      outfile = $fopen(SaveFileName) ;

      if (outfile == 0)

        $display("Error, cannot open output file %s",SaveFileName) ;

      else

        $display("Saving data to file %s",SaveFileName);

      for (ArrayAddr = 0 ; ArrayAddr <= `MaxAddr; ArrayAddr = ArrayAddr

  + 1) begin

        $fdisplay(outfile,"%h",MainArray[ArrayAddr]);

      end

    end

  endtask

  //--------------------------------------------------------------------

  // Program

  //  Description: Programs new values in to the array

  //--------------------------------------------------------------------

  task  Program ;

    inout  [`Byte] TheArrayValue ;

    input  [`Byte] DataIn  ;

    reg    [`Byte] OldData;

    begin

      OldData = TheArrayValue;

      TheArrayValue = DataIn & OldData;

    end

  endtask

  assign  Internal_OE  = !(ceb | oeb | !rpb) ;

  assign  Internal_OE2 = Internal_OE ;

  assign  Internal_OE3 = Internal_OE2 ;

  assign  Internal_RE  = (((ReadyBusy == `Ready) || (ReadMode != `rdARRAY))

  && !ceb && !Reset) ;

  assign  Internal_WE  = !(ceb | web | !rpb) ;

  // register definitions //

  // Compatible Status Register

  assign  CSR [7] = ReadyBusy;

  assign  CSR [6] = EraseSuspended ;

  assign  CSR [5] = Erase_ClearLBError ;

  assign  CSR [4] = Program_SetLBError ;

  assign  CSR [3] = VppError ;

  assign  CSR [2] = WriteSuspended ;

  assign  CSR [1] = Protected ;

  assign  CSR [0] = 1'b0 ;

  // Output Drivers //

  assign dq[7:0] = (DriveOutputs == `TRUE) ? InternalOutput : 8'hz ;

  always @(Reset) begin : Reset_process

    if (Reset) begin

      ClearVppFlag    <=  #1  `TRUE   ;

      ClearVppFlag    <=  #9  `FALSE  ;

      AlgDone          =      `FALSE  ;

      VppError         =      `FALSE  ;

      ReadMode         =      `rdARRAY;

      ReadyBusy        =      `Ready  ;

      WriteSuspended   =      `FALSE  ;

      EraseSuspended   =      `FALSE  ;

      Suspend          =      `FALSE  ;

      Erase_ClearLBError  =   `FALSE  ;

      Program_SetLBError  =   `FALSE  ;

      Protected        =      `FALSE  ;

      AlgTime          =       0      ;

      CmdValid         =      `FALSE  ;

      WriteToPtr       =      `NewCmd ;

      CSROut           =       0      ;

      IDOut            =       0      ;

    end

  end

  always @(Internal_RE or ReadMode or addr) begin : array_read

    if (Internal_RE && ReadMode == `rdARRAY)

      ArrayOut  = MainArray[addr] ;      // x8 outputs

  end

  always @(Internal_RE or ReadMode or addr or Internal_OE2) begin

    // output mux

    // Determine and generate the access time .

    ToOut = 0;

    if ($time > TAVQV) begin

      last_addr_time = $time - curr_addr_time;

      if ((last_addr_time < TAVQV) && ((TAVQV - last_addr_time) > ToOut))

        ToOut = TAVQV - last_addr_time ;

      last_oe_time = $time - curr_oe_time;

      if ((last_oe_time < TGLQV) && ((TGLQV - last_oe_time) > ToOut))

        ToOut = TGLQV - last_oe_time ;

      last_ce_time = $time - curr_ce_time;

      if ((last_ce_time < TELQV) && ((TELQV - last_ce_time) > ToOut))

        ToOut = TELQV - last_ce_time ;

      last_rp_time = $time - curr_rp_time;

      if ((last_rp_time < TPHQV) && ((TPHQV - last_rp_time) > ToOut))

        ToOut = TPHQV - last_rp_time ;

      last_ReadMode_time = $time - curr_ReadMode_time;

      if ((last_ReadMode_time < TAVQV) && ((TAVQV - last_ReadMode_time) >

  ToOut))

        ToOut = TAVQV - last_ReadMode_time ;

      last_Internal_RE_time = $time - curr_Internal_RE_time ;

      if ((last_Internal_RE_time < TAVQV) && ((TAVQV - last_Internal_RE_time)

  > ToOut))

        ToOut = TAVQV - last_Internal_RE_time ;

    end  // if

    //  Output Mux with timing

    if (!StartUpFlag) begin

      case (ReadMode)

       `rdARRAY : begin

          if ( (EraseSuspended == `TRUE) && (WriteSuspended == `FALSE)

               && (addr >= BlocksBegin[Algorithm[`OpBlock]])

               && (addr <= BlocksEnd[Algorithm[`OpBlock]]) && (oeb ==

  `VIL) ) begin

            $display("Error:  Attempting to read from erase suspended block");

            InternalOutput <= `MaxOutputs'hxx;

          end

          else if ( (EraseSuspended == `TRUE) && (WriteSuspended == `TRUE)

                    && (oeb == `VIL) && (addr >=

  BlocksBegin[SuspendedAlg[`OpBlock]])

                    && (addr <= BlocksEnd[SuspendedAlg[`OpBlock]]) ) begin

            $display("Error:  Attempting to read from erase suspended block.");

            InternalOutput <= `MaxOutputs'hxx;

          end

          else if ( (WriteSuspended == `TRUE) && (addr == Algorithm[`CmdAdd_1])

                    && (oeb == `VIL) ) begin

            $display("Error:  Attempting to read from write suspended address");

            InternalOutput <= `MaxOutputs'hxx;

          end

          else

            InternalOutput <= #ToOut ArrayOut ;

        end

       `rdCSR   : begin

          InternalOutput <= #ToOut CSROut ;

        end

       `rdID    :  begin

          InternalOutput <= #ToOut IDOut ;

        end

        default  :  begin

          $display("%t Error: illegal readmode", $time);

        end

      endcase

    end  // if

  end  // always

  //

  // other reads

  //

  always @(Internal_OE or addr) begin : other_read

    if (!Reset) begin

      if (ReadMode != `rdARRAY) begin

        CSROut = CSR ;

        if (addr[1:0] == 2'b00)

          IDOut = `ID_ManufacturerB ;

        else if (addr[1:0] == 2'b01)

          IDOut = `ID_DeviceCodeB ;

        else if (addr[1:0] == 2'b10) begin

          for (LoopCntr = `NumberOfBlocks-1; LoopCntr >= 0; LoopCntr = LoopCntr

  -

  1)

            if (addr <= BlocksEnd[LoopCntr])

             WhichBlock = LoopCntr;

          IDOut = BlockLockBit[WhichBlock];

        end

        else

          IDOut = MasterLock;

      end

    end

  end

  // Handle Write to Part

  always @(negedge Internal_WE) begin : handle_write

    reg [`Byte]   temp ;  // temporary variable needed for double

                          // indexing CmdData.

    if (!Reset) begin

      case (WriteToPtr)             // Where are we writting to ?

       `NewCmd : begin              // This is a new command.

         Cmd[`Cmd] = dq[7:0] ;

         Cmd[`Add] = addr[`AddrSize-1:0] ;

         CmdValid <= `TRUE ; // CmdValid sends it to the Predecode section

         DataPtr <= -1 ;

       end

       `CmdField : begin   // This is data used by another command

         if (DataPtr == 1) begin

           Cmd[`CmdData_1] = dq[`Byte];

           Cmd[`CmdAdd_1] = addr [`AddrSize-1:0] ;

         end

         else if (DataPtr == 2) begin

           Cmd[`CmdData_2] = dq[`Byte];

           Cmd[`CmdAdd_2] = addr[`AddrSize-1:0] ;

         end

         else

           $display("DataPtr out of range") ;

         DataPtr <= #1 DataPtr - 1 ;  // When DataPtr hits zero the command

       end

       default    :   begin

         $display("Error: Write To ? Cmd");

       end

      endcase