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JTAG PROGRAMMING UTILITY README FOR OPENRISC 1000

NOTE:

This is a modified version of JTAG utility to work with

Celoxica boards.

INTRODUCTION

JP1 is a proprietary JTAG protocol. It is very simple, and perhaps

its biggest advantage is that no special HW is needed -- only a

parallel port cable and some buffers. It is compatible with Xilinx

Parallel Cable III.

Gdb is capable of connecting, controlling and debugging the board

via JP1. Currently jp1 has support only for Linux.

USAGE

jp1 [cable] [port] 

The cable parameter selects the cable to use for communicateing with the board.

At the time of writting, cable may be one of xpc3, xess, rtl_sim or vpi.  xpc3

assumes a xillinx parallel cable 3, rtl_sim connects to a rtl simulator,

communicateing with it via files (slow), vpi connects to a rtl simulator via the

vpi (faster).  The port parameter specified designates TCP/IP port address where

the server starts.  Run jp1 without arguments for a list of cable specific

options.

First, start the jp1 program in root mode, e.g.:

./jp1 xpc3 9999

 Then start gdb and connect to it,

using e.g.:

$ or32-rtems-gdb test.or32

(gdb) target jtag jtag://localhost:9999

Then load the program into the memory:

(gdb) load

and start it up:

(gdb) set $pc=0x100

You can write stepi or si, to see if things are working

correctly:

(gdb) stepi

If the program counter increases, we can set the breakpoint

and run the program with command 'continue' or 'c'.

AUTHORS

Simons Srot, simons@opencores.org

Marko Mlinar, markom@opencores.org