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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [armnommu/] [drivers/] [scsi/] [fas216.h] - Blame information for rev 1782

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Line No. Rev Author Line
1 1622 jcastillo
/*
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 * FAS216 generic driver
3
 *
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 * Copyright (C) 1997-1998 Russell King
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 *
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 * NOTE! This file should be viewed using a console with
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 * >100 character width (since it uses 8-space tabs)
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 * (it used to fit in 80-columns with 4 space)
9
 */
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#ifndef FAS216_H
11
#define FAS216_H
12
 
13
#ifndef NO_IRQ
14
#define NO_IRQ 255
15
#endif
16
 
17
#include "queue.h"
18
#include "msgqueue.h"
19
 
20
/* FAS register definitions */
21
 
22
/* transfer count low */
23
#define REG_CTCL(x)             ((x)->scsi.io_port)
24
#define REG_STCL(x)             ((x)->scsi.io_port)
25
 
26
/* transfer count medium */
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#define REG_CTCM(x)             ((x)->scsi.io_port + (1 << (x)->scsi.io_shift))
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#define REG_STCM(x)             ((x)->scsi.io_port + (1 << (x)->scsi.io_shift))
29
 
30
/* fifo data */
31
#define REG_FF(x)               ((x)->scsi.io_port + (2 << (x)->scsi.io_shift))
32
 
33
/* command */
34
#define REG_CMD(x)              ((x)->scsi.io_port + (3 << (x)->scsi.io_shift))
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#define CMD_NOP                 0x00
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#define CMD_FLUSHFIFO           0x01
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#define CMD_RESETCHIP           0x02
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#define CMD_RESETSCSI           0x03
39
 
40
#define CMD_TRANSFERINFO        0x10
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#define CMD_INITCMDCOMPLETE     0x11
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#define CMD_MSGACCEPTED         0x12
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#define CMD_PADBYTES            0x18
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#define CMD_SETATN              0x1a
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#define CMD_RSETATN             0x1b
46
 
47
#define CMD_SELECTWOATN         0x41
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#define CMD_SELECTATN           0x42
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#define CMD_SELECTATNSTOP       0x43
50
#define CMD_ENABLESEL           0x44
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#define CMD_DISABLESEL          0x45
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#define CMD_SELECTATN3          0x46
53
#define CMD_RESEL3              0x47
54
 
55
#define CMD_WITHDMA             0x80
56
 
57
/* status register (read) */
58
#define REG_STAT(x)             ((x)->scsi.io_port + (4 << (x)->scsi.io_shift))
59
#define STAT_IO                 (1 << 0)                        /* IO phase             */
60
#define STAT_CD                 (1 << 1)                        /* CD phase             */
61
#define STAT_MSG                (1 << 2)                        /* MSG phase            */
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#define STAT_TRANSFERDONE       (1 << 3)                        /* Transfer completed   */
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#define STAT_TRANSFERCNTZ       (1 << 4)                        /* Transfer counter is zero */
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#define STAT_PARITYERROR        (1 << 5)                        /* Parity error         */
65
#define STAT_REALBAD            (1 << 6)                        /* Something bad        */
66
#define STAT_INT                (1 << 7)                        /* Interrupt            */
67
 
68
#define STAT_BUSMASK            (STAT_MSG|STAT_CD|STAT_IO)
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#define STAT_DATAOUT            (0)                             /* Data out             */
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#define STAT_DATAIN             (STAT_IO)                       /* Data in              */
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#define STAT_COMMAND            (STAT_CD)                       /* Command out          */
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#define STAT_STATUS             (STAT_CD|STAT_IO)               /* Status In            */
73
#define STAT_MESGOUT            (STAT_MSG|STAT_CD)              /* Message out          */
74
#define STAT_MESGIN             (STAT_MSG|STAT_CD|STAT_IO)      /* Message In           */
75
 
76
/* bus ID for select / reselect */
77
#define REG_SDID(x)             ((x)->scsi.io_port + (4 << (x)->scsi.io_shift))
78
#define BUSID(target)           ((target) & 7)
79
 
80
/* Interrupt status register (read) */
81
#define REG_INST(x)             ((x)->scsi.io_port + (5 << (x)->scsi.io_shift))
82
#define INST_SELWOATN           (1 << 0)                        /* Select w/o ATN       */
83
#define INST_SELATN             (1 << 1)                        /* Select w/ATN         */
84
#define INST_RESELECTED         (1 << 2)                        /* Reselected           */
85
#define INST_FUNCDONE           (1 << 3)                        /* Function done        */
86
#define INST_BUSSERVICE         (1 << 4)                        /* Bus service          */
87
#define INST_DISCONNECT         (1 << 5)                        /* Disconnect           */
88
#define INST_ILLEGALCMD         (1 << 6)                        /* Illegal command      */
89
#define INST_BUSRESET           (1 << 7)                        /* SCSI Bus reset       */
90
 
91
/* Timeout register (write) */
92
#define REG_STIM(x)             ((x)->scsi.io_port + (5 << (x)->scsi.io_shift))
93
 
94
/* Sequence step register (read) */
95
#define REG_IS(x)               ((x)->scsi.io_port + (6 << (x)->scsi.io_shift))
96
#define IS_BITS                 0x07
97
#define IS_SELARB               0x00                            /* Select & Arb ok      */
98
#define IS_MSGBYTESENT          0x01                            /* One byte message sent*/
99
#define IS_NOTCOMMAND           0x02                            /* Not in command state */
100
#define IS_EARLYPHASE           0x03                            /* Early phase change   */
101
#define IS_COMPLETE             0x04                            /* Command ok           */
102
#define IS_SOF                  0x08                            /* Sync off flag        */
103
 
104
/* Transfer period step (write) */
105
#define REG_STP(x)              ((x)->scsi.io_port + (6 << (x)->scsi.io_shift))
106
 
107
/* Synchronous Offset (write) */
108
#define REG_SOF(x)              ((x)->scsi.io_port + (7 << (x)->scsi.io_shift))
109
 
110
/* Fifo state register (read) */
111
#define REG_CFIS(x)             ((x)->scsi.io_port + (7 << (x)->scsi.io_shift))
112
#define CFIS_CF                 0x1f                            /* Num bytes in FIFO    */
113
#define CFIS_IS                 0xe0                            /* Step                 */
114
 
115
/* config register 1 */
116
#define REG_CNTL1(x)            ((x)->scsi.io_port + (8 << (x)->scsi.io_shift))
117
#define CNTL1_CID               (7 << 0)                        /* Chip ID                      */
118
#define CNTL1_STE               (1 << 3)                        /* Self test enable             */
119
#define CNTL1_PERE              (1 << 4)                        /* Parity enable reporting en.  */
120
#define CNTL1_PTE               (1 << 5)                        /* Parity test enable           */
121
#define CNTL1_DISR              (1 << 6)                        /* Disable Irq on SCSI reset    */
122
#define CNTL1_ETM               (1 << 7)                        /* Extended Timing Mode         */
123
 
124
/* Clock conversion factor (read) */
125
#define REG_CLKF(x)             ((x)->scsi.io_port + (9 << (x)->scsi.io_shift))
126
#define CLKF_F37MHZ             0x00                            /* 35.01 - 40 MHz               */
127
#define CLKF_F10MHZ             0x02                            /* 10 MHz                       */
128
#define CLKF_F12MHZ             0x03                            /* 10.01 - 15 MHz               */
129
#define CLKF_F17MHZ             0x04                            /* 15.01 - 20 MHz               */
130
#define CLKF_F22MHZ             0x05                            /* 20.01 - 25 MHz               */
131
#define CLKF_F27MHZ             0x06                            /* 25.01 - 30 MHz               */
132
#define CLKF_F32MHZ             0x07                            /* 30.01 - 35 MHz               */
133
 
134
/* Chip test register (write) */
135
#define REG0_FTM(x)             ((x)->scsi.io_port + (10 << (x)->scsi.io_shift))
136
#define TEST_FTM                0x01                            /* Force target mode            */
137
#define TEST_FIM                0x02                            /* Force initiator mode         */
138
#define TEST_FHI                0x04                            /* Force high impedance mode    */
139
 
140
/* Configuration register 2 (read/write) */
141
#define REG_CNTL2(x)            ((x)->scsi.io_port + (11 << (x)->scsi.io_shift))
142
#define CNTL2_PGDP              (1 << 0)                        /* Pass Th/Generate Data Parity */
143
#define CNTL2_PGRP              (1 << 1)                        /* Pass Th/Generate Reg Parity  */
144
#define CNTL2_ACDPE             (1 << 2)                        /* Abort on Cmd/Data Parity Err */
145
#define CNTL2_S2FE              (1 << 3)                        /* SCSI2 Features Enable        */
146
#define CNTL2_TSDR              (1 << 4)                        /* Tristate DREQ                */
147
#define CNTL2_SBO               (1 << 5)                        /* Select Byte Order            */
148
#define CNTL2_ENF               (1 << 6)                        /* Enable features              */
149
#define CNTL2_DAE               (1 << 7)                        /* Data Alignment Enable        */
150
 
151
/* Configuration register 3 (read/write) */
152
#define REG_CNTL3(x)            ((x)->scsi.io_port + (12 << (x)->scsi.io_shift))
153
#define CNTL3_BS8               (1 << 0)                        /* Burst size 8                 */
154
#define CNTL3_MDM               (1 << 1)                        /* Modify DMA mode              */
155
#define CNTL3_LBTM              (1 << 2)                        /* Last Byte Transfer mode      */
156
#define CNTL3_FASTCLK           (1 << 3)                        /* Fast SCSI clocking           */
157
#define CNTL3_FASTSCSI          (1 << 4)                        /* Fast SCSI                    */
158
#define CNTL3_G2CB              (1 << 5)                        /* Group2 SCSI support          */
159
#define CNTL3_QTAG              (1 << 6)                        /* Enable 3 byte msgs           */
160
#define CNTL3_ADIDCHK           (1 << 7)                        /* Additional ID check          */
161
 
162
/* High transfer count (read/write) */
163
#define REG_CTCH(x)             ((x)->scsi.io_port + (14 << (x)->scsi.io_shift))
164
#define REG_STCH(x)             ((x)->scsi.io_port + (14 << (x)->scsi.io_shift))
165
 
166
/* ID reigster (read only) */
167
#define REG1_ID(x)              ((x)->scsi.io_port + (14 << (x)->scsi.io_shift))
168
 
169
/* Data alignment */
170
#define REG0_DAL(x)             ((x)->scsi.io_port + (15 << (x)->scsi.io_shift))
171
 
172
typedef enum {
173
        PHASE_IDLE,                                     /* we're not planning on doing anything */
174
        PHASE_SELECTION,                                /* selecting a device                   */
175
        PHASE_SELSTEPS,                                 /* selection with command steps         */
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        PHASE_COMMAND,                                  /* command sent                         */
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        PHASE_MESSAGESENT,                              /* selected, and we're sending cmd      */
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        PHASE_RECONNECTED,                              /* reconnected                          */
179
        PHASE_DATAOUT,                                  /* data out to device                   */
180
        PHASE_DATAIN,                                   /* data in from device                  */
181
        PHASE_MSGIN,                                    /* message in from device               */
182
        PHASE_MSGIN_DISCONNECT,                         /* disconnecting from bus               */
183
        PHASE_MSGOUT,                                   /* after message out phase              */
184
        PHASE_MSGOUT_EXPECT,                            /* expecting message out                */
185
        PHASE_STATUS,                                   /* status from device                   */
186
        PHASE_DONE                                      /* Command complete                     */
187
} phase_t;
188
 
189
typedef enum {
190
        DMA_OUT,                                        /* DMA from memory to chip              */
191
        DMA_IN                                          /* DMA from chip to memory              */
192
} fasdmadir_t;
193
 
194
typedef enum {
195
        fasdma_none,                                    /* No dma                               */
196
        fasdma_pio,                                     /* PIO mode                             */
197
        fasdma_pseudo,                                  /* Pseudo DMA                           */
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        fasdma_real_block,                              /* Real DMA, on block by block basis    */
199
        fasdma_real_all                                 /* Real DMA, on request by request      */
200
} fasdmatype_t;
201
 
202
typedef enum {
203
        neg_wait,                                       /* Negociate with device                */
204
        neg_inprogress,                                 /* Negociation sent                     */
205
        neg_complete,                                   /* Negociation complete                 */
206
        neg_targcomplete,                               /* Target completed negociation         */
207
        neg_invalid                                     /* Negociation not supported            */
208
} neg_t;
209
 
210
#define MAGIC   0x441296bdUL
211
#define NR_MSGS 8
212
 
213
typedef struct {
214
        unsigned long           magic_start;
215
        struct Scsi_Host        *host;                  /* host                                 */
216
        Scsi_Cmnd               *SCpnt;                 /* currently processing command         */
217
        Scsi_Cmnd               *origSCpnt;             /* original connecting command          */
218
 
219
        /* driver information */
220
        struct {
221
                unsigned int    io_port;                /* base address of FAS216               */
222
                unsigned int    io_shift;               /* shift to adjust reg offsets by       */
223
                unsigned int    irq;                    /* interrupt                            */
224
                unsigned char   cfg[4];                 /* configuration registers              */
225
                const char      *type;                  /* chip type                            */
226
                phase_t         phase;                  /* current phase                        */
227
 
228
                struct {
229
                        unsigned char   target;         /* reconnected target                   */
230
                        unsigned char   lun;            /* reconnected lun                      */
231
                        unsigned char   tag;            /* reconnected tag                      */
232
                } reconnected;
233
 
234
                Scsi_Pointer    SCp;                    /* current commands data pointer        */
235
 
236
                MsgQueue_t      msgs;                   /* message queue for connected device   */
237
 
238
                unsigned int    async_stp;              /* Async transfer STP value             */
239
                unsigned char   msgin_fifo;             /* bytes in fifo at time of message in  */
240
 
241
                unsigned char   disconnectable:1;       /* this command can be disconnected     */
242
                unsigned char   aborting:1;             /* aborting command                     */
243
        } scsi;
244
 
245
        /* statistics information */
246
        struct {
247
                unsigned int    queues;
248
                unsigned int    removes;
249
                unsigned int    fins;
250
                unsigned int    reads;
251
                unsigned int    writes;
252
                unsigned int    miscs;
253
                unsigned int    disconnects;
254
                unsigned int    aborts;
255
                unsigned int    resets;
256
        } stats;
257
 
258
        /* configuration information */
259
        struct {
260
                unsigned char   clockrate;              /* clock rate of FAS device (MHz)       */
261
                unsigned char   select_timeout;         /* timeout (R5)                         */
262
                unsigned char   sync_max_depth;         /* Synchronous xfer max fifo depth      */
263
                unsigned char   wide_max_size;          /* Maximum wide transfer size           */
264
                unsigned char   cntl3;                  /* Control Reg 3                        */
265
                unsigned int    asyncperiod;            /* Async transfer period (ns)           */
266
                unsigned int    disconnect_ok;          /* Disconnect OK                        */
267
        } ifcfg;
268
 
269
        /* queue handling */
270
        struct {
271
                Queue_t         issue;                  /* issue queue                          */
272
                Queue_t         disconnected;           /* disconnected command queue           */
273
        } queues;
274
 
275
        /* per-device info */
276
        struct fas216_device {
277
                unsigned char   disconnect_ok:1;        /* device can disconnect                */
278
                unsigned char   period;                 /* sync xfer period in (*4ns)           */
279
                unsigned char   stp;                    /* synchronous transfer period          */
280
                unsigned char   sof;                    /* synchronous offset register          */
281
                unsigned char   wide_xfer;              /* currently negociated wide transfer   */
282
                neg_t           sync_state;             /* synchronous transfer mode            */
283
                neg_t           wide_state;             /* wide transfer mode                   */
284
        } device[8];
285
        unsigned char   busyluns[8];                    /* array of bits indicating LUNs busy   */
286
 
287
        /* dma */
288
        struct {
289
                fasdmatype_t    transfer_type;          /* current type of DMA transfer         */
290
                fasdmatype_t    (*setup) (struct Scsi_Host *host, Scsi_Pointer *SCp, fasdmadir_t direction, fasdmatype_t min_dma);
291
                void            (*pseudo)(struct Scsi_Host *host, Scsi_Pointer *SCp, fasdmadir_t direction, int transfer);
292
                void            (*stop)  (struct Scsi_Host *host, Scsi_Pointer *SCp);
293
        } dma;
294
 
295
        /* miscellaneous */
296
        int                     internal_done;          /* flag to indicate request done */
297
 
298
        unsigned long           magic_end;
299
} FAS216_Info;
300
 
301
/* Function: int fas216_init (struct Scsi_Host *instance)
302
 * Purpose : initialise FAS/NCR/AMD SCSI ic.
303
 * Params  : instance - a driver-specific filled-out structure
304
 * Returns : 0 on success
305
 */
306
extern int fas216_init (struct Scsi_Host *instance);
307
 
308
/* Function: int fas216_abort (Scsi_Cmnd *SCpnt)
309
 * Purpose : abort a command if something horrible happens.
310
 * Params  : SCpnt - Command that is believed to be causing a problem.
311
 * Returns : one of SCSI_ABORT_ macros.
312
 */
313
extern int fas216_abort (Scsi_Cmnd *);
314
 
315
/* Function: int fas216_reset (Scsi_Cmnd *SCpnt, unsigned int reset_flags)
316
 * Purpose : resets the adapter if something horrible happens.
317
 * Params  : SCpnt - Command that is believed to be causing a problem.
318
 *           reset_flags - flags indicating reset type that is believed to be required.
319
 * Returns : one of SCSI_RESET_ macros, or'd with the SCSI_RESET_*_RESET macros.
320
 */
321
extern int fas216_reset (Scsi_Cmnd *, unsigned int);
322
 
323
/* Function: int fas216_queue_command (Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
324
 * Purpose : queue a command for adapter to process.
325
 * Params  : SCpnt - Command to queue
326
 *           done  - done function to call once command is complete
327
 * Returns : 0 - success, else error
328
 */
329
extern int fas216_queue_command (Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
330
 
331
/* Function: int fas216_command (Scsi_Cmnd *SCpnt)
332
 * Purpose : queue a command for adapter to process.
333
 * Params  : SCpnt - Command to queue
334
 * Returns : scsi result code
335
 */
336
extern int fas216_command (Scsi_Cmnd *);
337
 
338
/* Function: void fas216_intr (struct Scsi_Host *instance)
339
 * Purpose : handle interrupts from the interface to progress a command
340
 * Params  : instance - interface to service
341
 */
342
extern void fas216_intr (struct Scsi_Host *instance);
343
 
344
/* Function: int fas216_release (struct Scsi_Host *instance)
345
 * Purpose : release all resources and put everything to bed for FAS/NCR/AMD SCSI ic.
346
 * Params  : instance - a driver-specific filled-out structure
347
 * Returns : 0 on success
348
 */
349
extern int fas216_release (struct Scsi_Host *instance);
350
 
351
extern int fas216_print_stats(FAS216_Info *info, char *buffer);
352
extern int fas216_print_device(FAS216_Info *info, Scsi_Device *scd, char *buffer);
353
 
354
#endif /* FAS216_H */

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