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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [armnommu/] [lib/] [backtrace.S] - Blame information for rev 1782

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Line No. Rev Author Line
1 1622 jcastillo
/*
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 * linux/arch/arm/lib/backtrace.S
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 *
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 * Copyright (C) 1995, 1996 Russell King
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 */
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#include 
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                .text
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@ fp is 0 or stack frame
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#define frame   r4
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#define next    r5
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#define save    r6
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#define mask    r7
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#define offset  r8
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                .global ___backtrace,__backtrace
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__backtrace:
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___backtrace:
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#ifdef __arm6__
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                mrs     r1, cpsr
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#else
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                mov     r1, pc
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                and     r1, r1, #0xfc000003
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#endif
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                mov     r0, fp
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                .global _c_backtrace,c_backtrace
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c_backtrace:
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_c_backtrace:   stmfd   sp!, {r4 - r8, lr}      @ Save an extra register so we have a location...
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                tst     r1, #0x10               @ 26 or 32-bit?
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                moveq   mask, #0xfc000003
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                movne   mask, #0
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                tst     mask, r0
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                movne   r0, #0
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                movs    frame, r0
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Lbadbacktrace:  moveq   r0, #-2
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                LOADREGS(eqfd, sp!, {r4 - r8, pc})
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Lst:            stmfd   sp!, {pc}                       @ calculate offset of PC in STMIA instruction
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                ldr     r0, [sp], #4
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                adr     r1, Lst - 4
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                sub     offset, r0, r1
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Lloop:          tst     frame, mask                     @ Check for address exceptions...
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                bne     Lbadbacktrace
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                ldmda   frame, {r0, r1, r2, r3}         @ fp, sp, lr, pc
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                mov     next, r0
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                sub     save, r3, offset                @ Correct PC for prefetching
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                bic     save, save, mask
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                adr     r0, Lfe
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                mov     r1, save
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                bic     r2, r2, mask
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                bl      printk
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                sub     r0, frame, #16
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                ldr     r1, [save, #4]
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                mov     r3, r1, lsr #10
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                ldr     r2, Ldsi+4
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                teq     r3, r2                  @ Check for stmia sp!, {args}
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                addeq   save, save, #4          @ next instruction
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                bleq    Ldumpstm
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                ldr     r1, [save, #4]          @ Get 'stmia sp!, {rlist, fp, ip, lr, pc}' instruction
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                mov     r3, r1, lsr #10
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                ldr     r2, Ldsi
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                teq     r3, r2
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                bleq    Ldumpstm
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                teq     frame, next
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                movne   frame, next
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                teqne   frame, #0
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                bne     Lloop
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                LOADREGS(fd, sp!, {r4 - r8, pc})
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#define instr r4
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#define reg   r5
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#define stack r6
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Ldumpstm:       stmfd   sp!, {instr, reg, stack, lr}
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                mov     stack, r0
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                mov     instr, r1
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                mov     reg, #9
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1:              mov     r3, #1
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                tst     instr, r3, lsl reg
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                beq     2f
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                ldr     r2, [stack], #-4
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                mov     r1, reg
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                adr     r0, Lfp
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                bl      printk
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2:              subs    reg, reg, #1
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                bpl     1b
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                mov     r0, stack
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                LOADREGS(fd, sp!, {instr, reg, stack, pc})
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Lfe:            .ascii  "Function entered at [<%p>] from [<%p>]\n"
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                .byte 0
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Lfp:            .ascii  "  r%d = %p\n"
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                .byte 0
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                .align
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Ldsi:           .word   0x00e92dd8 >> 2
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                .word   0x00e92d00 >> 2

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