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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [ram.ld] - Blame information for rev 1782

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MEMORY
        {
        romvec : ORIGIN = 0xf0010000, LENGTH = 0x00002000
        flash  : ORIGIN = 0xf0012000, LENGTH = 0x00200000 - 0x00012000
        eflash : ORIGIN = 0xf0200000, LENGTH = 0
        ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram    : ORIGIN = 0x00020400, LENGTH = 0x00300000 - 0x00020400
        eram   : ORIGIN = 0x00400000, LENGTH = 0
        initrd : ORIGIN = 0x00300000, LENGTH = 0x00100000
        }
 
SECTIONS
{
        .ramvec :
        {
        __ramvec = . ;
        __ramvec_start = . ;
        *(.ramvec)
        __ramvec_end = . ;
        } > ramvec
 
        .romvec :
        {
        __romvec = . ;
        } > romvec
 
        .text :
        {
        __ramstart = . ;
        text_start = . ;
        *(.text)
        ___data_rom_start = ALIGN ( 4 ) ;
        } > ram
 
        .rodata :
        {
        *(.rodata)
        *(.rodata.str1.1)
        __etext = . ;
        } > ram
 
        .data :
        {
        __sdata = . ;
        ___data_start = . ;
        *(.data)
        __edata = . ;
        __end_data = . ;
        edata = ALIGN( 0x10 ) ;
        } > ram
 
        .bss :
        {
        __sbss = ALIGN( 0x10 ) ;
        ___bss_start = ALIGN( 0x10 ) ;
        __data_end = ALIGN( 0x10 ) ;
        *(.bss)
        *(COMMON)
        __ebss = . ;
        ___bss_end = . ;
        end = ALIGN( 0x10 ) ;
        __end = ALIGN( 0x10 ) ;
        } > ram
 
        .eram :
        {
        __ramend = . ;
        } > eram
 
        .initrd :
        {
        __initrd_start = . ;
        *(.initrd)
        __initrd_end = . ;
        } > initrd
}

Line No.	Rev	Author	Line
1	1624	jcastillo	`MEMORY`
2			`{`
3			`romvec : ORIGIN = 0xf0010000, LENGTH = 0x00002000`
4			`flash : ORIGIN = 0xf0012000, LENGTH = 0x00200000 - 0x00012000`
5			`eflash : ORIGIN = 0xf0200000, LENGTH = 0`
6			`ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000`
7			`ram : ORIGIN = 0x00020400, LENGTH = 0x00300000 - 0x00020400`
8			`eram : ORIGIN = 0x00400000, LENGTH = 0`
9			`initrd : ORIGIN = 0x00300000, LENGTH = 0x00100000`
10			`}`
11
12			`SECTIONS`
13			`{`
14			`.ramvec :`
15			`{`
16			`__ramvec = . ;`
17			`__ramvec_start = . ;`
18			`*(.ramvec)`
19			`__ramvec_end = . ;`
20			`} > ramvec`
21
22			`.romvec :`
23			`{`
24			`__romvec = . ;`
25			`} > romvec`
26
27			`.text :`
28			`{`
29			`__ramstart = . ;`
30			`text_start = . ;`
31			`*(.text)`
32			`___data_rom_start = ALIGN ( 4 ) ;`
33			`} > ram`
34
35			`.rodata :`
36			`{`
37			`*(.rodata)`
38			`*(.rodata.str1.1)`
39			`__etext = . ;`
40			`} > ram`
41
42			`.data :`
43			`{`
44			`__sdata = . ;`
45			`___data_start = . ;`
46			`*(.data)`
47			`__edata = . ;`
48			`__end_data = . ;`
49			`edata = ALIGN( 0x10 ) ;`
50			`} > ram`
51
52			`.bss :`
53			`{`
54			`__sbss = ALIGN( 0x10 ) ;`
55			`___bss_start = ALIGN( 0x10 ) ;`
56			`__data_end = ALIGN( 0x10 ) ;`
57			`*(.bss)`
58			`*(COMMON)`
59			`__ebss = . ;`
60			`___bss_end = . ;`
61			`end = ALIGN( 0x10 ) ;`
62			`__end = ALIGN( 0x10 ) ;`
63			`} > ram`
64
65			`.eram :`
66			`{`
67			`__ramend = . ;`
68			`} > eram`
69
70			`.initrd :`
71			`{`
72			`__initrd_start = . ;`
73			`*(.initrd)`
74			`__initrd_end = . ;`
75			`} > initrd`
76			`}`

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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [ram.ld] - Blame information for rev 1782