URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [rom.ld] - Blame information for rev 1624

Go to most recent revision | Details | Compare with Previous | View Log


MEMORY
        {
        romvec : ORIGIN = 0xf0000000, LENGTH = 0x2000
        flash  : ORIGIN = 0xf0002000, LENGTH = 0x00800000 - 0x2000
        eflash : ORIGIN = 0xf0800000, LENGTH = 0
        ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram    : ORIGIN = 0x00002000, LENGTH = 0x00800000 - 0x2000
        eram   : ORIGIN = 0x00800000, LENGTH = 0
        }
 
SECTIONS
{
        .romvec :
        {
        __romvec = . ;
        *(.romvec)
        } > romvec
 
        .text :
        {
        ___rom_start = . ;
        text_start = . ;
        *(.text)
        } > flash
 
        .rodata :
        {
        *(.rodata)
        __etext = . ;
        } > flash
 
        .initrd :
        {
        __initrd_start = . ;
        *(.initrd)
        __initrd_end = . ;
        ___data_rom_start = . ;
        } > flash
 
        .eflash :
        {
        __flashend = . ;
        } > eflash
 
        .data :
        AT ( ADDR (.initrd) + SIZEOF (.initrd))
        {
        __ramstart = . ;
        __sdata = . ;
        ___data_start = . ;
        *(.data)
        __edata = . ;
        __end_data = . ;
        __data_end = . ;
        edata = ALIGN( 0x10 ) ;
        } > ram
 
        .bss :
        {
        __sbss = ALIGN( 0x10 ) ;
        ___bss_start = ALIGN( 0x10 ) ;
        *(.bss)
        *(COMMON)
        __ebss = . ;
        ___bss_end = . ;
        end = ALIGN( 0x10 ) ;
        __end = ALIGN( 0x10 ) ;
        } > ram
 
        .ramvec :
        AT ( ADDR (.initrd) + SIZEOF (.initrd) + SIZEOF (.data))
        {
        __ramvec_start = . ;
        *(.ramvec)
        __ramvec_end = . ;
        } > ramvec
 
        .eram :
        {
        __ramend = . ;
        } > eram
}

Line No.	Rev	Author	Line
1	1624	jcastillo	`MEMORY`
2			`{`
3			`romvec : ORIGIN = 0xf0000000, LENGTH = 0x2000`
4			`flash : ORIGIN = 0xf0002000, LENGTH = 0x00800000 - 0x2000`
5			`eflash : ORIGIN = 0xf0800000, LENGTH = 0`
6			`ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000`
7			`ram : ORIGIN = 0x00002000, LENGTH = 0x00800000 - 0x2000`
8			`eram : ORIGIN = 0x00800000, LENGTH = 0`
9			`}`
10
11			`SECTIONS`
12			`{`
13			`.romvec :`
14			`{`
15			`__romvec = . ;`
16			`*(.romvec)`
17			`} > romvec`
18
19			`.text :`
20			`{`
21			`___rom_start = . ;`
22			`text_start = . ;`
23			`*(.text)`
24			`} > flash`
25
26			`.rodata :`
27			`{`
28			`*(.rodata)`
29			`__etext = . ;`
30			`} > flash`
31
32			`.initrd :`
33			`{`
34			`__initrd_start = . ;`
35			`*(.initrd)`
36			`__initrd_end = . ;`
37			`___data_rom_start = . ;`
38			`} > flash`
39
40			`.eflash :`
41			`{`
42			`__flashend = . ;`
43			`} > eflash`
44
45			`.data :`
46			`AT ( ADDR (.initrd) + SIZEOF (.initrd))`
47			`{`
48			`__ramstart = . ;`
49			`__sdata = . ;`
50			`___data_start = . ;`
51			`*(.data)`
52			`__edata = . ;`
53			`__end_data = . ;`
54			`__data_end = . ;`
55			`edata = ALIGN( 0x10 ) ;`
56			`} > ram`
57
58			`.bss :`
59			`{`
60			`__sbss = ALIGN( 0x10 ) ;`
61			`___bss_start = ALIGN( 0x10 ) ;`
62			`*(.bss)`
63			`*(COMMON)`
64			`__ebss = . ;`
65			`___bss_end = . ;`
66			`end = ALIGN( 0x10 ) ;`
67			`__end = ALIGN( 0x10 ) ;`
68			`} > ram`
69
70			`.ramvec :`
71			`AT ( ADDR (.initrd) + SIZEOF (.initrd) + SIZEOF (.data))`
72			`{`
73			`__ramvec_start = . ;`
74			`*(.ramvec)`
75			`__ramvec_end = . ;`
76			`} > ramvec`
77
78			`.eram :`
79			`{`
80			`__ramend = . ;`
81			`} > eram`
82			`}`

Browse

Tools

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [rom.ld] - Blame information for rev 1624