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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [proc-trio/] [system.h] - Blame information for rev 1765

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Line No. Rev Author Line
1 1633 jcastillo
/*
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 * linux/include/asm-arm/proc-armv/system.h
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 *
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 * Copyright (C) 1996 Russell King
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 */
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#ifndef __ASM_PROC_SYSTEM_H
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#define __ASM_PROC_SYSTEM_H
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extern const char xchg_str[];
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extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
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{
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        switch (size) {
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                case 1: __asm__ __volatile__ ("swpb %0, %1, [%2]" : "=r" (x) : "r" (x), "r" (ptr) : "memory");
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                        break;
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                case 2: abort ();
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                case 4: __asm__ __volatile__ ("swp %0, %1, [%2]" : "=r" (x) : "r" (x), "r" (ptr) : "memory");
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                        break;
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                default: arm_invalidptr(xchg_str, size);
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        }
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        return x;
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}
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/*
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 * This processor does not need anything special before reset,
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 * but RPC may do...
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 */
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extern __inline__ void proc_hard_reset(void)
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{
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}
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/*
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 * We can wait for an interrupt...
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 */
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#if 0
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#define proc_idle()                     \
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        do {                            \
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        __asm__ __volatile__(           \
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"       mcr     p15, 0, %0, c15, c8, 2" \
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          : : "r" (0));                  \
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        } while (0)
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#else
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#define proc_idle()
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#endif
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/*
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 * A couple of speedups for the ARM
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 */
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/*
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 * Save the current interrupt enable state & disable IRQs
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 */
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#define save_flags_cli(x)               \
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        do {                            \
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          unsigned long temp;           \
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          __asm__ __volatile__(         \
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        "mrs    %1, cpsr\n"             \
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"       and     %0, %1, #192\n"         \
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"       orr     %1, %1, #128\n"         \
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"       msr     cpsr, %1"               \
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          : "=r" (x), "=r" (temp)       \
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          :                             \
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          : "memory");                  \
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        } while (0)
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/*
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 * Enable IRQs
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 */
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#define sti()                           \
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        do {                            \
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          unsigned long temp;           \
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          __asm__ __volatile__(         \
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        "mrs    %0, cpsr\n"             \
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"       bic     %0, %0, #128\n"         \
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"       msr     cpsr, %0"               \
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          : "=r" (temp)                 \
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          :                             \
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          : "memory");                  \
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        } while(0)
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/*
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 * Disable IRQs
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 */
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#define cli()                           \
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        do {                            \
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          unsigned long temp;           \
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          __asm__ __volatile__(         \
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        "mrs    %0, cpsr\n"             \
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"       orr     %0, %0, #128\n"         \
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"       msr     cpsr, %0"               \
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          : "=r" (temp)                 \
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          :                             \
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          : "memory");                  \
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        } while(0)
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/*
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 * save current IRQ & FIQ state
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 */
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#define save_flags(x)                   \
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        do {                            \
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          __asm__ __volatile__(         \
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        "mrs    %0, cpsr\n"             \
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"       and     %0, %0, #192"           \
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          : "=r" (x));                  \
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        } while (0)
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/*
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 * restore saved IRQ & FIQ state
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 */
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#define restore_flags(x)                \
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        do {                            \
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          unsigned long temp;           \
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          __asm__ __volatile__(         \
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        "mrs    %0, cpsr\n"             \
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"       bic     %0, %0, #192\n"         \
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"       orr     %0, %0, %1\n"           \
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"       msr     cpsr, %0"               \
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          : "=r" (temp)                 \
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          : "r" (x)                     \
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          : "memory");                  \
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        } while (0)
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#endif

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