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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-mips/] [io.h] - Blame information for rev 1782

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1 1633 jcastillo
#ifndef __ASM_MIPS_IO_H
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#define __ASM_MIPS_IO_H
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#include <asm/mipsconfig.h>
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#include <asm/segment.h>
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/*
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 * This file contains the definitions for the MIPS counterpart of the
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 * x86 in/out instructions. This heap of macros and C results in much
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 * better code than the approach of doing it in plain C, though that's
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 * probably not needed.
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 *
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 *   Ralf
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 *
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 * This file contains the definitions for the x86 IO instructions
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 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
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 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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 * versions of the single-IO instructions (inb_p/inw_p/..).
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 *
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 * This file is not meant to be obfuscating: it's just complicated
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 * to (a) handle it all in a way that makes gcc able to optimize it
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 * as well as possible and (b) trying to avoid writing the same thing
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 * over and over again with slight variations and possibly making a
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 * mistake somewhere.
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 */
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/*
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 * Thanks to James van Artsdalen for a better timing-fix than
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 * the two short jumps: using outb's to a nonexistent port seems
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 * to guarantee better timings even on fast machines.
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 *
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 * On the other hand, I'd like to be sure of a non-existent port:
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 * I feel a bit unsafe about using 0x80 (should be safe, though)
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 *
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 *              Linus
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 */
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#define __SLOW_DOWN_IO \
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        __asm__ __volatile__( \
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                "sb\t$0,0x80(%0)" \
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                : : "r" (PORT_BASE));
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#ifdef REALLY_SLOW_IO
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#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }
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#else
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#define SLOW_DOWN_IO __SLOW_DOWN_IO
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#endif
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/*
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 * Change virtual addresses to physical addresses and vv.
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 * These are trivial on the 1:1 Linux/MIPS mapping
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 */
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extern inline unsigned long virt_to_phys(volatile void * address)
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{
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        return (unsigned long) address - KSEG0;
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}
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extern inline void * phys_to_virt(unsigned long address)
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{
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        return (void *) address + KSEG0;
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}
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/*
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 * IO bus memory addresses are also 1:1 with the physical address
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 * FIXME: This assumption is wrong for the Deskstation Tyne
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 */
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/*
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 * readX/writeX() are used to access memory mapped devices. On some
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 * architectures the memory mapped IO stuff needs to be accessed
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 * differently. On the x86 architecture, we just read/write the
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 * memory location directly.
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 */
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#define readb(addr) (*(volatile unsigned char *) (addr))
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#define readw(addr) (*(volatile unsigned short *) (addr))
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#define readl(addr) (*(volatile unsigned int *) (addr))
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#define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b))
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#define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b))
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#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
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#define memset_io(a,b,c)        memset((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c)    memcpy((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c)      memcpy((void *)(a),(b),(c))
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/*
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 * Again, MIPS does not require mem IO specific function.
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 */
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#define eth_io_copy_and_sum(a,b,c,d)    eth_copy_and_sum((a),(void *)(b),(c),(d))
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/*
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 * Talk about misusing macros..
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 */
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#define __OUT1(s) \
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extern inline void __out##s(unsigned int value, unsigned int port) {
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#define __OUT2(m) \
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__asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
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#define __OUT(m,s) \
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__OUT1(s) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); } \
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__OUT1(s##c) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); } \
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__OUT1(s##_p) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); \
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        SLOW_DOWN_IO; } \
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__OUT1(s##c_p) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); \
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        SLOW_DOWN_IO; }
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112
#define __IN1(t,s) \
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extern __inline__ t __in##s(unsigned int port) { t _v;
114
 
115
/*
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 * Useless nops will be removed by the assembler
117
 */
118
#define __IN2(m) \
119
__asm__ __volatile__ ("l" #m "u\t%0,%1(%2)\n\tnop"
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121
#define __IN(t,m,s) \
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__IN1(t,s) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); return _v; } \
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__IN1(t,s##c) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); return _v; } \
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__IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); SLOW_DOWN_IO; return _v; } \
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__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); SLOW_DOWN_IO; return _v; }
126
 
127
#define __INS1(s) \
128
extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
129
 
130
#define __INS2(m) \
131
__asm__ __volatile__ ( \
132
        ".set\tnoreorder\n\t" \
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        ".set\tnoat\n" \
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        "1:\tl" #m "u\t$1,%4(%5)\n\t" \
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        "subu\t%1,1\n\t" \
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        "s" #m "\t$1,(%0)\n\t" \
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        "bne\t$0,%1,1b\n\t" \
138
        "addiu\t%0,%6\n\t" \
139
        ".set\tat\n\t" \
140
        ".set\treorder"
141
 
142
#define __INS(m,s,i) \
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__INS1(s) __INS2(m) \
144
        : "=r" (addr), "=r" (count) \
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        : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
146
        : "$1");} \
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__INS1(s##c) __INS2(m) \
148
        : "=r" (addr), "=r" (count) \
149
        : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
150
        : "$1");}
151
 
152
#define __OUTS1(s) \
153
extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
154
 
155
#define __OUTS2(m) \
156
__asm__ __volatile__ ( \
157
        ".set\tnoreorder\n\t" \
158
        ".set\tnoat\n" \
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        "1:\tl" #m "u\t$1,(%0)\n\t" \
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        "subu\t%1,%1,1\n\t" \
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        "s" #m "\t$1,%4(%5)\n\t" \
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        "bne\t$0,%1,1b\n\t" \
163
        "addiu\t%0,%0,%6\n\t" \
164
        ".set\tat\n\t" \
165
        ".set\treorder"
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167
#define __OUTS(m,s,i) \
168
__OUTS1(s) __OUTS2(m) \
169
        : "=r" (addr), "=r" (count) \
170
        : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
171
        : "$1");} \
172
__OUTS1(s##c) __OUTS2(m) \
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        : "=r" (addr), "=r" (count) \
174
        : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
175
        : "$1");}
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177
__IN(unsigned char,b,b)
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__IN(unsigned short,h,w)
179
__IN(unsigned int,w,l)
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181
__OUT(b,b)
182
__OUT(h,w)
183
__OUT(w,l)
184
 
185
__INS(b,b,1)
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__INS(h,w,2)
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__INS(w,l,4)
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189
__OUTS(b,b,1)
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__OUTS(h,w,2)
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__OUTS(w,l,4)
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193
/*
194
 * Note that due to the way __builtin_constant_p() works, you
195
 *  - can't use it inside a inline function (it will never be true)
196
 *  - you don't have to worry about side effects within the __builtin..
197
 */
198
#define outb(val,port) \
199
((__builtin_constant_p((port)) && (port) < 32768) ? \
200
        __outbc((val),(port)) : \
201
        __outb((val),(port)))
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203
#define inb(port) \
204
((__builtin_constant_p((port)) && (port) < 32768) ? \
205
        __inbc(port) : \
206
        __inb(port))
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208
#define outb_p(val,port) \
209
((__builtin_constant_p((port)) && (port) < 32768) ? \
210
        __outbc_p((val),(port)) : \
211
        __outb_p((val),(port)))
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213
#define inb_p(port) \
214
((__builtin_constant_p((port)) && (port) < 32768) ? \
215
        __inbc_p(port) : \
216
        __inb_p(port))
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218
#define outw(val,port) \
219
((__builtin_constant_p((port)) && (port) < 32768) ? \
220
        __outwc((val),(port)) : \
221
        __outw((val),(port)))
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223
#define inw(port) \
224
((__builtin_constant_p((port)) && (port) < 32768) ? \
225
        __inwc(port) : \
226
        __inw(port))
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228
#define outw_p(val,port) \
229
((__builtin_constant_p((port)) && (port) < 32768) ? \
230
        __outwc_p((val),(port)) : \
231
        __outw_p((val),(port)))
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233
#define inw_p(port) \
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((__builtin_constant_p((port)) && (port) < 32768) ? \
235
        __inwc_p(port) : \
236
        __inw_p(port))
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#define outl(val,port) \
239
((__builtin_constant_p((port)) && (port) < 32768) ? \
240
        __outlc((val),(port)) : \
241
        __outl((val),(port)))
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243
#define inl(port) \
244
((__builtin_constant_p((port)) && (port) < 32768) ? \
245
        __inlc(port) : \
246
        __inl(port))
247
 
248
#define outl_p(val,port) \
249
((__builtin_constant_p((port)) && (port) < 32768) ? \
250
        __outlc_p((val),(port)) : \
251
        __outl_p((val),(port)))
252
 
253
#define inl_p(port) \
254
((__builtin_constant_p((port)) && (port) < 32768) ? \
255
        __inlc_p(port) : \
256
        __inl_p(port))
257
 
258
 
259
#define outsb(port,addr,count) \
260
((__builtin_constant_p((port)) && (port) < 32768) ? \
261
        __outsbc((port),(addr),(count)) : \
262
        __outsb ((port),(addr),(count)))
263
 
264
#define insb(port,addr,count) \
265
((__builtin_constant_p((port)) && (port) < 32768) ? \
266
        __insbc((port),(addr),(count)) : \
267
        __insb((port),(addr),(count)))
268
 
269
#define outsw(port,addr,count) \
270
((__builtin_constant_p((port)) && (port) < 32768) ? \
271
        __outswc((port),(addr),(count)) : \
272
        __outsw ((port),(addr),(count)))
273
 
274
#define insw(port,addr,count) \
275
((__builtin_constant_p((port)) && (port) < 32768) ? \
276
        __inswc((port),(addr),(count)) : \
277
        __insw((port),(addr),(count)))
278
 
279
#define outsl(port,addr,count) \
280
((__builtin_constant_p((port)) && (port) < 32768) ? \
281
        __outslc((port),(addr),(count)) : \
282
        __outsl ((port),(addr),(count)))
283
 
284
#define insl(port,addr,count) \
285
((__builtin_constant_p((port)) && (port) < 32768) ? \
286
        __inslc((port),(addr),(count)) : \
287
        __insl((port),(addr),(count)))
288
 
289
#endif /* __ASM_MIPS_IO_H */

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