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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-mips/] [string.h] - Blame information for rev 1782

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/*
 * include/asm-mips/string.h
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (c) 1994, 1995  Waldorf Electronics
 * written by Ralf Baechle
 */
#ifndef __ASM_MIPS_STRING_H
#define __ASM_MIPS_STRING_H
 
#define __HAVE_ARCH_STRCPY
extern __inline__ char * strcpy(char * dest, const char *src)
{
  char *xdest = dest;
 
  __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t$1,(%1)\n\t"
        "addiu\t%1,1\n\t"
        "sb\t$1,(%0)\n\t"
        "bnez\t$1,1b\n\t"
        "addiu\t%0,1\n\t"
        ".set\tat\n\t"
        ".set\treorder"
        : "=r" (dest), "=r" (src)
        : "0" (dest), "1" (src)
        : "$1","memory");
 
  return xdest;
}
 
#define __HAVE_ARCH_STRNCPY
extern __inline__ char * strncpy(char *dest, const char *src, size_t n)
{
  char *xdest = dest;
 
  if (n == 0)
    return xdest;
 
  __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t$1,(%1)\n\t"
        "subu\t%2,%2,1\n\t"
        "sb\t$1,(%0)\n\t"
        "beqz\t$1,2f\n\t"
        "addiu\t%0,%0,1\n\t"
        "bnez\t%2,1b\n\t"
        "addiu\t%1,%1,1\n"
        "2:\n\t"
        ".set\tat\n\t"
        ".set\treorder\n\t"
        : "=r" (dest), "=r" (src), "=r" (n)
        : "0" (dest), "1" (src), "2" (n)
        : "$1","memory");
 
  return dest;
}
 
#define __HAVE_ARCH_STRCMP
extern __inline__ int strcmp(const char * cs, const char * ct)
{
  int __res;
 
  __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n\t"
        "lbu\t%2,(%0)\n"
        "1:\tlbu\t$1,(%1)\n\t"
        "addiu\t%0,1\n\t"
        "bne\t$1,%2,2f\n\t"
        "addiu\t%1,1\n\t"
        "bnez\t%2,1b\n\t"
        "lbu\t%2,(%0)\n\t"
#ifndef __R4000__
        "nop\n\t"
#endif
        "move\t%2,$1\n"
        "2:\tsubu\t%2,$1\n"
        "3:\t.set\tat\n\t"
        ".set\treorder"
        : "=d" (cs), "=d" (ct), "=d" (__res)
        : "0" (cs), "1" (ct)
        : "$1");
 
  return __res;
}
 
#define __HAVE_ARCH_STRNCMP
extern __inline__ int strncmp(const char * cs, const char * ct, size_t count)
{
  char __res;
 
  __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t%3,(%0)\n\t"
        "beqz\t%2,2f\n\t"
        "lbu\t$1,(%1)\n\t"
        "subu\t%2,1\n\t"
        "bne\t$1,%3,3f\n\t"
        "addiu\t%0,1\n\t"
        "bnez\t%3,1b\n\t"
        "addiu\t%1,1\n"
        "2:\tmove\t%3,$1\n"
        "3:\tsubu\t%3,$1\n\t"
        ".set\tat\n\t"
        ".set\treorder"
        : "=d" (cs), "=d" (ct), "=d" (count), "=d" (__res)
        : "0" (cs), "1" (ct), "2" (count)
        : "$1");
 
  return __res;
}
 
#define __HAVE_ARCH_MEMSET
extern __inline__ void * memset(void * s, int c, size_t count)
{
  void *xs = s;
 
  if (!count)
    return xs;
  __asm__ __volatile__(
        ".set\tnoreorder\n"
        "1:\tsb\t%3,(%0)\n\t"
        "bne\t%0,%1,1b\n\t"
        "addiu\t%0,%0,1\n\t"
        ".set\treorder"
        : "=r" (s), "=r" (count)
        : "0" (s), "r" (c), "1" (s + count - 1)
        : "memory");
 
  return xs;
}
 
#define __HAVE_ARCH_MEMCPY
extern __inline__ void * memcpy(void * to, const void * from, size_t n)
{
  void *xto = to;
 
  if (!n)
    return xto;
  __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t$1,(%1)\n\t"
        "addiu\t%1,1\n\t"
        "sb\t$1,(%0)\n\t"
        "subu\t%2,1\n\t"
        "bnez\t%2,1b\n\t"
        "addiu\t%0,1\n\t"
        ".set\tat\n\t"
        ".set\treorder"
        : "=r" (to), "=r" (from), "=r" (n)
        : "0" (to), "1" (from), "2" (n)
        : "$1","memory" );
  return xto;
}
 
#define __HAVE_ARCH_MEMMOVE
extern __inline__ void * memmove(void * dest,const void * src, size_t n)
{
  void *xdest = dest;
 
  if (!n)
    return xdest;
 
  if (dest < src)
    __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t$1,(%1)\n\t"
        "addiu\t%1,1\n\t"
        "sb\t$1,(%0)\n\t"
        "subu\t%2,1\n\t"
        "bnez\t%2,1b\n\t"
        "addiu\t%0,1\n\t"
        ".set\tat\n\t"
        ".set\treorder"
        : "=r" (dest), "=r" (src), "=r" (n)
        : "0" (dest), "1" (src), "2" (n)
        : "$1","memory" );
  else
    __asm__ __volatile__(
        ".set\tnoreorder\n\t"
        ".set\tnoat\n"
        "1:\tlbu\t$1,-1(%1)\n\t"
        "subu\t%1,1\n\t"
        "sb\t$1,-1(%0)\n\t"
        "subu\t%2,1\n\t"
        "bnez\t%2,1b\n\t"
        "subu\t%0,1\n\t"
        ".set\tat\n\t"
        ".set\treorder"
        : "=r" (dest), "=r" (src), "=r" (n)
        : "0" (dest+n), "1" (src+n), "2" (n)
        : "$1","memory" );
  return xdest;
}
 
#define __HAVE_ARCH_MEMSCAN
extern __inline__ void * memscan(void * addr, int c, size_t size)
{
        if (!size)
                return addr;
        __asm__(".set\tnoreorder\n\t"
                ".set\tnoat\n"
                "1:\tbeqz\t%1,2f\n\t"
                "lbu\t$1,(%0)\n\t"
                "subu\t%1,1\n\t"
                "bnez\t%1,1b\n\t"
                "addiu\t%0,1\n\t"
                ".set\tat\n\t"
                ".set\treorder\n"
                "2:"
                : "=r" (addr), "=r" (size)
                : "0" (addr), "1" (size), "r" (c)
                : "$1");
 
        return addr;
}
 
#endif /* __ASM_MIPS_STRING_H */

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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-mips/] [string.h] - Blame information for rev 1782

Line No.	Rev	Author	Line
1	1633	jcastillo	`/*`
2			`* include/asm-mips/string.h`
3			`*`
4			`* This file is subject to the terms and conditions of the GNU General Public`
5			`* License. See the file "COPYING" in the main directory of this archive`
6			`* for more details.`
7			`*`
8			`* Copyright (c) 1994, 1995 Waldorf Electronics`
9			`* written by Ralf Baechle`
10			`*/`
11			`#ifndef __ASM_MIPS_STRING_H`
12			`#define __ASM_MIPS_STRING_H`
13
14			`#define __HAVE_ARCH_STRCPY`
15			`extern __inline__ char * strcpy(char * dest, const char *src)`
16			`{`
17			`char *xdest = dest;`
18
19			`__asm__ __volatile__(`
20			`".set\tnoreorder\n\t"`
21			`".set\tnoat\n"`
22			`"1:\tlbu\t$1,(%1)\n\t"`
23			`"addiu\t%1,1\n\t"`
24			`"sb\t$1,(%0)\n\t"`
25			`"bnez\t$1,1b\n\t"`
26			`"addiu\t%0,1\n\t"`
27			`".set\tat\n\t"`
28			`".set\treorder"`
29			`: "=r" (dest), "=r" (src)`
30			`: "0" (dest), "1" (src)`
31			`: "$1","memory");`
32
33			`return xdest;`
34			`}`
35
36			`#define __HAVE_ARCH_STRNCPY`
37			`extern __inline__ char * strncpy(char dest, const char src, size_t n)`
38			`{`
39			`char *xdest = dest;`
40
41			`if (n == 0)`
42			`return xdest;`
43
44			`__asm__ __volatile__(`
45			`".set\tnoreorder\n\t"`
46			`".set\tnoat\n"`
47			`"1:\tlbu\t$1,(%1)\n\t"`
48			`"subu\t%2,%2,1\n\t"`
49			`"sb\t$1,(%0)\n\t"`
50			`"beqz\t$1,2f\n\t"`
51			`"addiu\t%0,%0,1\n\t"`
52			`"bnez\t%2,1b\n\t"`
53			`"addiu\t%1,%1,1\n"`
54			`"2:\n\t"`
55			`".set\tat\n\t"`
56			`".set\treorder\n\t"`
57			`: "=r" (dest), "=r" (src), "=r" (n)`
58			`: "0" (dest), "1" (src), "2" (n)`
59			`: "$1","memory");`
60
61			`return dest;`
62			`}`
63
64			`#define __HAVE_ARCH_STRCMP`
65			`extern __inline__ int strcmp(const char * cs, const char * ct)`
66			`{`
67			`int __res;`
68
69			`__asm__ __volatile__(`
70			`".set\tnoreorder\n\t"`
71			`".set\tnoat\n\t"`
72			`"lbu\t%2,(%0)\n"`
73			`"1:\tlbu\t$1,(%1)\n\t"`
74			`"addiu\t%0,1\n\t"`
75			`"bne\t$1,%2,2f\n\t"`
76			`"addiu\t%1,1\n\t"`
77			`"bnez\t%2,1b\n\t"`
78			`"lbu\t%2,(%0)\n\t"`
79			`#ifndef __R4000__`
80			`"nop\n\t"`
81			`#endif`
82			`"move\t%2,$1\n"`
83			`"2:\tsubu\t%2,$1\n"`
84			`"3:\t.set\tat\n\t"`
85			`".set\treorder"`
86			`: "=d" (cs), "=d" (ct), "=d" (__res)`
87			`: "0" (cs), "1" (ct)`
88			`: "$1");`
89
90			`return __res;`
91			`}`
92
93			`#define __HAVE_ARCH_STRNCMP`
94			`extern __inline__ int strncmp(const char * cs, const char * ct, size_t count)`
95			`{`
96			`char __res;`
97
98			`__asm__ __volatile__(`
99			`".set\tnoreorder\n\t"`
100			`".set\tnoat\n"`
101			`"1:\tlbu\t%3,(%0)\n\t"`
102			`"beqz\t%2,2f\n\t"`
103			`"lbu\t$1,(%1)\n\t"`
104			`"subu\t%2,1\n\t"`
105			`"bne\t$1,%3,3f\n\t"`
106			`"addiu\t%0,1\n\t"`
107			`"bnez\t%3,1b\n\t"`
108			`"addiu\t%1,1\n"`
109			`"2:\tmove\t%3,$1\n"`
110			`"3:\tsubu\t%3,$1\n\t"`
111			`".set\tat\n\t"`
112			`".set\treorder"`
113			`: "=d" (cs), "=d" (ct), "=d" (count), "=d" (__res)`
114			`: "0" (cs), "1" (ct), "2" (count)`
115			`: "$1");`
116
117			`return __res;`
118			`}`
119
120			`#define __HAVE_ARCH_MEMSET`
121			`extern __inline__ void * memset(void * s, int c, size_t count)`
122			`{`
123			`void *xs = s;`
124
125			`if (!count)`
126			`return xs;`
127			`__asm__ __volatile__(`
128			`".set\tnoreorder\n"`
129			`"1:\tsb\t%3,(%0)\n\t"`
130			`"bne\t%0,%1,1b\n\t"`
131			`"addiu\t%0,%0,1\n\t"`
132			`".set\treorder"`
133			`: "=r" (s), "=r" (count)`
134			`: "0" (s), "r" (c), "1" (s + count - 1)`
135			`: "memory");`
136
137			`return xs;`
138			`}`
139
140			`#define __HAVE_ARCH_MEMCPY`
141			`extern __inline__ void * memcpy(void * to, const void * from, size_t n)`
142			`{`
143			`void *xto = to;`
144
145			`if (!n)`
146			`return xto;`
147			`__asm__ __volatile__(`
148			`".set\tnoreorder\n\t"`
149			`".set\tnoat\n"`
150			`"1:\tlbu\t$1,(%1)\n\t"`
151			`"addiu\t%1,1\n\t"`
152			`"sb\t$1,(%0)\n\t"`
153			`"subu\t%2,1\n\t"`
154			`"bnez\t%2,1b\n\t"`
155			`"addiu\t%0,1\n\t"`
156			`".set\tat\n\t"`
157			`".set\treorder"`
158			`: "=r" (to), "=r" (from), "=r" (n)`
159			`: "0" (to), "1" (from), "2" (n)`
160			`: "$1","memory" );`
161			`return xto;`
162			`}`
163
164			`#define __HAVE_ARCH_MEMMOVE`
165			`extern __inline__ void * memmove(void * dest,const void * src, size_t n)`
166			`{`
167			`void *xdest = dest;`
168
169			`if (!n)`
170			`return xdest;`
171
172			`if (dest < src)`
173			`__asm__ __volatile__(`
174			`".set\tnoreorder\n\t"`
175			`".set\tnoat\n"`
176			`"1:\tlbu\t$1,(%1)\n\t"`
177			`"addiu\t%1,1\n\t"`
178			`"sb\t$1,(%0)\n\t"`
179			`"subu\t%2,1\n\t"`
180			`"bnez\t%2,1b\n\t"`
181			`"addiu\t%0,1\n\t"`
182			`".set\tat\n\t"`
183			`".set\treorder"`
184			`: "=r" (dest), "=r" (src), "=r" (n)`
185			`: "0" (dest), "1" (src), "2" (n)`
186			`: "$1","memory" );`
187			`else`
188			`__asm__ __volatile__(`
189			`".set\tnoreorder\n\t"`
190			`".set\tnoat\n"`
191			`"1:\tlbu\t$1,-1(%1)\n\t"`
192			`"subu\t%1,1\n\t"`
193			`"sb\t$1,-1(%0)\n\t"`
194			`"subu\t%2,1\n\t"`
195			`"bnez\t%2,1b\n\t"`
196			`"subu\t%0,1\n\t"`
197			`".set\tat\n\t"`
198			`".set\treorder"`
199			`: "=r" (dest), "=r" (src), "=r" (n)`
200			`: "0" (dest+n), "1" (src+n), "2" (n)`
201			`: "$1","memory" );`
202			`return xdest;`
203			`}`
204
205			`#define __HAVE_ARCH_MEMSCAN`
206			`extern __inline__ void * memscan(void * addr, int c, size_t size)`
207			`{`
208			`if (!size)`
209			`return addr;`
210			`__asm__(".set\tnoreorder\n\t"`
211			`".set\tnoat\n"`
212			`"1:\tbeqz\t%1,2f\n\t"`
213			`"lbu\t$1,(%0)\n\t"`
214			`"subu\t%1,1\n\t"`
215			`"bnez\t%1,1b\n\t"`
216			`"addiu\t%0,1\n\t"`
217			`".set\tat\n\t"`
218			`".set\treorder\n"`
219			`"2:"`
220			`: "=r" (addr), "=r" (size)`
221			`: "0" (addr), "1" (size), "r" (c)`
222			`: "$1");`
223
224			`return addr;`
225			`}`
226
227			`#endif /* __ASM_MIPS_STRING_H */`