OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-sparc/] [smp.h] - Blame information for rev 1782

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1633 jcastillo
/* smp.h: Sparc specific SMP stuff.
2
 *
3
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4
 */
5
 
6
#ifndef _SPARC_SMP_H
7
#define _SPARC_SMP_H
8
 
9
#ifndef __ASSEMBLY__
10
/* PROM provided per-processor information we need
11
 * to start them all up.
12
 */
13
 
14
struct prom_cpuinfo {
15
        int prom_node;
16
        int mid;
17
};
18
#endif /* !(__ASSEMBLY__) */
19
 
20
#ifdef __SMP__
21
 
22
#ifndef __ASSEMBLY__
23
 
24
extern struct prom_cpuinfo linux_cpus[NCPUS];
25
 
26
/* Per processor Sparc parameters we need. */
27
 
28
struct cpuinfo_sparc {
29
        unsigned long udelay_val; /* that's it */
30
};
31
 
32
extern struct cpuinfo_sparc cpu_data[NR_CPUS];
33
 
34
typedef volatile unsigned char klock_t;
35
extern klock_t kernel_flag;
36
 
37
#define KLOCK_HELD       0xff
38
#define KLOCK_CLEAR      0x00
39
 
40
/*
41
 *      Private routines/data
42
 */
43
 
44
extern int smp_found_cpus;
45
extern unsigned char boot_cpu_id;
46
extern unsigned long cpu_present_map;
47
extern volatile unsigned long smp_invalidate_needed[NR_CPUS];
48
extern volatile unsigned long kernel_counter;
49
extern volatile unsigned char active_kernel_processor;
50
extern void smp_message_irq(void);
51
extern unsigned long ipi_count;
52
extern volatile unsigned long kernel_counter;
53
extern volatile unsigned long syscall_count;
54
 
55
extern void print_lock_state(void);
56
 
57
typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
58
                       unsigned long, unsigned long);
59
 
60
/*
61
 *      General functions that each host system must provide.
62
 */
63
 
64
extern void smp_callin(void);
65
extern void smp_boot_cpus(void);
66
extern void smp_store_cpu_info(int id);
67
extern void smp_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
68
                           unsigned long arg3, unsigned long arg4, unsigned long arg5);
69
extern void smp_capture(void);
70
extern void smp_release(void);
71
 
72
extern inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); }
73
extern inline void xc1(smpfunc_t func, unsigned long arg1)
74
{ smp_cross_call(func, arg1, 0, 0, 0, 0); }
75
extern inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
76
{ smp_cross_call(func, arg1, arg2, 0, 0, 0); }
77
extern inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
78
                       unsigned long arg3)
79
{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); }
80
extern inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
81
                       unsigned long arg3, unsigned long arg4)
82
{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); }
83
extern inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
84
                       unsigned long arg3, unsigned long arg4, unsigned long arg5)
85
{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
86
 
87
extern volatile int cpu_number_map[NR_CPUS];
88
extern volatile int cpu_logical_map[NR_CPUS];
89
 
90
extern __inline int smp_processor_id(void)
91
{
92
        int cpuid;
93
 
94
        __asm__ __volatile__("rd %%tbr, %0\n\t"
95
                             "srl %0, 12, %0\n\t"
96
                             "and %0, 3, %0\n\t" :
97
                             "=&r" (cpuid));
98
        return cpuid;
99
}
100
 
101
 
102
extern volatile unsigned long smp_proc_in_lock[NR_CPUS]; /* for computing process time */
103
extern volatile int smp_process_available;
104
 
105
extern inline int smp_swap(volatile int *addr, int value)
106
{
107
        __asm__ __volatile__("swap [%2], %0\n\t" :
108
                             "=&r" (value) :
109
                             "0" (value), "r" (addr));
110
        return value;
111
}
112
 
113
extern inline volatile void inc_smp_counter(volatile int *ctr)
114
{
115
        int tmp;
116
 
117
        while((tmp = smp_swap(ctr, -1)) == -1)
118
                ;
119
        smp_swap(ctr, (tmp + 1));
120
}
121
 
122
extern inline volatile void dec_smp_counter(volatile int *ctr)
123
{
124
        int tmp;
125
 
126
        while((tmp = smp_swap(ctr, -1)) == -1)
127
                ;
128
        smp_swap(ctr, (tmp - 1));
129
}
130
 
131
extern inline volatile int read_smp_counter(volatile int *ctr)
132
{
133
        int value;
134
 
135
        while((value = *ctr) == -1)
136
                ;
137
        return value;
138
}
139
 
140
#endif /* !(__ASSEMBLY__) */
141
 
142
/* Sparc specific messages. */
143
#define MSG_CAPTURE            0x0004       /* Park a processor. */
144
#define MSG_CROSS_CALL         0x0005       /* run func on cpus */
145
 
146
/* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
147
 * contains something other than one of these then the ipi is from
148
 * Linux's active_kernel_processor.  This facility exists so that
149
 * the boot monitor can capture all the other cpus when one catches
150
 * a watchdog reset or the user enters the monitor using L1-A keys.
151
 */
152
#define MBOX_STOPCPU          0xFB
153
#define MBOX_IDLECPU          0xFC
154
#define MBOX_IDLECPU2         0xFD
155
#define MBOX_STOPCPU2         0xFE
156
 
157
 
158
#define NO_PROC_ID            0xFF
159
 
160
#define PROC_CHANGE_PENALTY     20
161
 
162
#define SMP_FROM_INT            1
163
#define SMP_FROM_SYSCALL        2
164
 
165
#endif /* !(__SMP__) */
166
 
167
#endif /* !(_SPARC_SMP_H) */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.