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[/] [or1k_old/] [trunk/] [uclinux/] [uClinux-2.0.x/] [drivers/] [isdn/] [pcbit/] [layer2.h] - Blame information for rev 1782

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/*
 * Copyright (C) 1996 Universidade de Lisboa
 *
 * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
 *
 * This software may be used and distributed according to the terms of
 * the GNU Public License, incorporated herein by reference.
 */
 
/*
 *        PCBIT-D low-layer interface definitions
 */
 
#ifndef LAYER2_H
#define LAYER2_H
 
#include <asm/byteorder.h>
 
#define BANK1 0x0000U /* PC -> Board */
#define BANK2 0x01ffU /* Board -> PC */
#define BANK3 0x03feU /* Att Board */
#define BANK4 0x03ffU /* Att PC */
 
#define BANKLEN 0x01FFU
 
#define LOAD_ZONE_START 0x03f8U
#define LOAD_ZONE_END   0x03fdU
 
#define LOAD_RETRY      18000000
 
 
 
/* TAM - XX - C - S  - NUM */
#define PREHDR_LEN 8
/* TT  - M  - I - TH - TD  */
#define FRAME_HDR_LEN  8   
 
#define MSG_CONN_REQ            0x08000100
#define MSG_CONN_CONF           0x00000101
#define MSG_CONN_IND            0x00000102
#define MSG_CONN_RESP           0x08000103
 
#define MSG_CONN_ACTV_REQ       0x08000300
#define MSG_CONN_ACTV_CONF      0x00000301
#define MSG_CONN_ACTV_IND       0x00000302
#define MSG_CONN_ACTV_RESP      0x08000303
 
#define MSG_DISC_REQ            0x08000400
#define MSG_DISC_CONF           0x00000401
#define MSG_DISC_IND            0x00000402
#define MSG_DISC_RESP           0x08000403
 
#define MSG_TDATA_REQ           0x0908E200
#define MSG_TDATA_CONF          0x0000E201
#define MSG_TDATA_IND           0x0000E202
#define MSG_TDATA_RESP          0x0908E203
 
#define MSG_SELP_REQ            0x09004000
#define MSG_SELP_CONF           0x00004001
 
#define MSG_ACT_TRANSP_REQ      0x0908E000
#define MSG_ACT_TRANSP_CONF     0x0000E001
 
#define MSG_STPROT_REQ          0x09004100
#define MSG_STPROT_CONF         0x00004101
 
#define MSG_PING188_REQ         0x09030500
#define MSG_PING188_CONF        0x000005bc
 
#define MSG_WATCH188            0x09030400
 
#define MSG_API_ON              0x08020102
#define MSG_POOL_PCBIT          0x08020400
#define MSG_POOL_PCBIT_CONF     0x00000401
 
#define MSG_INFO_IND            0x00002602
#define MSG_INFO_RESP           0x08002603
 
#define MSG_DEBUG_188           0x0000ff00
 
/*
 
   long  4 3 2 1
   Intel 1 2 3 4
*/
 
struct msg_fmt {
#ifdef __LITTLE_ENDIAN              /* Little Endian */
  u_char scmd;
  u_char cmd;
  u_char proc;
  u_char cpu;
#else
#error "Non-Intel CPU"
  u_char cpu;
  u_char proc;
  u_char cmd;
  u_char scmd;
#endif
};
 
 
#define MAX_QUEUED 7
 
#define SCHED_READ    0x01
#define SCHED_WRITE   0x02
 
#define SET_RUN_TIMEOUT 2*HZ /* 2 seconds */
 
 
struct frame_buf {
        ulong msg;
        unsigned short refnum;
        unsigned short dt_len;
        unsigned short hdr_len;
        struct sk_buff *skb;
        unsigned short copied;
        struct frame_buf * next;
};
 
#define MIN(a,b) ((a<b)?a:b)
 
extern int pcbit_l2_write(struct pcbit_dev * dev, ulong msg, ushort refnum,
                          struct sk_buff *skb, unsigned short hdr_len);
 
extern void pcbit_irq_handler(int interrupt, void *, struct pt_regs *regs);
 
extern struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS];
 
#ifdef DEBUG
static __inline__ void log_state(struct pcbit_dev *dev) {
        printk(KERN_DEBUG "writeptr = %ld\n",
               (ulong) (dev->writeptr - dev->sh_mem));
        printk(KERN_DEBUG "readptr  = %ld\n",
               (ulong) (dev->readptr - (dev->sh_mem + BANK2)));
        printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",
               dev->rcv_seq, dev->send_seq, dev->unack_seq);
}
#endif
 
static __inline__ struct pcbit_dev * chan2dev(struct pcbit_chan * chan)
{
        struct pcbit_dev * dev;
        int i;
 
 
        for (i=0; i<MAX_PCBIT_CARDS; i++)
                if ((dev=dev_pcbit[i]))
                        if (dev->b1 == chan || dev->b2 == chan)
                                return dev;
        return NULL;
 
}
 
static __inline__ struct pcbit_dev * finddev(int id)
{
  struct pcbit_dev * dev;
  int i;
 
  for (i=0; i<MAX_PCBIT_CARDS; i++)
    if ((dev=dev_pcbit[i]))
      if (dev->id == id)
        return dev;
  return NULL;
}
 
 
/*
 *  Support routines for reading and writing in the board
 */
 
static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
{
  writeb(dt, dev->writeptr++);
  if (dev->writeptr == dev->sh_mem + BANKLEN)
    dev->writeptr = dev->sh_mem;
}
 
static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
{
  int dist;
 
  dist = BANKLEN - (dev->writeptr - dev->sh_mem);
  switch (dist) {
  case 2:
    writew(dt, dev->writeptr);
    dev->writeptr = dev->sh_mem;
    break;
  case 1:
    writeb((u_char) (dt & 0x00ffU), dev->writeptr);
    dev->writeptr = dev->sh_mem;
    writeb((u_char) (dt >> 8), dev->writeptr++);
    break;
  default:
    writew(dt, dev->writeptr);
    dev->writeptr += 2;
    break;
  };
}
 
static __inline__ void memcpy_topcbit(struct pcbit_dev * dev, u_char * data,
                                      int len)
{
  int diff;
 
  diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem) );
 
  if (diff > 0)
    {
      memcpy_toio(dev->writeptr, data, len - diff);
      memcpy_toio(dev->sh_mem, data + (len - diff), diff);
      dev->writeptr = dev->sh_mem + diff;
    }
  else
    {
      memcpy_toio(dev->writeptr, data, len);
 
      dev->writeptr += len;
      if (diff == 0)
        dev->writeptr = dev->sh_mem;
    }
}
 
static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
{
  unsigned char val;
 
  val = readb(dev->readptr++);
  if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
    dev->readptr = dev->sh_mem + BANK2;
 
  return val;
}
 
static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
{
  int dist;
  unsigned short val;
 
  dist = BANKLEN - ( dev->readptr - (dev->sh_mem + BANK2 ) );
  switch (dist) {
  case 2:
    val = readw(dev->readptr);
    dev->readptr = dev->sh_mem + BANK2;
    break;
  case 1:
    val = readb(dev->readptr);
    dev->readptr = dev->sh_mem + BANK2;
    val = (readb(dev->readptr++) << 8) | val;
    break;
  default:
    val = readw(dev->readptr);
    dev->readptr += 2;
    break;
  };
  return val;
}
 
static __inline__ void memcpy_frompcbit(struct pcbit_dev * dev, u_char * data, int len)
{
  int diff;
 
  diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2) ) );
  if (diff > 0)
    {
      memcpy_fromio(data, dev->readptr, len - diff);
      memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
      dev->readptr = dev->sh_mem + BANK2 + diff;
    }
  else
    {
      memcpy_fromio(data, dev->readptr, len);
      dev->readptr += len;
      if (diff == 0)
        dev->readptr = dev->sh_mem + BANK2;
    }
}
 
 
#endif
 
 
 
 
 
 
 

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[/] [or1k_old/] [trunk/] [uclinux/] [uClinux-2.0.x/] [drivers/] [isdn/] [pcbit/] [layer2.h] - Blame information for rev 1782

Line No.	Rev	Author	Line
1	199	simons	`/*`
2			`* Copyright (C) 1996 Universidade de Lisboa`
3			`*`
4			`* Written by Pedro Roque Marques (roque@di.fc.ul.pt)`
5			`*`
6			`* This software may be used and distributed according to the terms of`
7			`* the GNU Public License, incorporated herein by reference.`
8			`*/`
9
10			`/*`
11			`* PCBIT-D low-layer interface definitions`
12			`*/`
13
14			`#ifndef LAYER2_H`
15			`#define LAYER2_H`
16
17			`#include <asm/byteorder.h>`
18
19			`#define BANK1 0x0000U /* PC -> Board */`
20			`#define BANK2 0x01ffU /* Board -> PC */`
21			`#define BANK3 0x03feU /* Att Board */`
22			`#define BANK4 0x03ffU /* Att PC */`
23
24			`#define BANKLEN 0x01FFU`
25
26			`#define LOAD_ZONE_START 0x03f8U`
27			`#define LOAD_ZONE_END 0x03fdU`
28
29			`#define LOAD_RETRY 18000000`
30
31
32
33			`/* TAM - XX - C - S - NUM */`
34			`#define PREHDR_LEN 8`
35			`/* TT - M - I - TH - TD */`
36			`#define FRAME_HDR_LEN 8`
37
38			`#define MSG_CONN_REQ 0x08000100`
39			`#define MSG_CONN_CONF 0x00000101`
40			`#define MSG_CONN_IND 0x00000102`
41			`#define MSG_CONN_RESP 0x08000103`
42
43			`#define MSG_CONN_ACTV_REQ 0x08000300`
44			`#define MSG_CONN_ACTV_CONF 0x00000301`
45			`#define MSG_CONN_ACTV_IND 0x00000302`
46			`#define MSG_CONN_ACTV_RESP 0x08000303`
47
48			`#define MSG_DISC_REQ 0x08000400`
49			`#define MSG_DISC_CONF 0x00000401`
50			`#define MSG_DISC_IND 0x00000402`
51			`#define MSG_DISC_RESP 0x08000403`
52
53			`#define MSG_TDATA_REQ 0x0908E200`
54			`#define MSG_TDATA_CONF 0x0000E201`
55			`#define MSG_TDATA_IND 0x0000E202`
56			`#define MSG_TDATA_RESP 0x0908E203`
57
58			`#define MSG_SELP_REQ 0x09004000`
59			`#define MSG_SELP_CONF 0x00004001`
60
61			`#define MSG_ACT_TRANSP_REQ 0x0908E000`
62			`#define MSG_ACT_TRANSP_CONF 0x0000E001`
63
64			`#define MSG_STPROT_REQ 0x09004100`
65			`#define MSG_STPROT_CONF 0x00004101`
66
67			`#define MSG_PING188_REQ 0x09030500`
68			`#define MSG_PING188_CONF 0x000005bc`
69
70			`#define MSG_WATCH188 0x09030400`
71
72			`#define MSG_API_ON 0x08020102`
73			`#define MSG_POOL_PCBIT 0x08020400`
74			`#define MSG_POOL_PCBIT_CONF 0x00000401`
75
76			`#define MSG_INFO_IND 0x00002602`
77			`#define MSG_INFO_RESP 0x08002603`
78
79			`#define MSG_DEBUG_188 0x0000ff00`
80
81			`/*`
82
83			`long 4 3 2 1`
84			`Intel 1 2 3 4`
85			`*/`
86
87			`struct msg_fmt {`
88			`#ifdef __LITTLE_ENDIAN /* Little Endian */`
89			`u_char scmd;`
90			`u_char cmd;`
91			`u_char proc;`
92			`u_char cpu;`
93			`#else`
94			`#error "Non-Intel CPU"`
95			`u_char cpu;`
96			`u_char proc;`
97			`u_char cmd;`
98			`u_char scmd;`
99			`#endif`
100			`};`
101
102
103			`#define MAX_QUEUED 7`
104
105			`#define SCHED_READ 0x01`
106			`#define SCHED_WRITE 0x02`
107
108			`#define SET_RUN_TIMEOUT 2HZ / 2 seconds */`
109
110
111			`struct frame_buf {`
112			`ulong msg;`
113			`unsigned short refnum;`
114			`unsigned short dt_len;`
115			`unsigned short hdr_len;`
116			`struct sk_buff *skb;`
117			`unsigned short copied;`
118			`struct frame_buf * next;`
119			`};`
120
121			`#define MIN(a,b) ((a<b)?a:b)`
122
123			`extern int pcbit_l2_write(struct pcbit_dev * dev, ulong msg, ushort refnum,`
124			`struct sk_buff *skb, unsigned short hdr_len);`
125
126			`extern void pcbit_irq_handler(int interrupt, void , struct pt_regs regs);`
127
128			`extern struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS];`
129
130			`#ifdef DEBUG`
131			`static __inline__ void log_state(struct pcbit_dev *dev) {`
132			`printk(KERN_DEBUG "writeptr = %ld\n",`
133			`(ulong) (dev->writeptr - dev->sh_mem));`
134			`printk(KERN_DEBUG "readptr = %ld\n",`
135			`(ulong) (dev->readptr - (dev->sh_mem + BANK2)));`
136			`printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",`
137			`dev->rcv_seq, dev->send_seq, dev->unack_seq);`
138			`}`
139			`#endif`
140
141			`static __inline__ struct pcbit_dev * chan2dev(struct pcbit_chan * chan)`
142			`{`
143			`struct pcbit_dev * dev;`
144			`int i;`
145
146
147			`for (i=0; i<MAX_PCBIT_CARDS; i++)`
148			`if ((dev=dev_pcbit[i]))`
149			`if (dev->b1 == chan \|\| dev->b2 == chan)`
150			`return dev;`
151			`return NULL;`
152
153			`}`
154
155			`static __inline__ struct pcbit_dev * finddev(int id)`
156			`{`
157			`struct pcbit_dev * dev;`
158			`int i;`
159
160			`for (i=0; i<MAX_PCBIT_CARDS; i++)`
161			`if ((dev=dev_pcbit[i]))`
162			`if (dev->id == id)`
163			`return dev;`
164			`return NULL;`
165			`}`
166
167
168			`/*`
169			`* Support routines for reading and writing in the board`
170			`*/`
171
172			`static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)`
173			`{`
174			`writeb(dt, dev->writeptr++);`
175			`if (dev->writeptr == dev->sh_mem + BANKLEN)`
176			`dev->writeptr = dev->sh_mem;`
177			`}`
178
179			`static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)`
180			`{`
181			`int dist;`
182
183			`dist = BANKLEN - (dev->writeptr - dev->sh_mem);`
184			`switch (dist) {`
185			`case 2:`
186			`writew(dt, dev->writeptr);`
187			`dev->writeptr = dev->sh_mem;`
188			`break;`
189			`case 1:`
190			`writeb((u_char) (dt & 0x00ffU), dev->writeptr);`
191			`dev->writeptr = dev->sh_mem;`
192			`writeb((u_char) (dt >> 8), dev->writeptr++);`
193			`break;`
194			`default:`
195			`writew(dt, dev->writeptr);`
196			`dev->writeptr += 2;`
197			`break;`
198			`};`
199			`}`
200
201			`static __inline__ void memcpy_topcbit(struct pcbit_dev * dev, u_char * data,`
202			`int len)`
203			`{`
204			`int diff;`
205
206			`diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem) );`
207
208			`if (diff > 0)`
209			`{`
210			`memcpy_toio(dev->writeptr, data, len - diff);`
211			`memcpy_toio(dev->sh_mem, data + (len - diff), diff);`
212			`dev->writeptr = dev->sh_mem + diff;`
213			`}`
214			`else`
215			`{`
216			`memcpy_toio(dev->writeptr, data, len);`
217
218			`dev->writeptr += len;`
219			`if (diff == 0)`
220			`dev->writeptr = dev->sh_mem;`
221			`}`
222			`}`
223
224			`static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)`
225			`{`
226			`unsigned char val;`
227
228			`val = readb(dev->readptr++);`
229			`if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)`
230			`dev->readptr = dev->sh_mem + BANK2;`
231
232			`return val;`
233			`}`
234
235			`static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)`
236			`{`
237			`int dist;`
238			`unsigned short val;`
239
240			`dist = BANKLEN - ( dev->readptr - (dev->sh_mem + BANK2 ) );`
241			`switch (dist) {`
242			`case 2:`
243			`val = readw(dev->readptr);`
244			`dev->readptr = dev->sh_mem + BANK2;`
245			`break;`
246			`case 1:`
247			`val = readb(dev->readptr);`
248			`dev->readptr = dev->sh_mem + BANK2;`
249			`val = (readb(dev->readptr++) << 8) \| val;`
250			`break;`
251			`default:`
252			`val = readw(dev->readptr);`
253			`dev->readptr += 2;`
254			`break;`
255			`};`
256			`return val;`
257			`}`
258
259			`static __inline__ void memcpy_frompcbit(struct pcbit_dev * dev, u_char * data, int len)`
260			`{`
261			`int diff;`
262
263			`diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2) ) );`
264			`if (diff > 0)`
265			`{`
266			`memcpy_fromio(data, dev->readptr, len - diff);`
267			`memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);`
268			`dev->readptr = dev->sh_mem + BANK2 + diff;`
269			`}`
270			`else`
271			`{`
272			`memcpy_fromio(data, dev->readptr, len);`
273			`dev->readptr += len;`
274			`if (diff == 0)`
275			`dev->readptr = dev->sh_mem + BANK2;`
276			`}`
277			`}`
278
279
280			`#endif`
281
282
283
284
285
286
287