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199 |
simons |
/* Linux/68k Hydra Amiganet board driver v2.1 BETA */
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/* copyleft by Topi Kanerva (topi@susanna.oulu.fi) */
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/* also some code & lots of fixes by Timo Rossi (trossi@cc.jyu.fi) */
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/* The code is mostly based on the linux/68k Ariadne driver */
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/* copyrighted by Geert Uytterhoeven (Geert.Uytterhoeven@cs.kuleuven.ac.be) */
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/* and Peter De Schrijver (Peter.DeSchrijver@linux.cc.kuleuven.ac.be) */
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/* This file is subject to the terms and conditions of the GNU General */
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/* Public License. See the file COPYING in the main directory of the */
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/* Linux distribution for more details. */
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/* The Amiganet is a Zorro-II board made by Hydra Systems. It contains a */
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/* NS8390 NIC (network interface controller) clone, 16 or 64K on-board RAM */
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/* and 10BASE-2 (thin coax) and AUI connectors. */
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/malloc.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <asm/bitops.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/bootinfo.h>
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#include <asm/amigaints.h>
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#include <asm/amigahw.h>
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#include <asm/zorro.h>
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#include "hydra.h"
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#define HYDRA_DEBUG
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#undef HAVE_MULTICAST
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#define HYDRA_VERSION "v2.1 BETA"
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#undef HYDRA_DEBUG /* define this for (lots of) debugging information */
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#if 0 /* currently hardwired to one transmit buffer */
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#define TX_RING_SIZE 5
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#define RX_RING_SIZE 16
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#else
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#define TX_RING_SIZE 1
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#define RX_RING_SIZE 8
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#endif
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#define ETHER_MIN_LEN 64
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#define ETHER_MAX_LEN 1518
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#define ETHER_ADDR_LEN 6
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/*
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* let's define here nice macros for writing and reading NIC registers
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*
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* the CIA accesses here are uses to make sure the minimum time
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* requirement between NIC chip selects is met.
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*/
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#define WRITE_REG(reg, val) (ciaa.pra, ((u_char)(*(nicbase+(reg))=val)))
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#define READ_REG(reg) (ciaa.pra, ((u_char)(*(nicbase+(reg)))))
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/* mask value for the interrupts we use */
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#define NIC_INTS (ISR_PRX | ISR_PTX | ISR_RXE | ISR_TXE | ISR_OVW | ISR_CNT)
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/* only broadcasts, no promiscuous mode for now */
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#define NIC_RCRBITS (0)
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/*
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* Private Device Data
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*/
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struct hydra_private
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{
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u_char *hydra_base;
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u_char *hydra_nic_base;
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u_short tx_page_start;
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u_short rx_page_start;
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u_short rx_page_stop;
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u_short next_pkt;
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struct enet_statistics stats;
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int key;
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};
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static int hydra_open(struct device *dev);
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static int hydra_start_xmit(struct sk_buff *skb, struct device *dev);
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static void hydra_interrupt(int irq, struct pt_regs *fp, void *data);
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static void __inline__ hydra_rx(struct device *dev, struct hydra_private *priv, volatile u_char *nicbase);
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static int hydra_close(struct device *dev);
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static struct enet_statistics *hydra_get_stats(struct device *dev);
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#ifdef HAVE_MULTICAST
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static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
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#endif
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/* this is now coherent with the C version below, */
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/* compile the source with -D__USE_ASM__ if you */
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/* want it - it'll only be some 10% faster though */
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#if defined (__GNUC__) && defined (__mc68000__) && defined (USE_ASM)
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static __inline__ void *memcpyw(u_short *dest, u_short *src, int len)
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{
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__asm__(" move.l %0,%/a1; move.l %1,%/a0; move.l %2,%/d0 \n\t"
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" cmpi.l #2,%/d0 \n\t"
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"1: bcs.s 2f \n\t"
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" move.w %/a0@+,%/a1@+ \n\t"
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" subq.l #2,%/d0 \n\t"
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" bra.s 1b \n\t"
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"2: cmpi.l #1,%/d0 \n\t"
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" bne.s 3f \n\t"
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" move.w %/a0@,%/d0 \n\t"
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" swap.w %/d0 \n\t"
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" move.b %/d0,%/a1@ \n\t"
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"3: moveq #0,%/d0 \n\t"
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:
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: "g" (dest), "g" (src), "g" (len)
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: "a1", "a0", "d0");
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return;
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}
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#else
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/* hydra memory can only be read or written as words or longwords. */
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/* that will mean that we'll have to write a special memcpy for it. */
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/* this one here relies on the fact that _writes_ to hydra memory */
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/* are guaranteed to be of even length. (reads can be arbitrary) */
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static void memcpyw(u_short *dest, u_short *src, int len)
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{
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if(len & 1)
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len++;
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while (len >= 2) {
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*(dest++) = *(src++);
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len -= 2;
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}
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}
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#endif
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int hydra_probe(struct device *dev)
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{
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struct hydra_private *priv;
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u_long board;
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int key;
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struct ConfigDev *cd;
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int j;
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#ifdef HYDRA_DEBUG
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printk("hydra_probe(%x)\n", dev);
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#endif
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if ((key = zorro_find(MANUF_HYDRA_SYSTEMS, PROD_AMIGANET, 0, 0))) {
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cd = zorro_get_board(key);
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if((board = (u_long) cd->cd_BoardAddr))
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{
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for(j = 0; j < ETHER_ADDR_LEN; j++)
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dev->dev_addr[j] = *((u_char *)ZTWO_VADDR(board + HYDRA_ADDRPROM + 2*j));
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printk("%s: hydra at 0x%08x, address %02x:%02x:%02x:%02x:%02x:%02x (hydra.c " HYDRA_VERSION ")\n",
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dev->name, (int)board, dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
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dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
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init_etherdev(dev, 0);
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dev->priv = kmalloc(sizeof(struct hydra_private), GFP_KERNEL);
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priv = (struct hydra_private *)dev->priv;
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memset(priv, 0, sizeof(struct hydra_private));
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priv->hydra_base = (u_char *) ZTWO_VADDR(board);
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priv->hydra_nic_base = (u_char *) ZTWO_VADDR(board) + HYDRA_NIC_BASE;
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priv->key = key;
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dev->open = &hydra_open;
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dev->stop = &hydra_close;
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dev->hard_start_xmit = &hydra_start_xmit;
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dev->get_stats = &hydra_get_stats;
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#ifdef HAVE_MULTICAST
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dev->set_multicast_list = &hydra_set_multicast_list;
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#endif
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zorro_config_board(key, 0);
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return(0);
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}
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}
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return(ENODEV);
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}
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static int hydra_open(struct device *dev)
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{
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struct hydra_private *priv = (struct hydra_private *)dev->priv;
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volatile u_char *nicbase = priv->hydra_nic_base;
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#ifdef HAVE_MULTICAST
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int i;
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#endif
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#ifdef HYDRA_DEBUG
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printk("hydra_open(0x%x)\n", dev);
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#endif
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/* first, initialize the private structure */
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priv->tx_page_start = 0; /* these are 256 byte buffers for NS8390 */
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priv->rx_page_start = 6;
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priv->rx_page_stop = 62; /* these values are hard coded for now */
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/* Reset the NS8390 NIC */
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WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
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/* be sure that the NIC is in stopped state */
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while(!(READ_REG(NIC_ISR) & ISR_RST));
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/* word transfer, big endian bytes, loopback, FIFO threshold 4 bytes */
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WRITE_REG(NIC_DCR, DCR_WTS | DCR_BOS | DCR_LS | DCR_FT0);
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/* clear remote byte count registers */
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WRITE_REG(NIC_RBCR0, 0);
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WRITE_REG(NIC_RBCR1, 0);
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/* accept packets addressed to this card and also broadcast packets */
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WRITE_REG(NIC_RCR, NIC_RCRBITS);
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/* enable loopback mode 1 */
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WRITE_REG(NIC_TCR, TCR_LB1);
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/* initialize receive buffer ring */
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WRITE_REG(NIC_PSTART, priv->rx_page_start);
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WRITE_REG(NIC_PSTOP, priv->rx_page_stop);
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WRITE_REG(NIC_BNDRY, priv->rx_page_start);
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/* clear interrupts */
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WRITE_REG(NIC_ISR, 0xff);
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/* enable interrupts */
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WRITE_REG(NIC_IMR, NIC_INTS);
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/* set the ethernet hardware address */
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WRITE_REG(NIC_CR, CR_PAGE1 | CR_NODMA | CR_STOP); /* goto page 1 */
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WRITE_REG(NIC_PAR0, dev->dev_addr[0]);
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WRITE_REG(NIC_PAR1, dev->dev_addr[1]);
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WRITE_REG(NIC_PAR2, dev->dev_addr[2]);
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WRITE_REG(NIC_PAR3, dev->dev_addr[3]);
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WRITE_REG(NIC_PAR4, dev->dev_addr[4]);
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WRITE_REG(NIC_PAR5, dev->dev_addr[5]);
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#ifdef HAVE_MULTICAST
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/* clear multicast hash table */
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for(i = 0; i < 8; i++)
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WRITE_REG(NIC_MAR0 + 2*i, 0);
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#endif
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priv->next_pkt = priv->rx_page_start+1; /* init our s/w variable */
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WRITE_REG(NIC_CURR, priv->next_pkt); /* set the next buf for current */
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/* goto page 0, start NIC */
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WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
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/* take interface out of loopback */
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WRITE_REG(NIC_TCR, 0);
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dev->tbusy = 0;
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dev->interrupt = 0;
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dev->start = 1;
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if(!add_isr(IRQ_AMIGA_PORTS, hydra_interrupt, 0, dev, "Hydra Ethernet"))
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return(-EAGAIN);
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MOD_INC_USE_COUNT;
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return(0);
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}
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static int hydra_close(struct device *dev)
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{
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struct hydra_private *priv = (struct hydra_private *)dev->priv;
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volatile u_char *nicbase = priv->hydra_nic_base;
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int n = 5000;
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dev->start = 0;
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dev->tbusy = 1;
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#ifdef HYDRA_DEBUG
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printk("%s: Shutting down ethercard\n", dev->name);
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printk("%s: %d packets missed\n", dev->name, priv->stats.rx_missed_errors);
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#endif
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WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
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300 |
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/* wait for NIC to stop (what a nice timeout..) */
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while(((READ_REG(NIC_ISR) & ISR_RST) == 0) && --n);
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remove_isr(IRQ_AMIGA_PORTS, hydra_interrupt, dev);
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MOD_DEC_USE_COUNT;
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307 |
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return(0);
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}
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309 |
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310 |
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311 |
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static void hydra_interrupt(int irq, struct pt_regs *fp, void *data)
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{
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volatile u_char *nicbase;
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315 |
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struct device *dev = (struct device *) data;
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struct hydra_private *priv;
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u_short intbits;
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if(dev == NULL)
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{
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printk("hydra_interrupt(): irq for unknown device\n");
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return;
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}
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324 |
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/* this is not likely a problem - i think */
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if(dev->interrupt)
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printk("%s: re-entering the interrupt handler\n", dev->name);
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dev->interrupt = 1;
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priv = (struct hydra_private *) dev->priv;
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nicbase = (u_char *) priv->hydra_nic_base;
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333 |
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334 |
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/* select page 0 */
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WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
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337 |
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intbits = READ_REG(NIC_ISR) & NIC_INTS;
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338 |
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if(intbits == 0)
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{
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340 |
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dev->interrupt = 0;
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341 |
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return;
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342 |
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}
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343 |
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344 |
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/* acknowledge all interrupts, by clearing the interrupt flag */
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345 |
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WRITE_REG(NIC_ISR, intbits);
|
346 |
|
|
|
347 |
|
|
if((intbits & ISR_PTX) && !(intbits & ISR_TXE))
|
348 |
|
|
{
|
349 |
|
|
dev->tbusy = 0;
|
350 |
|
|
mark_bh(NET_BH);
|
351 |
|
|
}
|
352 |
|
|
|
353 |
|
|
if((intbits & ISR_PRX) && !(intbits & ISR_RXE))/* packet received OK */
|
354 |
|
|
hydra_rx(dev, priv, nicbase);
|
355 |
|
|
|
356 |
|
|
if(intbits & ISR_TXE)
|
357 |
|
|
priv->stats.tx_errors++;
|
358 |
|
|
|
359 |
|
|
if(intbits & ISR_RXE)
|
360 |
|
|
priv->stats.rx_errors++;
|
361 |
|
|
|
362 |
|
|
if(intbits & ISR_CNT) {
|
363 |
|
|
/*
|
364 |
|
|
* read the tally counters and (currently) ignore the values
|
365 |
|
|
* might be useful because of bugs of some versions of the 8390 NIC
|
366 |
|
|
*/
|
367 |
|
|
#ifdef HYDRA_DEBUG
|
368 |
|
|
printk("hydra_interrupt(): ISR_CNT\n");
|
369 |
|
|
#endif
|
370 |
|
|
(void)READ_REG(NIC_CNTR0);
|
371 |
|
|
(void)READ_REG(NIC_CNTR1);
|
372 |
|
|
(void)READ_REG(NIC_CNTR2);
|
373 |
|
|
}
|
374 |
|
|
|
375 |
|
|
if(intbits & ISR_OVW)
|
376 |
|
|
{
|
377 |
|
|
#ifdef HYDRA_DEBUG
|
378 |
|
|
WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
|
379 |
|
|
/* another one just too much for me to comprehend - basically this could */
|
380 |
|
|
/* only occur because of invalid access to hydra ram, thus invalidating */
|
381 |
|
|
/* the interrupt bits read - in average usage these do not occur at all */
|
382 |
|
|
printk("hydra_interrupt(): overwrite warning, NIC_ISR %02x, NIC_CURR %02x\n",
|
383 |
|
|
intbits, READ_REG(NIC_CURR));
|
384 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
|
385 |
|
|
#endif
|
386 |
|
|
|
387 |
|
|
|
388 |
|
|
/* overwrite warning occurred, stop NIC & check the BOUNDARY pointer */
|
389 |
|
|
/* FIXME - real overwrite handling needed !! */
|
390 |
|
|
|
391 |
|
|
printk("hydra_interrupt(): overwrite warning, resetting NIC\n");
|
392 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_STOP);
|
393 |
|
|
while(!(READ_REG(NIC_ISR) & ISR_RST));
|
394 |
|
|
/* wait for NIC to reset */
|
395 |
|
|
WRITE_REG(NIC_DCR, DCR_WTS | DCR_BOS | DCR_LS | DCR_FT0);
|
396 |
|
|
WRITE_REG(NIC_RBCR0, 0);
|
397 |
|
|
WRITE_REG(NIC_RBCR1, 0);
|
398 |
|
|
WRITE_REG(NIC_RCR, NIC_RCRBITS);
|
399 |
|
|
WRITE_REG(NIC_TCR, TCR_LB1);
|
400 |
|
|
WRITE_REG(NIC_PSTART, priv->rx_page_start);
|
401 |
|
|
WRITE_REG(NIC_PSTOP, priv->rx_page_stop);
|
402 |
|
|
WRITE_REG(NIC_BNDRY, priv->rx_page_start);
|
403 |
|
|
WRITE_REG(NIC_ISR, 0xff);
|
404 |
|
|
WRITE_REG(NIC_IMR, NIC_INTS);
|
405 |
|
|
/* currently this _won't_ reset my hydra, even though it is */
|
406 |
|
|
/* basically the same code as in the board init - any ideas? */
|
407 |
|
|
|
408 |
|
|
priv->next_pkt = priv->rx_page_start+1; /* init our s/w variable */
|
409 |
|
|
WRITE_REG(NIC_CURR, priv->next_pkt); /* set the next buf for current */
|
410 |
|
|
|
411 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
|
412 |
|
|
|
413 |
|
|
WRITE_REG(NIC_TCR, 0);
|
414 |
|
|
}
|
415 |
|
|
|
416 |
|
|
dev->interrupt = 0;
|
417 |
|
|
return;
|
418 |
|
|
}
|
419 |
|
|
|
420 |
|
|
|
421 |
|
|
/*
|
422 |
|
|
* packet transmit routine
|
423 |
|
|
*/
|
424 |
|
|
static int hydra_start_xmit(struct sk_buff *skb, struct device *dev)
|
425 |
|
|
{
|
426 |
|
|
struct hydra_private *priv = (struct hydra_private *)dev->priv;
|
427 |
|
|
volatile u_char *nicbase = priv->hydra_nic_base;
|
428 |
|
|
int len, len1;
|
429 |
|
|
|
430 |
|
|
/* Transmitter timeout, serious problems. */
|
431 |
|
|
|
432 |
|
|
if(dev->tbusy)
|
433 |
|
|
{
|
434 |
|
|
int tickssofar = jiffies - dev->trans_start;
|
435 |
|
|
if(tickssofar < 20)
|
436 |
|
|
return(1);
|
437 |
|
|
WRITE_REG(NIC_CR, CR_STOP);
|
438 |
|
|
printk("%s: transmit timed out, status %4.4x, resetting.\n", dev->name, 0);
|
439 |
|
|
priv->stats.tx_errors++;
|
440 |
|
|
|
441 |
|
|
|
442 |
|
|
dev->tbusy = 0;
|
443 |
|
|
dev->trans_start = jiffies;
|
444 |
|
|
dev_kfree_skb(skb, FREE_WRITE);
|
445 |
|
|
return(0);
|
446 |
|
|
}
|
447 |
|
|
|
448 |
|
|
|
449 |
|
|
if(skb == NULL)
|
450 |
|
|
{
|
451 |
|
|
dev_tint(dev);
|
452 |
|
|
return(0);
|
453 |
|
|
}
|
454 |
|
|
|
455 |
|
|
if((len = skb->len) <= 0)
|
456 |
|
|
return(0);
|
457 |
|
|
|
458 |
|
|
/* fill in a tx ring entry */
|
459 |
|
|
|
460 |
|
|
#ifdef HYDRA_DEBUG
|
461 |
|
|
printk("TX pkt type 0x%04x from ", ((u_short *)skb->data)[6]);
|
462 |
|
|
{
|
463 |
|
|
int i;
|
464 |
|
|
u_char *ptr = &((u_char *)skb->data)[6];
|
465 |
|
|
for (i = 0; i < 6; i++)
|
466 |
|
|
printk("%02x", ptr[i]);
|
467 |
|
|
}
|
468 |
|
|
printk(" to ");
|
469 |
|
|
{
|
470 |
|
|
int i;
|
471 |
|
|
u_char *ptr = (u_char *)skb->data;
|
472 |
|
|
for (i = 0; i < 6; i++)
|
473 |
|
|
printk("%02x", ptr[i]);
|
474 |
|
|
}
|
475 |
|
|
printk(" data 0x%08x len %d\n", (int)skb->data, len);
|
476 |
|
|
#endif
|
477 |
|
|
|
478 |
|
|
/*
|
479 |
|
|
* make sure that the packet size is at least the minimum
|
480 |
|
|
* allowed ethernet packet length.
|
481 |
|
|
* (possibly should also clear the unused space...)
|
482 |
|
|
* note: minimum packet length is 64, including CRC
|
483 |
|
|
*/
|
484 |
|
|
len1 = len;
|
485 |
|
|
if(len < (ETHER_MIN_LEN-4))
|
486 |
|
|
len = (ETHER_MIN_LEN-1);
|
487 |
|
|
|
488 |
|
|
/* make sure we've got an even number of bytes to copy to hydra's mem */
|
489 |
|
|
if(len & 1) len++;
|
490 |
|
|
|
491 |
|
|
if((u_long)(priv->hydra_base + (priv->tx_page_start << 8)) < 0x80000000)
|
492 |
|
|
printk("weirdness: memcpyw(txbuf, skbdata, len): txbuf = 0x%x\n", (u_int)(priv->hydra_base+(priv->tx_page_start<<8)));
|
493 |
|
|
|
494 |
|
|
/* copy the packet data to the transmit buffer
|
495 |
|
|
in the ethernet card RAM */
|
496 |
|
|
memcpyw((u_short *)(priv->hydra_base + (priv->tx_page_start << 8)),
|
497 |
|
|
(u_short *)skb->data, len);
|
498 |
|
|
/* clear the unused space */
|
499 |
|
|
/* for(; len1<len; len1++)
|
500 |
|
|
(u_short)*(priv->hydra_base + (priv->tx_page_start<<8) + len1) = 0;
|
501 |
|
|
*/
|
502 |
|
|
dev_kfree_skb(skb, FREE_WRITE);
|
503 |
|
|
|
504 |
|
|
priv->stats.tx_packets++;
|
505 |
|
|
|
506 |
|
|
cli();
|
507 |
|
|
/* make sure we are on the correct page */
|
508 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_NODMA | CR_START);
|
509 |
|
|
|
510 |
|
|
/* here we configure the transmit page start register etc */
|
511 |
|
|
/* notice that this code is hardwired to one transmit buffer */
|
512 |
|
|
WRITE_REG(NIC_TPSR, priv->tx_page_start);
|
513 |
|
|
WRITE_REG(NIC_TBCR0, len & 0xff);
|
514 |
|
|
WRITE_REG(NIC_TBCR1, len >> 8);
|
515 |
|
|
|
516 |
|
|
/* commit the packet to the wire */
|
517 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA | CR_TXP);
|
518 |
|
|
sti();
|
519 |
|
|
|
520 |
|
|
dev->trans_start = jiffies;
|
521 |
|
|
|
522 |
|
|
return(0);
|
523 |
|
|
}
|
524 |
|
|
|
525 |
|
|
|
526 |
|
|
static void __inline__ hydra_rx(struct device *dev, struct hydra_private *priv, volatile u_char *nicbase)
|
527 |
|
|
{
|
528 |
|
|
volatile u_short *board_ram_ptr;
|
529 |
|
|
struct sk_buff *skb;
|
530 |
|
|
int hdr_next_pkt, pkt_len, len1, boundary;
|
531 |
|
|
|
532 |
|
|
|
533 |
|
|
/* remove packet(s) from the ring and commit them to TCP layer */
|
534 |
|
|
WRITE_REG(NIC_CR, CR_PAGE1 | CR_NODMA | CR_START); /* page 1 */
|
535 |
|
|
while(priv->next_pkt != READ_REG(NIC_CURR)) /* should read this only once? */
|
536 |
|
|
{
|
537 |
|
|
board_ram_ptr = (u_short *)(priv->hydra_base + (priv->next_pkt << 8));
|
538 |
|
|
|
539 |
|
|
#ifdef HYDRA_DEBUG
|
540 |
|
|
printk("next_pkt = 0x%x, board_ram_ptr = 0x%x\n", priv->next_pkt, board_ram_ptr);
|
541 |
|
|
#endif
|
542 |
|
|
|
543 |
|
|
/* the following must be done with two steps, or
|
544 |
|
|
GCC optimizes it to a byte access to Hydra memory,
|
545 |
|
|
which doesn't work... */
|
546 |
|
|
hdr_next_pkt = board_ram_ptr[0];
|
547 |
|
|
hdr_next_pkt >>= 8;
|
548 |
|
|
|
549 |
|
|
pkt_len = board_ram_ptr[1];
|
550 |
|
|
pkt_len = ((pkt_len >> 8) | ((pkt_len & 0xff) << 8));
|
551 |
|
|
|
552 |
|
|
#ifdef HYDRA_DEBUG
|
553 |
|
|
printk("hydra_interrupt(): hdr_next_pkt = 0x%02x, len = %d\n", hdr_next_pkt, pkt_len);
|
554 |
|
|
#endif
|
555 |
|
|
|
556 |
|
|
if(pkt_len >= ETHER_MIN_LEN && pkt_len <= ETHER_MAX_LEN)
|
557 |
|
|
{
|
558 |
|
|
/* note that board_ram_ptr is u_short */
|
559 |
|
|
/* CRC is not included in the packet length */
|
560 |
|
|
|
561 |
|
|
pkt_len -= 4;
|
562 |
|
|
skb = dev_alloc_skb(pkt_len+2);
|
563 |
|
|
if(skb == NULL)
|
564 |
|
|
{
|
565 |
|
|
printk("%s: memory squeeze, dropping packet.\n", dev->name);
|
566 |
|
|
priv->stats.rx_dropped++;
|
567 |
|
|
}
|
568 |
|
|
else
|
569 |
|
|
{
|
570 |
|
|
skb->dev = dev;
|
571 |
|
|
skb_reserve(skb, 2);
|
572 |
|
|
|
573 |
|
|
if(hdr_next_pkt < priv->next_pkt && hdr_next_pkt != priv->rx_page_start)
|
574 |
|
|
{
|
575 |
|
|
/* here, the packet is wrapped */
|
576 |
|
|
len1 = ((priv->rx_page_stop - priv->next_pkt)<<8)-4;
|
577 |
|
|
|
578 |
|
|
memcpyw((u_short *)skb_put(skb, len1), (u_short *)(board_ram_ptr+2), len1);
|
579 |
|
|
memcpyw((u_short *)skb_put(skb, pkt_len-len1), (u_short *)(priv->hydra_base+(priv->rx_page_start<<8)), pkt_len-len1);
|
580 |
|
|
|
581 |
|
|
#ifdef HYDRA_DEBUG
|
582 |
|
|
printk("wrapped packet: %d/%d bytes\n", len1, pkt_len-len1);
|
583 |
|
|
#endif
|
584 |
|
|
} /* ... here, packet is not wrapped */
|
585 |
|
|
else memcpyw((u_short *) skb_put(skb, pkt_len), (u_short *)(board_ram_ptr+2), pkt_len);
|
586 |
|
|
}
|
587 |
|
|
/* if(skb == NULL) ... */
|
588 |
|
|
}
|
589 |
|
|
else
|
590 |
|
|
{
|
591 |
|
|
WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
|
592 |
|
|
printk("hydra_interrupt(): invalid packet len: %d, NIC_CURR = %02x\n", pkt_len, READ_REG(NIC_CURR));
|
593 |
|
|
/*
|
594 |
|
|
this is the error i kept getting until i switched to 0.9.10. it still doesn't
|
595 |
|
|
mean that the bug would have gone away - so be alarmed. the packet is likely
|
596 |
|
|
being fetched from a wrong memory location - but why - dunno
|
597 |
|
|
|
598 |
|
|
note-for-v2.1: not really problem anymore. hasn't been for a long time.
|
599 |
|
|
*/
|
600 |
|
|
|
601 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
|
602 |
|
|
/* should probably reset the NIC here ?? */
|
603 |
|
|
|
604 |
|
|
hydra_open(dev); /* FIXME - i shouldn't really be doing this. */
|
605 |
|
|
return;
|
606 |
|
|
}
|
607 |
|
|
|
608 |
|
|
/* now, update the next_pkt pointer */
|
609 |
|
|
if(hdr_next_pkt < priv->rx_page_stop) priv->next_pkt = hdr_next_pkt;
|
610 |
|
|
else printk("hydra_interrupt(): invalid next_pkt pointer %d\n", hdr_next_pkt);
|
611 |
|
|
|
612 |
|
|
/* update the boundary pointer */
|
613 |
|
|
boundary = priv->next_pkt - 1;
|
614 |
|
|
if(boundary < priv->rx_page_start)
|
615 |
|
|
boundary = priv->rx_page_stop - 1;
|
616 |
|
|
|
617 |
|
|
/* set NIC to page 0 to update the NIC_BNDRY register */
|
618 |
|
|
WRITE_REG(NIC_CR, CR_PAGE0 | CR_START | CR_NODMA);
|
619 |
|
|
WRITE_REG(NIC_BNDRY, boundary);
|
620 |
|
|
|
621 |
|
|
/* select page1 to access the NIC_CURR register */
|
622 |
|
|
WRITE_REG(NIC_CR, CR_PAGE1 | CR_START | CR_NODMA);
|
623 |
|
|
|
624 |
|
|
|
625 |
|
|
skb->protocol = eth_type_trans(skb, dev);
|
626 |
|
|
netif_rx(skb);
|
627 |
|
|
priv->stats.rx_packets++;
|
628 |
|
|
|
629 |
|
|
}
|
630 |
|
|
return;
|
631 |
|
|
}
|
632 |
|
|
|
633 |
|
|
|
634 |
|
|
static struct enet_statistics *hydra_get_stats(struct device *dev)
|
635 |
|
|
{
|
636 |
|
|
struct hydra_private *priv = (struct hydra_private *)dev->priv;
|
637 |
|
|
#if 0
|
638 |
|
|
u_char *board = priv->hydra_base;
|
639 |
|
|
|
640 |
|
|
short saved_addr;
|
641 |
|
|
#endif
|
642 |
|
|
/* currently does nothing :) i'll finish this later */
|
643 |
|
|
|
644 |
|
|
return(&priv->stats);
|
645 |
|
|
}
|
646 |
|
|
|
647 |
|
|
#ifdef HAVE_MULTICAST
|
648 |
|
|
static void set_multicast_list(struct device *dev, int num_addrs, void *addrs)
|
649 |
|
|
{
|
650 |
|
|
struct hydra_private *priv = (struct hydra_private *)dev->priv;
|
651 |
|
|
u_char *board = priv->hydra_base;
|
652 |
|
|
|
653 |
|
|
/* yes, this code is also waiting for someone to complete.. :) */
|
654 |
|
|
/* (personally i don't care about multicasts at all :) */
|
655 |
|
|
return;
|
656 |
|
|
}
|
657 |
|
|
#endif
|
658 |
|
|
|
659 |
|
|
|
660 |
|
|
#ifdef MODULE
|
661 |
|
|
static char devicename[9] = { 0, };
|
662 |
|
|
|
663 |
|
|
static struct device hydra_dev =
|
664 |
|
|
{
|
665 |
|
|
devicename, /* filled in by register_netdev() */
|
666 |
|
|
0, 0, 0, 0, /* memory */
|
667 |
|
|
0, 0, /* base, irq */
|
668 |
|
|
0, 0, 0, NULL, hydra_probe,
|
669 |
|
|
};
|
670 |
|
|
|
671 |
|
|
int init_module(void)
|
672 |
|
|
{
|
673 |
|
|
int err;
|
674 |
|
|
|
675 |
|
|
if ((err = register_netdev(&hydra_dev))) {
|
676 |
|
|
if (err == -EIO)
|
677 |
|
|
printk("No Hydra board found. Module not loaded.\n");
|
678 |
|
|
return(err);
|
679 |
|
|
}
|
680 |
|
|
return(0);
|
681 |
|
|
}
|
682 |
|
|
|
683 |
|
|
void cleanup_module(void)
|
684 |
|
|
{
|
685 |
|
|
struct hydra_private *priv = (struct hydra_private *)hydra_dev.priv;
|
686 |
|
|
|
687 |
|
|
unregister_netdev(&hydra_dev);
|
688 |
|
|
zorro_unconfig_board(priv->key, 0);
|
689 |
|
|
kfree(priv);
|
690 |
|
|
}
|
691 |
|
|
|
692 |
|
|
#endif /* MODULE */
|