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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [alpha/] [kernel/] [ns87312.c] - Blame information for rev 3

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Line No. Rev Author Line
1 3 xianfeng
/*
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 *      linux/arch/alpha/kernel/ns87312.c
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 */
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#include <linux/init.h>
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#include <asm/io.h>
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#include "proto.h"
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/*
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 * The SRM console *disables* the IDE interface, this code ensures it's
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 * enabled.
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 *
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 * This code bangs on a control register of the 87312 Super I/O chip
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 * that implements parallel port/serial ports/IDE/FDI.  Depending on
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 * the motherboard, the Super I/O chip can be configured through a
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 * pair of registers that are located either at I/O ports 0x26e/0x26f
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 * or 0x398/0x399.  Unfortunately, autodetecting which base address is
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 * in use works only once (right after a reset).  The Super I/O chip
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 * has the additional quirk that configuration register data must be
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 * written twice (I believe this is a safety feature to prevent
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 * accidental modification---fun, isn't it?).
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 */
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void __init
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ns87312_enable_ide(long ide_base)
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{
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        int data;
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        unsigned long flags;
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        local_irq_save(flags);
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        outb(0, ide_base);               /* set the index register for reg #0 */
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        data = inb(ide_base+1);         /* read the current contents */
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        outb(0, ide_base);               /* set the index register for reg #0 */
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        outb(data | 0x40, ide_base+1);  /* turn on IDE */
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        outb(data | 0x40, ide_base+1);  /* turn on IDE, really! */
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        local_irq_restore(flags);
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}

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