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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [arm/] [mach-at91/] [at91sam9261.c] - Blame information for rev 3

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1 3 xianfeng
/*
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 * arch/arm/mach-at91/at91sam9261.c
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 *
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 *  Copyright (C) 2005 SAN People
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 */
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#include <linux/module.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/arch/at91sam9261.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_rstc.h>
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#include "generic.h"
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#include "clock.h"
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static struct map_desc at91sam9261_io_desc[] __initdata = {
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        {
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                .virtual        = AT91_VA_BASE_SYS,
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                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
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                .length         = SZ_16K,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
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                .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
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                .length         = AT91SAM9261_SRAM_SIZE,
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                .type           = MT_DEVICE,
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        },
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};
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/* --------------------------------------------------------------------
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 *  Clocks
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 * -------------------------------------------------------------------- */
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/*
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 * The peripheral clocks.
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 */
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static struct clk pioA_clk = {
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        .name           = "pioA_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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        .name           = "pioB_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioC_clk = {
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        .name           = "pioC_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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        .name           = "usart0_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_US0,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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        .name           = "usart1_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_US1,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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        .name           = "usart2_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_US2,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc_clk = {
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        .name           = "mci_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udc_clk = {
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        .name           = "udc_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi_clk = {
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        .name           = "twi_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi0_clk = {
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        .name           = "spi0_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi1_clk = {
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        .name           = "spi1_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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        .name           = "ssc0_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_SSC0,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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        .name           = "ssc1_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_SSC1,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc2_clk = {
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        .name           = "ssc2_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_SSC2,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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        .name           = "tc0_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_TC0,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc1_clk = {
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        .name           = "tc1_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_TC1,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc2_clk = {
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        .name           = "tc2_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_TC2,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ohci_clk = {
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        .name           = "ohci_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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        .name           = "lcdc_clk",
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        .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
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        .type           = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] __initdata = {
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        &pioA_clk,
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        &pioB_clk,
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        &pioC_clk,
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        &usart0_clk,
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        &usart1_clk,
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        &usart2_clk,
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        &mmc_clk,
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        &udc_clk,
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        &twi_clk,
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        &spi0_clk,
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        &spi1_clk,
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        &ssc0_clk,
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        &ssc1_clk,
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        &ssc2_clk,
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        &tc0_clk,
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        &tc1_clk,
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        &tc2_clk,
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        &ohci_clk,
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        &lcdc_clk,
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        // irq0 .. irq2
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};
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/*
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 * The four programmable clocks.
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 * You must configure pin multiplexing to bring these signals out.
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 */
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static struct clk pck0 = {
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        .name           = "pck0",
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        .pmc_mask       = AT91_PMC_PCK0,
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        .type           = CLK_TYPE_PROGRAMMABLE,
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        .id             = 0,
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};
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static struct clk pck1 = {
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        .name           = "pck1",
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        .pmc_mask       = AT91_PMC_PCK1,
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        .type           = CLK_TYPE_PROGRAMMABLE,
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        .id             = 1,
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};
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static struct clk pck2 = {
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        .name           = "pck2",
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        .pmc_mask       = AT91_PMC_PCK2,
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        .type           = CLK_TYPE_PROGRAMMABLE,
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        .id             = 2,
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};
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static struct clk pck3 = {
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        .name           = "pck3",
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        .pmc_mask       = AT91_PMC_PCK3,
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        .type           = CLK_TYPE_PROGRAMMABLE,
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        .id             = 3,
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};
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/* HClocks */
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static struct clk hck0 = {
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        .name           = "hck0",
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        .pmc_mask       = AT91_PMC_HCK0,
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        .type           = CLK_TYPE_SYSTEM,
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        .id             = 0,
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};
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static struct clk hck1 = {
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        .name           = "hck1",
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        .pmc_mask       = AT91_PMC_HCK1,
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        .type           = CLK_TYPE_SYSTEM,
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        .id             = 1,
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};
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static void __init at91sam9261_register_clocks(void)
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{
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        int i;
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        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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                clk_register(periph_clocks[i]);
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        clk_register(&pck0);
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        clk_register(&pck1);
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        clk_register(&pck2);
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        clk_register(&pck3);
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        clk_register(&hck0);
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        clk_register(&hck1);
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}
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/* --------------------------------------------------------------------
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 *  GPIO
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 * -------------------------------------------------------------------- */
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static struct at91_gpio_bank at91sam9261_gpio[] = {
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        {
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                .id             = AT91SAM9261_ID_PIOA,
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                .offset         = AT91_PIOA,
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                .clock          = &pioA_clk,
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        }, {
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                .id             = AT91SAM9261_ID_PIOB,
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                .offset         = AT91_PIOB,
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                .clock          = &pioB_clk,
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        }, {
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                .id             = AT91SAM9261_ID_PIOC,
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                .offset         = AT91_PIOC,
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                .clock          = &pioC_clk,
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        }
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};
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static void at91sam9261_reset(void)
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{
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        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
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}
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/* --------------------------------------------------------------------
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 *  AT91SAM9261 processor initialization
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 * -------------------------------------------------------------------- */
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void __init at91sam9261_initialize(unsigned long main_clock)
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{
255
        /* Map peripherals */
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        iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
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        at91_arch_reset = at91sam9261_reset;
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        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
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                        | (1 << AT91SAM9261_ID_IRQ2);
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        /* Init clock subsystem */
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        at91_clock_init(main_clock);
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        /* Register the processor-specific clocks */
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        at91sam9261_register_clocks();
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        /* Register GPIO subsystem */
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        at91_gpio_init(at91sam9261_gpio, 3);
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}
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/* --------------------------------------------------------------------
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 *  Interrupt initialization
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 * -------------------------------------------------------------------- */
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/*
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 * The default interrupt priority levels (0 = lowest, 7 = highest).
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 */
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static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
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        7,      /* Advanced Interrupt Controller */
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        7,      /* System Peripherals */
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        0,       /* Parallel IO Controller A */
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        0,       /* Parallel IO Controller B */
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        0,       /* Parallel IO Controller C */
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        0,
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        6,      /* USART 0 */
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        6,      /* USART 1 */
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        6,      /* USART 2 */
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        0,       /* Multimedia Card Interface */
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        4,      /* USB Device Port */
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        0,       /* Two-Wire Interface */
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        6,      /* Serial Peripheral Interface 0 */
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        6,      /* Serial Peripheral Interface 1 */
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        5,      /* Serial Synchronous Controller 0 */
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        5,      /* Serial Synchronous Controller 1 */
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        5,      /* Serial Synchronous Controller 2 */
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        0,       /* Timer Counter 0 */
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        0,       /* Timer Counter 1 */
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        0,       /* Timer Counter 2 */
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        3,      /* USB Host port */
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        3,      /* LCD Controller */
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        0,
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        0,
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        0,
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        0,
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        0,
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        0,
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        0,
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        0,       /* Advanced Interrupt Controller */
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        0,       /* Advanced Interrupt Controller */
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        0,       /* Advanced Interrupt Controller */
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};
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void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
315
{
316
        if (!priority)
317
                priority = at91sam9261_default_irq_priority;
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319
        /* Initialize the AIC interrupt controller */
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        at91_aic_init(priority);
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        /* Enable GPIO interrupts */
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        at91_gpio_irq_setup();
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}

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