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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [arm/] [mach-footbridge/] [common.c] - Blame information for rev 3

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Line No. Rev Author Line
1 3 xianfeng
/*
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 *  linux/arch/arm/mach-footbridge/common.c
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 *
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 *  Copyright (C) 1998-2000 Russell King, Dave Gilbert.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 */
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/setup.h>
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#include <asm/hardware/dec21285.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include "common.h"
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extern void __init isa_init_irq(unsigned int irq);
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unsigned int mem_fclk_21285 = 50000000;
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EXPORT_SYMBOL(mem_fclk_21285);
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static int __init parse_tag_memclk(const struct tag *tag)
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{
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        mem_fclk_21285 = tag->u.memclk.fmemclk;
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        return 0;
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}
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__tagtable(ATAG_MEMCLK, parse_tag_memclk);
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/*
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 * Footbridge IRQ translation table
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 *  Converts from our IRQ numbers into FootBridge masks
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 */
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static const int fb_irq_mask[] = {
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        IRQ_MASK_UART_RX,       /*  0 */
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        IRQ_MASK_UART_TX,       /*  1 */
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        IRQ_MASK_TIMER1,        /*  2 */
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        IRQ_MASK_TIMER2,        /*  3 */
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        IRQ_MASK_TIMER3,        /*  4 */
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        IRQ_MASK_IN0,           /*  5 */
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        IRQ_MASK_IN1,           /*  6 */
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        IRQ_MASK_IN2,           /*  7 */
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        IRQ_MASK_IN3,           /*  8 */
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        IRQ_MASK_DOORBELLHOST,  /*  9 */
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        IRQ_MASK_DMA1,          /* 10 */
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        IRQ_MASK_DMA2,          /* 11 */
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        IRQ_MASK_PCI,           /* 12 */
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        IRQ_MASK_SDRAMPARITY,   /* 13 */
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        IRQ_MASK_I2OINPOST,     /* 14 */
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        IRQ_MASK_PCI_ABORT,     /* 15 */
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        IRQ_MASK_PCI_SERR,      /* 16 */
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        IRQ_MASK_DISCARD_TIMER, /* 17 */
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        IRQ_MASK_PCI_DPERR,     /* 18 */
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        IRQ_MASK_PCI_PERR,      /* 19 */
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};
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static void fb_mask_irq(unsigned int irq)
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{
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        *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
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}
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static void fb_unmask_irq(unsigned int irq)
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{
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        *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
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}
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static struct irq_chip fb_chip = {
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        .ack    = fb_mask_irq,
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        .mask   = fb_mask_irq,
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        .unmask = fb_unmask_irq,
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};
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static void __init __fb_init_irq(void)
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{
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        unsigned int irq;
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        /*
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         * setup DC21285 IRQs
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         */
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        *CSR_IRQ_DISABLE = -1;
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        *CSR_FIQ_DISABLE = -1;
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        for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
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                set_irq_chip(irq, &fb_chip);
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                set_irq_handler(irq, handle_level_irq);
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                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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        }
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}
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void __init footbridge_init_irq(void)
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{
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        __fb_init_irq();
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        if (!footbridge_cfn_mode())
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                return;
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        if (machine_is_ebsa285())
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                /* The following is dependent on which slot
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                 * you plug the Southbridge card into.  We
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                 * currently assume that you plug it into
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                 * the right-hand most slot.
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                 */
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                isa_init_irq(IRQ_PCI);
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        if (machine_is_cats())
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                isa_init_irq(IRQ_IN2);
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        if (machine_is_netwinder())
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                isa_init_irq(IRQ_IN3);
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}
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/*
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 * Common mapping for all systems.  Note that the outbound write flush is
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 * commented out since there is a "No Fix" problem with it.  Not mapping
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 * it means that we have extra bullet protection on our feet.
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 */
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static struct map_desc fb_common_io_desc[] __initdata = {
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        {
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                .virtual        = ARMCSR_BASE,
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                .pfn            = __phys_to_pfn(DC21285_ARMCSR_BASE),
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                .length         = ARMCSR_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = XBUS_BASE,
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                .pfn            = __phys_to_pfn(0x40000000),
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                .length         = XBUS_SIZE,
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                .type           = MT_DEVICE,
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        }
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};
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/*
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 * The mapping when the footbridge is in host mode.  We don't map any of
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 * this when we are in add-in mode.
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 */
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static struct map_desc ebsa285_host_io_desc[] __initdata = {
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#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
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        {
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                .virtual        = PCIMEM_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_MEM),
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                .length         = PCIMEM_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = PCICFG0_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
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                .length         = PCICFG0_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = PCICFG1_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
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                .length         = PCICFG1_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = PCIIACK_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_IACK),
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                .length         = PCIIACK_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = PCIO_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_IO),
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                .length         = PCIO_SIZE,
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                .type           = MT_DEVICE,
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        },
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#endif
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};
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/*
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 * The CO-ebsa285 mapping.
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 */
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static struct map_desc co285_io_desc[] __initdata = {
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#ifdef CONFIG_ARCH_CO285
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        {
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                .virtual        = PCIO_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_IO),
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                .length         = PCIO_SIZE,
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                .type           = MT_DEVICE,
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        }, {
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                .virtual        = PCIMEM_BASE,
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                .pfn            = __phys_to_pfn(DC21285_PCI_MEM),
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                .length         = PCIMEM_SIZE,
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                .type           = MT_DEVICE,
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        },
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#endif
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};
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void __init footbridge_map_io(void)
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{
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        /*
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         * Set up the common mapping first; we need this to
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         * determine whether we're in host mode or not.
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         */
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        iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
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        /*
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         * Now, work out what we've got to map in addition on this
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         * platform.
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         */
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        if (machine_is_co285())
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                iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
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        if (footbridge_cfn_mode())
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                iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
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}
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#ifdef CONFIG_FOOTBRIDGE_ADDIN
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/*
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 * These two functions convert virtual addresses to PCI addresses and PCI
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 * addresses to virtual addresses.  Note that it is only legal to use these
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 * on memory obtained via get_zeroed_page or kmalloc.
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 */
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unsigned long __virt_to_bus(unsigned long res)
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{
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        WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
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        return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
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}
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EXPORT_SYMBOL(__virt_to_bus);
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unsigned long __bus_to_virt(unsigned long res)
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{
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        res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
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        res += PAGE_OFFSET;
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        WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
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        return res;
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}
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EXPORT_SYMBOL(__bus_to_virt);
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#endif

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