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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [frv/] [kernel/] [irq-mb93093.c] - Blame information for rev 3

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1 3 xianfeng
/* irq-mb93093.c: MB93093 FPGA interrupt handling
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 *
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 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
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 * Written by David Howells (dhowells@redhat.com)
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version
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 * 2 of the License, or (at your option) any later version.
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 */
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/bitops.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/delay.h>
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#include <asm/irq.h>
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#include <asm/irc-regs.h>
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#define __reg16(ADDR) (*(volatile unsigned short *)(__region_CS2 + (ADDR)))
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#define __get_IMR()     ({ __reg16(0x0a); })
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#define __set_IMR(M)    do { __reg16(0x0a) = (M);  wmb(); } while(0)
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#define __get_IFR()     ({ __reg16(0x02); })
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#define __clr_IFR(M)    do { __reg16(0x02) = ~(M); wmb(); } while(0)
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/*
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 * off-CPU FPGA PIC operations
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 */
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static void frv_fpga_mask(unsigned int irq)
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{
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        uint16_t imr = __get_IMR();
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        imr |= 1 << (irq - IRQ_BASE_FPGA);
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        __set_IMR(imr);
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}
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static void frv_fpga_ack(unsigned int irq)
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{
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        __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
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}
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static void frv_fpga_mask_ack(unsigned int irq)
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{
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        uint16_t imr = __get_IMR();
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        imr |= 1 << (irq - IRQ_BASE_FPGA);
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        __set_IMR(imr);
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        __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
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}
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static void frv_fpga_unmask(unsigned int irq)
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{
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        uint16_t imr = __get_IMR();
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        imr &= ~(1 << (irq - IRQ_BASE_FPGA));
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        __set_IMR(imr);
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}
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static struct irq_chip frv_fpga_pic = {
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        .name           = "mb93093",
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        .ack            = frv_fpga_ack,
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        .mask           = frv_fpga_mask,
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        .mask_ack       = frv_fpga_mask_ack,
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        .unmask         = frv_fpga_unmask,
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        .end            = frv_fpga_end,
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};
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/*
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 * FPGA PIC interrupt handler
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 */
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static irqreturn_t fpga_interrupt(int irq, void *_mask)
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{
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        uint16_t imr, mask = (unsigned long) _mask;
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        imr = __get_IMR();
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        mask = mask & ~imr & __get_IFR();
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        /* poll all the triggered IRQs */
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        while (mask) {
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                int irq;
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                asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
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                irq = 31 - irq;
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                mask &= ~(1 << irq);
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                generic_irq_handle(IRQ_BASE_FPGA + irq);
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        }
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        return IRQ_HANDLED;
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}
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/*
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 * define an interrupt action for each FPGA PIC output
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 * - use dev_id to indicate the FPGA PIC input to output mappings
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 */
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static struct irqaction fpga_irq[1]  = {
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        [0] = {
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                .handler        = fpga_interrupt,
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                .flags          = IRQF_DISABLED,
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                .mask           = CPU_MASK_NONE,
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                .name           = "fpga.0",
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                .dev_id         = (void *) 0x0700UL,
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        }
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};
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/*
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 * initialise the motherboard FPGA's PIC
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 */
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void __init fpga_init(void)
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{
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        int irq;
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        /* all PIC inputs are all set to be edge triggered */
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        __set_IMR(0x0700);
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        __clr_IFR(0x0000);
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        for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++)
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                set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq);
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        /* the FPGA drives external IRQ input #2 on the CPU PIC */
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        setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]);
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}

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