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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [mips/] [au1000/] [xxs1500/] [board_setup.c] - Blame information for rev 3

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1 3 xianfeng
/*
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 * Copyright 2000-2003 MontaVista Software Inc.
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 * Author: MontaVista Software, Inc.
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 *              ppopov@mvista.com or source@mvista.com
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 *
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 *  This program is free software; you can redistribute  it and/or modify it
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 *  under  the terms of  the GNU General  Public License as published by the
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 *  Free Software Foundation;  either version 2 of the  License, or (at your
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 *  option) any later version.
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 *
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 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
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 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
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 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
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 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
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 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
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 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
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 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 *
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 *  You should have received a copy of the  GNU General Public License along
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 *  with this program; if not, write  to the Free Software Foundation, Inc.,
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 *  675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <asm/cpu.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/keyboard.h>
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#include <asm/mipsregs.h>
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#include <asm/reboot.h>
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#include <asm/pgtable.h>
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#include <asm/au1000.h>
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void board_reset(void)
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{
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        /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
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        au_writel(0x00000000, 0xAE00001C);
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}
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void __init board_setup(void)
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{
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        u32 pin_func;
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        // set multiple use pins (UART3/GPIO) to UART (it's used as UART too)
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        pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3);
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        pin_func |= SYS_PF_UR3;
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        au_writel(pin_func, SYS_PINFUNC);
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        // enable UART
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        au_writel(0x01, UART3_ADDR+UART_MOD_CNTRL); // clock enable (CE)
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        mdelay(10);
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        au_writel(0x03, UART3_ADDR+UART_MOD_CNTRL); // CE and "enable"
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        mdelay(10);
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        // enable DTR = USB power up
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        au_writel(0x01, UART3_ADDR+UART_MCR); //? UART_MCR_DTR is 0x01???
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#ifdef CONFIG_PCMCIA_XXS1500
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        /* setup pcmcia signals */
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        au_writel(0, SYS_PININPUTEN);
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        /* gpio 0, 1, and 4 are inputs */
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        au_writel(1 | (1<<1) | (1<<4), SYS_TRIOUTCLR);
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        /* enable GPIO2 if not already enabled */
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        au_writel(1, GPIO2_ENABLE);
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        /* gpio2 208/9/10/11 are inputs */
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        au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR);
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        /* turn off power */
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        au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT);
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#endif
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#ifdef CONFIG_PCI
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#if defined(__MIPSEB__)
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        au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
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#else
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        au_writel(0xf, Au1500_PCI_CFG);
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#endif
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#endif
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}

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