OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [mips/] [bcm47xx/] [setup.c] - Blame information for rev 3

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 xianfeng
/*
2
 *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3
 *  Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
4
 *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5
 *  Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
6
 *
7
 *  This program is free software; you can redistribute  it and/or modify it
8
 *  under  the terms of  the GNU General  Public License as published by the
9
 *  Free Software Foundation;  either version 2 of the  License, or (at your
10
 *  option) any later version.
11
 *
12
 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
13
 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
14
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
15
 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
16
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17
 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
18
 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19
 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
20
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22
 *
23
 *  You should have received a copy of the  GNU General Public License along
24
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
25
 *  675 Mass Ave, Cambridge, MA 02139, USA.
26
 */
27
 
28
#include <linux/types.h>
29
#include <linux/ssb/ssb.h>
30
#include <asm/bootinfo.h>
31
#include <asm/reboot.h>
32
#include <asm/time.h>
33
#include <bcm47xx.h>
34
#include <asm/fw/cfe/cfe_api.h>
35
 
36
struct ssb_bus ssb_bcm47xx;
37
EXPORT_SYMBOL(ssb_bcm47xx);
38
 
39
static void bcm47xx_machine_restart(char *command)
40
{
41
        printk(KERN_ALERT "Please stand by while rebooting the system...\n");
42
        local_irq_disable();
43
        /* Set the watchdog timer to reset immediately */
44
        ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
45
        while (1)
46
                cpu_relax();
47
}
48
 
49
static void bcm47xx_machine_halt(void)
50
{
51
        /* Disable interrupts and watchdog and spin forever */
52
        local_irq_disable();
53
        ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
54
        while (1)
55
                cpu_relax();
56
}
57
 
58
static void str2eaddr(char *str, char *dest)
59
{
60
        int i = 0;
61
 
62
        if (str == NULL) {
63
                memset(dest, 0, 6);
64
                return;
65
        }
66
 
67
        for (;;) {
68
                dest[i++] = (char) simple_strtoul(str, NULL, 16);
69
                str += 2;
70
                if (!*str++ || i == 6)
71
                        break;
72
        }
73
}
74
 
75
static int bcm47xx_get_invariants(struct ssb_bus *bus,
76
                                   struct ssb_init_invariants *iv)
77
{
78
        char buf[100];
79
 
80
        /* Fill boardinfo structure */
81
        memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
82
 
83
        if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0)
84
                iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
85
        if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0)
86
                iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
87
        if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0)
88
                iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
89
 
90
        /* Fill sprom structure */
91
        memset(&(iv->sprom), 0, sizeof(struct ssb_sprom));
92
        iv->sprom.revision = 3;
93
 
94
        if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
95
                str2eaddr(buf, iv->sprom.r1.et0mac);
96
        if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
97
                str2eaddr(buf, iv->sprom.r1.et1mac);
98
        if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0)
99
                iv->sprom.r1.et0phyaddr = simple_strtoul(buf, NULL, 10);
100
        if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0)
101
                iv->sprom.r1.et1phyaddr = simple_strtoul(buf, NULL, 10);
102
        if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0)
103
                iv->sprom.r1.et0mdcport = simple_strtoul(buf, NULL, 10);
104
        if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0)
105
                iv->sprom.r1.et1mdcport = simple_strtoul(buf, NULL, 10);
106
 
107
        return 0;
108
}
109
 
110
void __init plat_mem_setup(void)
111
{
112
        int err;
113
 
114
        err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
115
                                      bcm47xx_get_invariants);
116
        if (err)
117
                panic("Failed to initialize SSB bus (err %d)\n", err);
118
 
119
        _machine_restart = bcm47xx_machine_restart;
120
        _machine_halt = bcm47xx_machine_halt;
121
        pm_power_off = bcm47xx_machine_halt;
122
}
123
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.