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xianfeng |
/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ahennessy@mvista.com
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*
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* Copyright (C) 2000-2001 Toshiba Corporation
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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*
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* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
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*
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* Define the pci_ops for the Toshiba rbtx4927
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*
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* Much of the code is derived from the original DDB5074 port by
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* Geert Uytterhoeven <geert@sonycom.com>
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*
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* Copyright 2004 MontaVista Software Inc.
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* Author: Manish Lachwani (mlachwani@mvista.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/addrspace.h>
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#include <asm/byteorder.h>
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#include <asm/tx4927/tx4927_pci.h>
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/* initialize in setup */
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struct resource pci_io_resource = {
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.name = "TX4927 PCI IO SPACE",
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.start = 0x1000,
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.end = (0x1000 + (TX4927_PCIIO_SIZE)) - 1,
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.flags = IORESOURCE_IO
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};
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/* initialize in setup */
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struct resource pci_mem_resource = {
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.name = "TX4927 PCI MEM SPACE",
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.start = TX4927_PCIMEM,
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.end = TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
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.flags = IORESOURCE_MEM
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};
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static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
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{
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if (bus > 0) {
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/* Type 1 configuration */
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tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
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((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
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} else {
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if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
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return -1;
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/* Type 0 configuration */
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tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
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((dev_fn & 0xff) << 0x08) | (where & 0xfc);
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}
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/* clear M_ABORT and Disable M_ABORT Int. */
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tx4927_pcicptr->pcistatus =
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(tx4927_pcicptr->pcistatus & 0x0000ffff) |
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(PCI_STATUS_REC_MASTER_ABORT << 16);
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tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
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return 0;
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}
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static int check_abort(int flags)
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{
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int code = PCIBIOS_SUCCESSFUL;
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if (tx4927_pcicptr->
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pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
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tx4927_pcicptr->pcistatus =
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(tx4927_pcicptr->
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pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
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<< 16);
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tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
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code = PCIBIOS_DEVICE_NOT_FOUND;
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}
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return code;
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}
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static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 * val)
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{
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int flags, retval, dev, busno, func;
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busno = bus->number;
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dev = PCI_SLOT(devfn);
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func = PCI_FUNC(devfn);
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/* check if the bus is top-level */
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if (bus->parent != NULL) {
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busno = bus->number;
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} else {
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busno = 0;
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}
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if (mkaddr(busno, devfn, where, &flags))
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return -1;
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switch (size) {
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case 1:
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*val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
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g2pcfgdata |
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#ifdef __LITTLE_ENDIAN
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(where & 3));
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#else
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((where & 0x3) ^ 0x3));
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#endif
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break;
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case 2:
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*val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
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g2pcfgdata |
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#ifdef __LITTLE_ENDIAN
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(where & 3));
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#else
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((where & 0x3) ^ 0x2));
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#endif
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break;
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case 4:
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*val = tx4927_pcicptr->g2pcfgdata;
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break;
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}
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retval = check_abort(flags);
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if (retval == PCIBIOS_DEVICE_NOT_FOUND)
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*val = 0xffffffff;
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return retval;
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}
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static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 val)
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{
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int flags, dev, busno, func;
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busno = bus->number;
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dev = PCI_SLOT(devfn);
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func = PCI_FUNC(devfn);
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/* check if the bus is top-level */
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if (bus->parent != NULL) {
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busno = bus->number;
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} else {
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busno = 0;
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}
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if (mkaddr(busno, devfn, where, &flags))
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return -1;
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switch (size) {
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case 1:
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*(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
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g2pcfgdata |
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#ifdef __LITTLE_ENDIAN
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(where & 3)) = val;
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#else
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((where & 0x3) ^ 0x3)) = val;
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#endif
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break;
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case 2:
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*(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
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g2pcfgdata |
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#ifdef __LITTLE_ENDIAN
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(where & 3)) = val;
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#else
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((where & 0x3) ^ 0x2)) = val;
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#endif
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break;
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case 4:
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tx4927_pcicptr->g2pcfgdata = val;
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break;
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}
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return check_abort(flags);
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}
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struct pci_ops tx4927_pci_ops = {
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tx4927_pcibios_read_config,
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tx4927_pcibios_write_config
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};
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/*
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* h/w only supports devices 0x00 to 0x14
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*/
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struct pci_controller tx4927_controller = {
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.pci_ops = &tx4927_pci_ops,
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.io_resource = &pci_io_resource,
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.mem_resource = &pci_mem_resource,
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};
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