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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [or32/] [kernel/] [su.S] - Blame information for rev 7

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Line No. Rev Author Line
1 7 xianfeng 
        .global _su_asm
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_su_asm:
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        l.addi   r1,r1,-8
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        l.sw     0x0(r1),r9
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        l.sw     0x4(r1),r14
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        /* r14 = 0x8890 */
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        l.ori    r11,r0,0x0
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        l.ori    r14,r0,0x8890
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        l.nop
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        l.nop
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        l.sfgtui r14,0x8887
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x1    /* this should pass */
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1:
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        l.sfgtsi r14,0x8887     /* IMMEDIATE is NEGATIVE */
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x2    /* this should pass */
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1:
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        l.sfgtui r14,0x6665
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x4    /* this should pass */
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1:
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        l.sfgtsi r14,0x6665
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x8    /* this should pass */
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1:
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        /* r14 = 0x8008 */
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        l.ori    r14,r0,0x8008
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        l.sfgtui r14,0x8887
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x10   /* this should fail r14 |= 0x10 */
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1:
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        l.sfgtsi r14,0x8887     /* IMMEDIATE is NEGATIVE */
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x20   /* this should pass  */
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1:
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        /* r14 = 1 */
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        l.ori    r14,r0,1
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        l.sfgtsi r14,0x8887     /* IMMEDIATE is NEGATIVE */
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x40   /* this should pass */
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1:
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        l.sfgtui r14,0x8887
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x80   /* this should fail r14 |= 0x80 */
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1:
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        l.sfgtsi r14,0x6665
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x100  /* this should fail r14 |= 0x100 */
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1:
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        l.sfgtui r14,0x6665
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        l.bf     1f
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        l.nop
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        l.ori    r11,r11,0x200  /* this should pass r14 |= 0x200 */
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1:
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        /* r11 should be 0x390 */
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        l.lwz    r14,0x4(r1)
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        l.lwz    r9,0x0(r1)
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        l.jr     r9
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        l.addi   r1,r1,8

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