OpenCores
URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [arch/] [sh/] [kernel/] [cf-enabler.c] - Blame information for rev 7

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 3 xianfeng 
/* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
2 
 *
3 
 *  linux/drivers/block/cf-enabler.c
4 
 *
5 
 *  Copyright (C) 1999  Niibe Yutaka
6 
 *  Copyright (C) 2000  Toshiharu Nozawa
7 
 *  Copyright (C) 2001  A&D Co., Ltd.
8 
 *
9 
 *  Enable the CF configuration.
10 
 */
11 
 
12 
#include <linux/init.h>
13 
#include <linux/mm.h>
14 
#include <linux/vmalloc.h>
15 
#include <linux/interrupt.h>
16 
#include <asm/io.h>
17 
#include <asm/irq.h>
18 
 
19 
/*
20 
 * You can connect Compact Flash directly to the bus of SuperH.
21 
 * This is the enabler for that.
22 
 *
23 
 * SIM: How generic is this really? It looks pretty board, or at
24 
 * least SH sub-type, specific to me.
25 
 * I know it doesn't work on the Overdrive!
26 
 */
27 
 
28 
/*
29 
 * 0xB8000000 : Attribute
30 
 * 0xB8001000 : Common Memory
31 
 * 0xBA000000 : I/O
32 
 */
33 
#if defined(CONFIG_CPU_SH4)
34 
/* SH4 can't access PCMCIA interface through P2 area.
35 
 * we must remap it with appropriate attribute bit of the page set.
36 
 * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
37 
 
38 
#if defined(CONFIG_CF_AREA6)
39 
#define slot_no 0
40 
#else
41 
#define slot_no 1
42 
#endif
43 
 
44 
/* use this pointer to access to directly connected compact flash io area*/
45 
void *cf_io_base;
46 
 
47 
static int __init allocate_cf_area(void)
48 
{
49 
        pgprot_t prot;
50 
        unsigned long paddrbase, psize;
51 
 
52 
        /* open I/O area window */
53 
        paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
54 
        psize = PAGE_SIZE;
55 
        prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
56 
        cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
57 
        if (!cf_io_base) {
58 
                printk("allocate_cf_area : can't open CF I/O window!\n");
59 
                return -ENOMEM;
60 
        }
61 
/*      printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
62 
                paddrbase, psize, prot.pgprot, cf_io_base);*/
63 
 
64 
        /* XXX : do we need attribute and common-memory area also? */
65 
 
66 
        return 0;
67 
}
68 
#endif
69 
 
70 
static int __init cf_init_default(void)
71 
{
72 
/* You must have enabled the card, and set the level interrupt
73 
 * before reaching this point. Possibly in boot ROM or boot loader.
74 
 */
75 
#if defined(CONFIG_CPU_SH4)
76 
        allocate_cf_area();
77 
#endif
78 
 
79 
        return 0;
80 
}
81 
 
82 
#if defined(CONFIG_SH_SOLUTION_ENGINE)
83 
#include <asm/se.h>
84 
#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
85 
#include <asm/se7722.h>
86 
#endif
87 
 
88 
/*
89 
 * SolutionEngine Seriese
90 
 *
91 
 * about MS770xSE
92 
 * 0xB8400000 : Common Memory
93 
 * 0xB8500000 : Attribute
94 
 * 0xB8600000 : I/O
95 
 *
96 
 * about MS7722SE
97 
 * 0xB0400000 : Common Memory
98 
 * 0xB0500000 : Attribute
99 
 * 0xB0600000 : I/O
100 
 */
101 
 
102 
#if defined(CONFIG_SH_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE)
103 
static int __init cf_init_se(void)
104 
{
105 
        if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
106 
                return 0;        /* Not detected */
107 
 
108 
        if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
109 
                ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
110 
        } else {
111 
                ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
112 
        }
113 
 
114 
        /*
115 
         *  PC-Card window open
116 
         *  flag == COMMON/ATTRIBUTE/IO
117 
         */
118 
        /* common window open */
119 
        ctrl_outw(0x8a84, MRSHPC_MW0CR1);
120 
        if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
121 
                /* common mode & bus width 16bit SWAP = 1*/
122 
                ctrl_outw(0x0b00, MRSHPC_MW0CR2);
123 
        else
124 
                /* common mode & bus width 16bit SWAP = 0*/
125 
                ctrl_outw(0x0300, MRSHPC_MW0CR2);
126 
 
127 
        /* attribute window open */
128 
        ctrl_outw(0x8a85, MRSHPC_MW1CR1);
129 
        if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
130 
                /* attribute mode & bus width 16bit SWAP = 1*/
131 
                ctrl_outw(0x0a00, MRSHPC_MW1CR2);
132 
        else
133 
                /* attribute mode & bus width 16bit SWAP = 0*/
134 
                ctrl_outw(0x0200, MRSHPC_MW1CR2);
135 
 
136 
        /* I/O window open */
137 
        ctrl_outw(0x8a86, MRSHPC_IOWCR1);
138 
        ctrl_outw(0x0008, MRSHPC_CDCR);  /* I/O card mode */
139 
        if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
140 
                ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
141 
        else
142 
                ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
143 
 
144 
        ctrl_outw(0x2000, MRSHPC_ICR);
145 
        ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
146 
        ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
147 
        return 0;
148 
}
149 
#else
150 
static int __init cf_init_se(void)
151 
{
152 
        return -1;
153 
}
154 
#endif
155 
 
156 
int __init cf_init(void)
157 
{
158 
        if( mach_is_se() || mach_is_7722se() ){
159 
                return cf_init_se();
160 
        }
161 
 
162 
        return cf_init_default();
163 
}
164 
 
165 
__initcall (cf_init);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.