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xianfeng |
/* $Id: wof.S,v 1.40 2000/01/08 16:38:18 anton Exp $
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* wof.S: Sparc window overflow handler.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include
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#include
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#include
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#include
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#include
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#include
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#include
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#include
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#include
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/* WARNING: This routine is hairy and _very_ complicated, but it
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* must be as fast as possible as it handles the allocation
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* of register windows to the user and kernel. If you touch
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* this code be _very_ careful as many other pieces of the
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* kernel depend upon how this code behaves. You have been
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* duly warned...
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*/
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/* We define macro's for registers which have a fixed
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* meaning throughout this entire routine. The 'T' in
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* the comments mean that the register can only be
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* accessed when in the 'trap' window, 'G' means
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* accessible in any window. Do not change these registers
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* after they have been set, until you are ready to return
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* from the trap.
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*/
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#define t_psr l0 /* %psr at trap time T */
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#define t_pc l1 /* PC for trap return T */
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#define t_npc l2 /* NPC for trap return T */
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#define t_wim l3 /* %wim at trap time T */
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#define saved_g5 l5 /* Global save register T */
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#define saved_g6 l6 /* Global save register T */
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#define curptr g6 /* Gets set to 'current' then stays G */
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/* Now registers whose values can change within the handler. */
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#define twin_tmp l4 /* Temp reg, only usable in trap window T */
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#define glob_tmp g5 /* Global temporary reg, usable anywhere G */
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.text
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.align 4
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/* BEGINNING OF PATCH INSTRUCTIONS */
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/* On a 7-window Sparc the boot code patches spnwin_*
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* instructions with the following ones.
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*/
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.globl spnwin_patch1_7win, spnwin_patch2_7win, spnwin_patch3_7win
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spnwin_patch1_7win: sll %t_wim, 6, %glob_tmp
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spnwin_patch2_7win: and %glob_tmp, 0x7f, %glob_tmp
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spnwin_patch3_7win: and %twin_tmp, 0x7f, %twin_tmp
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/* END OF PATCH INSTRUCTIONS */
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/* The trap entry point has done the following:
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*
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* rd %psr, %l0
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* rd %wim, %l3
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* b spill_window_entry
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* andcc %l0, PSR_PS, %g0
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*/
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/* Datum current_thread_info->uwinmask contains at all times a bitmask
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* where if any user windows are active, at least one bit will
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* be set in to mask. If no user windows are active, the bitmask
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* will be all zeroes.
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*/
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.globl spill_window_entry
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.globl spnwin_patch1, spnwin_patch2, spnwin_patch3
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spill_window_entry:
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/* LOCATION: Trap Window */
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mov %g5, %saved_g5 ! save away global temp register
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mov %g6, %saved_g6 ! save away 'current' ptr register
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/* Compute what the new %wim will be if we save the
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* window properly in this trap handler.
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*
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* newwim = ((%wim>>1) | (%wim<<(nwindows - 1)));
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*/
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srl %t_wim, 0x1, %twin_tmp
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spnwin_patch1: sll %t_wim, 7, %glob_tmp
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or %glob_tmp, %twin_tmp, %glob_tmp
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spnwin_patch2: and %glob_tmp, 0xff, %glob_tmp
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/* The trap entry point has set the condition codes
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* up for us to see if this is from user or kernel.
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* Get the load of 'curptr' out of the way.
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*/
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LOAD_CURRENT(curptr, twin_tmp)
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andcc %t_psr, PSR_PS, %g0
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be,a spwin_fromuser ! all user wins, branch
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save %g0, %g0, %g0 ! Go where saving will occur
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/* See if any user windows are active in the set. */
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ld [%curptr + TI_UWINMASK], %twin_tmp ! grab win mask
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orcc %g0, %twin_tmp, %g0 ! check for set bits
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bne spwin_exist_uwins ! yep, there are some
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andn %twin_tmp, %glob_tmp, %twin_tmp ! compute new uwinmask
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/* Save into the window which must be saved and do it.
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* Basically if we are here, this means that we trapped
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* from kernel mode with only kernel windows in the register
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* file.
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*/
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save %g0, %g0, %g0 ! save into the window to stash away
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wr %glob_tmp, 0x0, %wim ! set new %wim, this is safe now
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spwin_no_userwins_from_kernel:
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/* LOCATION: Window to be saved */
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STORE_WINDOW(sp) ! stash the window
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restore %g0, %g0, %g0 ! go back into trap window
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/* LOCATION: Trap window */
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mov %saved_g5, %g5 ! restore %glob_tmp
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mov %saved_g6, %g6 ! restore %curptr
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wr %t_psr, 0x0, %psr ! restore condition codes in %psr
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WRITE_PAUSE ! waste some time
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jmp %t_pc ! Return from trap
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rett %t_npc ! we are done
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spwin_exist_uwins:
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/* LOCATION: Trap window */
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/* Wow, user windows have to be dealt with, this is dirty
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* and messy as all hell. And difficult to follow if you
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* are approaching the infamous register window trap handling
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* problem for the first time. DON'T LOOK!
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*
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* Note that how the execution path works out, the new %wim
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* will be left for us in the global temporary register,
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* %glob_tmp. We cannot set the new %wim first because we
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* need to save into the appropriate window without inducing
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* a trap (traps are off, we'd get a watchdog wheee)...
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* But first, store the new user window mask calculated
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* above.
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*/
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st %twin_tmp, [%curptr + TI_UWINMASK]
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save %g0, %g0, %g0 ! Go to where the saving will occur
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spwin_fromuser:
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/* LOCATION: Window to be saved */
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wr %glob_tmp, 0x0, %wim ! Now it is safe to set new %wim
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/* LOCATION: Window to be saved */
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/* This instruction branches to a routine which will check
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* to validity of the users stack pointer by whatever means
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* are necessary. This means that this is architecture
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* specific and thus this branch instruction will need to
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* be patched at boot time once the machine type is known.
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* This routine _shall not_ touch %curptr under any
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* circumstances whatsoever! It will branch back to the
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* label 'spwin_good_ustack' if the stack is ok but still
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* needs to be dumped (SRMMU for instance will not need to
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* do this) or 'spwin_finish_up' if the stack is ok and the
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* registers have already been saved. If the stack is found
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* to be bogus for some reason the routine shall branch to
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* the label 'spwin_user_stack_is_bolixed' which will take
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* care of things at that point.
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*/
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.globl spwin_mmu_patchme
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spwin_mmu_patchme: b spwin_sun4c_stackchk
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andcc %sp, 0x7, %g0
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spwin_good_ustack:
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/* LOCATION: Window to be saved */
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/* The users stack is ok and we can safely save it at
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* %sp.
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*/
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STORE_WINDOW(sp)
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spwin_finish_up:
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restore %g0, %g0, %g0 /* Back to trap window. */
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/* LOCATION: Trap window */
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/* We have spilled successfully, and we have properly stored
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* the appropriate window onto the stack.
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*/
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/* Restore saved globals */
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mov %saved_g5, %g5
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mov %saved_g6, %g6
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wr %t_psr, 0x0, %psr
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WRITE_PAUSE
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jmp %t_pc
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rett %t_npc
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spwin_user_stack_is_bolixed:
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/* LOCATION: Window to be saved */
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/* Wheee, user has trashed his/her stack. We have to decide
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* how to proceed based upon whether we came from kernel mode
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* or not. If we came from kernel mode, toss the window into
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* a special buffer and proceed, the kernel _needs_ a window
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* and we could be in an interrupt handler so timing is crucial.
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* If we came from user land we build a full stack frame and call
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* c-code to gun down the process.
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*/
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rd %psr, %glob_tmp
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andcc %glob_tmp, PSR_PS, %g0
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bne spwin_bad_ustack_from_kernel
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nop
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/* Oh well, throw this one window into the per-task window
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* buffer, the first one.
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*/
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st %sp, [%curptr + TI_RWIN_SPTRS]
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STORE_WINDOW(curptr + TI_REG_WINDOW)
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restore %g0, %g0, %g0
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/* LOCATION: Trap Window */
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/* Back in the trap window, update winbuffer save count. */
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mov 1, %twin_tmp
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st %twin_tmp, [%curptr + TI_W_SAVED]
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/* Compute new user window mask. What we are basically
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* doing is taking two windows, the invalid one at trap
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* time and the one we attempted to throw onto the users
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* stack, and saying that everything else is an ok user
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* window. umask = ((~(%t_wim | %wim)) & valid_wim_bits)
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*/
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rd %wim, %twin_tmp
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or %twin_tmp, %t_wim, %twin_tmp
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not %twin_tmp
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spnwin_patch3: and %twin_tmp, 0xff, %twin_tmp ! patched on 7win Sparcs
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st %twin_tmp, [%curptr + TI_UWINMASK]
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#define STACK_OFFSET (THREAD_SIZE - TRACEREG_SZ - STACKFRAME_SZ)
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sethi %hi(STACK_OFFSET), %sp
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or %sp, %lo(STACK_OFFSET), %sp
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add %curptr, %sp, %sp
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/* Restore the saved globals and build a pt_regs frame. */
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mov %saved_g5, %g5
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mov %saved_g6, %g6
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STORE_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
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sethi %hi(STACK_OFFSET), %g6
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or %g6, %lo(STACK_OFFSET), %g6
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sub %sp, %g6, %g6 ! curptr
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/* Turn on traps and call c-code to deal with it. */
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wr %t_psr, PSR_ET, %psr
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nop
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call window_overflow_fault
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nop
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/* Return from trap if C-code actually fixes things, if it
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* doesn't then we never get this far as the process will
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* be given the look of death from Commander Peanut.
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*/
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b ret_trap_entry
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clr %l6
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spwin_bad_ustack_from_kernel:
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/* LOCATION: Window to be saved */
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/* The kernel provoked a spill window trap, but the window we
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* need to save is a user one and the process has trashed its
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* stack pointer. We need to be quick, so we throw it into
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* a per-process window buffer until we can properly handle
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* this later on.
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*/
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SAVE_BOLIXED_USER_STACK(curptr, glob_tmp)
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restore %g0, %g0, %g0
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/* LOCATION: Trap window */
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/* Restore globals, condition codes in the %psr and
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* return from trap. Note, restoring %g6 when returning
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* to kernel mode is not necessarily these days. ;-)
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*/
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mov %saved_g5, %g5
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mov %saved_g6, %g6
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wr %t_psr, 0x0, %psr
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WRITE_PAUSE
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jmp %t_pc
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rett %t_npc
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/* Undefine the register macros which would only cause trouble
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* if used below. This helps find 'stupid' coding errors that
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* produce 'odd' behavior. The routines below are allowed to
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* make usage of glob_tmp and t_psr so we leave them defined.
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*/
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#undef twin_tmp
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#undef curptr
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#undef t_pc
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#undef t_npc
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#undef t_wim
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#undef saved_g5
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#undef saved_g6
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/* Now come the per-architecture window overflow stack checking routines.
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* As noted above %curptr cannot be touched by this routine at all.
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*/
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.globl spwin_sun4c_stackchk
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spwin_sun4c_stackchk:
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/* LOCATION: Window to be saved on the stack */
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| 312 |
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| 313 |
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/* See if the stack is in the address space hole but first,
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* check results of callers andcc %sp, 0x7, %g0
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*/
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be 1f
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sra %sp, 29, %glob_tmp
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rd %psr, %glob_tmp
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b spwin_user_stack_is_bolixed + 0x4
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nop
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1:
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add %glob_tmp, 0x1, %glob_tmp
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andncc %glob_tmp, 0x1, %g0
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be 1f
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| 327 |
|
|
and %sp, 0xfff, %glob_tmp ! delay slot
|
| 328 |
|
|
|
| 329 |
|
|
rd %psr, %glob_tmp
|
| 330 |
|
|
b spwin_user_stack_is_bolixed + 0x4
|
| 331 |
|
|
nop
|
| 332 |
|
|
|
| 333 |
|
|
/* See if our dump area will be on more than one
|
| 334 |
|
|
* page.
|
| 335 |
|
|
*/
|
| 336 |
|
|
1:
|
| 337 |
|
|
add %glob_tmp, 0x38, %glob_tmp
|
| 338 |
|
|
andncc %glob_tmp, 0xff8, %g0
|
| 339 |
|
|
be spwin_sun4c_onepage ! only one page to check
|
| 340 |
|
|
lda [%sp] ASI_PTE, %glob_tmp ! have to check first page anyways
|
| 341 |
|
|
|
| 342 |
|
|
spwin_sun4c_twopages:
|
| 343 |
|
|
/* Is first page ok permission wise? */
|
| 344 |
|
|
srl %glob_tmp, 29, %glob_tmp
|
| 345 |
|
|
cmp %glob_tmp, 0x6
|
| 346 |
|
|
be 1f
|
| 347 |
|
|
add %sp, 0x38, %glob_tmp /* Is second page in vma hole? */
|
| 348 |
|
|
|
| 349 |
|
|
rd %psr, %glob_tmp
|
| 350 |
|
|
b spwin_user_stack_is_bolixed + 0x4
|
| 351 |
|
|
nop
|
| 352 |
|
|
|
| 353 |
|
|
1:
|
| 354 |
|
|
sra %glob_tmp, 29, %glob_tmp
|
| 355 |
|
|
add %glob_tmp, 0x1, %glob_tmp
|
| 356 |
|
|
andncc %glob_tmp, 0x1, %g0
|
| 357 |
|
|
be 1f
|
| 358 |
|
|
add %sp, 0x38, %glob_tmp
|
| 359 |
|
|
|
| 360 |
|
|
rd %psr, %glob_tmp
|
| 361 |
|
|
b spwin_user_stack_is_bolixed + 0x4
|
| 362 |
|
|
nop
|
| 363 |
|
|
|
| 364 |
|
|
1:
|
| 365 |
|
|
lda [%glob_tmp] ASI_PTE, %glob_tmp
|
| 366 |
|
|
|
| 367 |
|
|
spwin_sun4c_onepage:
|
| 368 |
|
|
srl %glob_tmp, 29, %glob_tmp
|
| 369 |
|
|
cmp %glob_tmp, 0x6 ! can user write to it?
|
| 370 |
|
|
be spwin_good_ustack ! success
|
| 371 |
|
|
nop
|
| 372 |
|
|
|
| 373 |
|
|
rd %psr, %glob_tmp
|
| 374 |
|
|
b spwin_user_stack_is_bolixed + 0x4
|
| 375 |
|
|
nop
|
| 376 |
|
|
|
| 377 |
|
|
/* This is a generic SRMMU routine. As far as I know this
|
| 378 |
|
|
* works for all current v8/srmmu implementations, we'll
|
| 379 |
|
|
* see...
|
| 380 |
|
|
*/
|
| 381 |
|
|
.globl spwin_srmmu_stackchk
|
| 382 |
|
|
spwin_srmmu_stackchk:
|
| 383 |
|
|
/* LOCATION: Window to be saved on the stack */
|
| 384 |
|
|
|
| 385 |
|
|
/* Because of SMP concerns and speed we play a trick.
|
| 386 |
|
|
* We disable fault traps in the MMU control register,
|
| 387 |
|
|
* Execute the stores, then check the fault registers
|
| 388 |
|
|
* to see what happens. I can hear Linus now
|
| 389 |
|
|
* "disgusting... broken hardware...".
|
| 390 |
|
|
*
|
| 391 |
|
|
* But first, check to see if the users stack has ended
|
| 392 |
|
|
* up in kernel vma, then we would succeed for the 'wrong'
|
| 393 |
|
|
* reason... ;( Note that the 'sethi' below assumes the
|
| 394 |
|
|
* kernel is page aligned, which should always be the case.
|
| 395 |
|
|
*/
|
| 396 |
|
|
/* Check results of callers andcc %sp, 0x7, %g0 */
|
| 397 |
|
|
bne spwin_user_stack_is_bolixed
|
| 398 |
|
|
sethi %hi(PAGE_OFFSET), %glob_tmp
|
| 399 |
|
|
cmp %glob_tmp, %sp
|
| 400 |
|
|
bleu spwin_user_stack_is_bolixed
|
| 401 |
|
|
mov AC_M_SFSR, %glob_tmp
|
| 402 |
|
|
|
| 403 |
|
|
/* Clear the fault status and turn on the no_fault bit. */
|
| 404 |
|
|
lda [%glob_tmp] ASI_M_MMUREGS, %g0 ! eat SFSR
|
| 405 |
|
|
|
| 406 |
|
|
lda [%g0] ASI_M_MMUREGS, %glob_tmp ! read MMU control
|
| 407 |
|
|
or %glob_tmp, 0x2, %glob_tmp ! or in no_fault bit
|
| 408 |
|
|
sta %glob_tmp, [%g0] ASI_M_MMUREGS ! set it
|
| 409 |
|
|
|
| 410 |
|
|
/* Dump the registers and cross fingers. */
|
| 411 |
|
|
STORE_WINDOW(sp)
|
| 412 |
|
|
|
| 413 |
|
|
/* Clear the no_fault bit and check the status. */
|
| 414 |
|
|
andn %glob_tmp, 0x2, %glob_tmp
|
| 415 |
|
|
sta %glob_tmp, [%g0] ASI_M_MMUREGS
|
| 416 |
|
|
|
| 417 |
|
|
mov AC_M_SFAR, %glob_tmp
|
| 418 |
|
|
lda [%glob_tmp] ASI_M_MMUREGS, %g0
|
| 419 |
|
|
|
| 420 |
|
|
mov AC_M_SFSR, %glob_tmp
|
| 421 |
|
|
lda [%glob_tmp] ASI_M_MMUREGS, %glob_tmp
|
| 422 |
|
|
andcc %glob_tmp, 0x2, %g0 ! did we fault?
|
| 423 |
|
|
be,a spwin_finish_up + 0x4 ! cool beans, success
|
| 424 |
|
|
restore %g0, %g0, %g0
|
| 425 |
|
|
|
| 426 |
|
|
rd %psr, %glob_tmp
|
| 427 |
|
|
b spwin_user_stack_is_bolixed + 0x4 ! we faulted, ugh
|
| 428 |
|
|
nop
|
