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xianfeng |
/*
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* Low-Level PCI Support for PC -- Routing of Interrupts
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*
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* (c) 1999--2000 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/dmi.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/io_apic.h>
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#include <linux/irq.h>
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#include <linux/acpi.h>
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#include "pci.h"
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#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
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#define PIRQ_VERSION 0x0100
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static int broken_hp_bios_irq9;
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static int acer_tm360_irqrouting;
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static struct irq_routing_table *pirq_table;
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static int pirq_enable_irq(struct pci_dev *dev);
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/*
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* Never use: 0, 1, 2 (timer, keyboard, and cascade)
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* Avoid using: 13, 14 and 15 (FP error and IDE).
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* Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
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*/
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unsigned int pcibios_irq_mask = 0xfff8;
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static int pirq_penalty[16] = {
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1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
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0, 0, 0, 0, 1000, 100000, 100000, 100000
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};
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struct irq_router {
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char *name;
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u16 vendor, device;
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int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
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int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
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};
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struct irq_router_handler {
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u16 vendor;
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int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
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};
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int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
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void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
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/*
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* Check passed address for the PCI IRQ Routing Table signature
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* and perform checksum verification.
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*/
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static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
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{
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struct irq_routing_table *rt;
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int i;
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u8 sum;
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rt = (struct irq_routing_table *) addr;
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if (rt->signature != PIRQ_SIGNATURE ||
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rt->version != PIRQ_VERSION ||
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rt->size % 16 ||
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rt->size < sizeof(struct irq_routing_table))
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return NULL;
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sum = 0;
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for (i=0; i < rt->size; i++)
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sum += addr[i];
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if (!sum) {
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DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
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return rt;
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}
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return NULL;
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}
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/*
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* Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
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*/
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static struct irq_routing_table * __init pirq_find_routing_table(void)
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{
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u8 *addr;
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struct irq_routing_table *rt;
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if (pirq_table_addr) {
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rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
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if (rt)
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return rt;
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printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
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}
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for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
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rt = pirq_check_routing_table(addr);
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if (rt)
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return rt;
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}
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return NULL;
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}
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/*
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* If we have a IRQ routing table, use it to search for peer host
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* bridges. It's a gross hack, but since there are no other known
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* ways how to get a list of buses, we have to go this way.
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*/
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static void __init pirq_peer_trick(void)
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{
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struct irq_routing_table *rt = pirq_table;
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u8 busmap[256];
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int i;
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struct irq_info *e;
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memset(busmap, 0, sizeof(busmap));
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for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
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e = &rt->slots[i];
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#ifdef DEBUG
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{
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int j;
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DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
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for(j=0; j<4; j++)
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DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
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DBG("\n");
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}
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#endif
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busmap[e->bus] = 1;
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}
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for(i = 1; i < 256; i++) {
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if (!busmap[i] || pci_find_bus(0, i))
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continue;
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if (pci_scan_bus_with_sysdata(i))
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printk(KERN_INFO "PCI: Discovered primary peer "
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"bus %02x [IRQ]\n", i);
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}
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pcibios_last_bus = -1;
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}
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/*
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* Code for querying and setting of IRQ routes on various interrupt routers.
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*/
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void eisa_set_level_irq(unsigned int irq)
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{
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unsigned char mask = 1 << (irq & 7);
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unsigned int port = 0x4d0 + (irq >> 3);
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unsigned char val;
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static u16 eisa_irq_mask;
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if (irq >= 16 || (1 << irq) & eisa_irq_mask)
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return;
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eisa_irq_mask |= (1 << irq);
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printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
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val = inb(port);
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if (!(val & mask)) {
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DBG(KERN_DEBUG " -> edge");
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outb(val | mask, port);
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}
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}
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/*
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* Common IRQ routing practice: nibbles in config space,
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* offset by some magic constant.
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*/
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static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
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{
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u8 x;
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unsigned reg = offset + (nr >> 1);
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pci_read_config_byte(router, reg, &x);
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return (nr & 1) ? (x >> 4) : (x & 0xf);
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}
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static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
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{
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u8 x;
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unsigned reg = offset + (nr >> 1);
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pci_read_config_byte(router, reg, &x);
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x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
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pci_write_config_byte(router, reg, x);
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}
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/*
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* ALI pirq entries are damn ugly, and completely undocumented.
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* This has been figured out from pirq tables, and it's not a pretty
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* picture.
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*/
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static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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{
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static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
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return irqmap[read_config_nybble(router, 0x48, pirq-1)];
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}
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static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
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{
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static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
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unsigned int val = irqmap[irq];
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if (val) {
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write_config_nybble(router, 0x48, pirq-1, val);
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return 1;
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}
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return 0;
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}
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/*
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* The Intel PIIX4 pirq rules are fairly simple: "pirq" is
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* just a pointer to the config space.
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*/
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static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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{
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u8 x;
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pci_read_config_byte(router, pirq, &x);
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return (x < 16) ? x : 0;
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}
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static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
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{
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pci_write_config_byte(router, pirq, irq);
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return 1;
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}
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/*
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* The VIA pirq rules are nibble-based, like ALI,
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* but without the ugly irq number munging.
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* However, PIRQD is in the upper instead of lower 4 bits.
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*/
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static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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{
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return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
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}
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static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
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{
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write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
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return 1;
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}
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/*
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* The VIA pirq rules are nibble-based, like ALI,
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* but without the ugly irq number munging.
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* However, for 82C586, nibble map is different .
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*/
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static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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{
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static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
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return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
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}
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static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
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{
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static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
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write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
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return 1;
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}
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/*
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* ITE 8330G pirq rules are nibble-based
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* FIXME: pirqmap may be { 1, 0, 3, 2 },
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* 2+3 are both mapped to irq 9 on my system
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*/
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static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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{
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277 |
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static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
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return read_config_nybble(router,0x43, pirqmap[pirq-1]);
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}
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281 |
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static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
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282 |
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{
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283 |
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static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
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write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
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return 1;
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286 |
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}
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287 |
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|
288 |
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/*
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289 |
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* OPTI: high four bits are nibble pointer..
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290 |
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* I wonder what the low bits do?
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291 |
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*/
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292 |
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static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
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293 |
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{
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294 |
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return read_config_nybble(router, 0xb8, pirq >> 4);
|
295 |
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}
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296 |
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297 |
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static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
298 |
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{
|
299 |
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write_config_nybble(router, 0xb8, pirq >> 4, irq);
|
300 |
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return 1;
|
301 |
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}
|
302 |
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|
303 |
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/*
|
304 |
|
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* Cyrix: nibble offset 0x5C
|
305 |
|
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* 0x5C bits 7:4 is INTB bits 3:0 is INTA
|
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* 0x5D bits 7:4 is INTD bits 3:0 is INTC
|
307 |
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*/
|
308 |
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static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
309 |
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{
|
310 |
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return read_config_nybble(router, 0x5C, (pirq-1)^1);
|
311 |
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}
|
312 |
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313 |
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static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
314 |
|
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{
|
315 |
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write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
|
316 |
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return 1;
|
317 |
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}
|
318 |
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|
319 |
|
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/*
|
320 |
|
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* PIRQ routing for SiS 85C503 router used in several SiS chipsets.
|
321 |
|
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* We have to deal with the following issues here:
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* - vendors have different ideas about the meaning of link values
|
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* - some onboard devices (integrated in the chipset) have special
|
324 |
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* links and are thus routed differently (i.e. not via PCI INTA-INTD)
|
325 |
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* - different revision of the router have a different layout for
|
326 |
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* the routing registers, particularly for the onchip devices
|
327 |
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*
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328 |
|
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* For all routing registers the common thing is we have one byte
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329 |
|
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* per routeable link which is defined as:
|
330 |
|
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* bit 7 IRQ mapping enabled (0) or disabled (1)
|
331 |
|
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* bits [6:4] reserved (sometimes used for onchip devices)
|
332 |
|
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* bits [3:0] IRQ to map to
|
333 |
|
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* allowed: 3-7, 9-12, 14-15
|
334 |
|
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* reserved: 0, 1, 2, 8, 13
|
335 |
|
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*
|
336 |
|
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* The config-space registers located at 0x41/0x42/0x43/0x44 are
|
337 |
|
|
* always used to route the normal PCI INT A/B/C/D respectively.
|
338 |
|
|
* Apparently there are systems implementing PCI routing table using
|
339 |
|
|
* link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
|
340 |
|
|
* We try our best to handle both link mappings.
|
341 |
|
|
*
|
342 |
|
|
* Currently (2003-05-21) it appears most SiS chipsets follow the
|
343 |
|
|
* definition of routing registers from the SiS-5595 southbridge.
|
344 |
|
|
* According to the SiS 5595 datasheets the revision id's of the
|
345 |
|
|
* router (ISA-bridge) should be 0x01 or 0xb0.
|
346 |
|
|
*
|
347 |
|
|
* Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
|
348 |
|
|
* Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
|
349 |
|
|
* They seem to work with the current routing code. However there is
|
350 |
|
|
* some concern because of the two USB-OHCI HCs (original SiS 5595
|
351 |
|
|
* had only one). YMMV.
|
352 |
|
|
*
|
353 |
|
|
* Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
|
354 |
|
|
*
|
355 |
|
|
* 0x61: IDEIRQ:
|
356 |
|
|
* bits [6:5] must be written 01
|
357 |
|
|
* bit 4 channel-select primary (0), secondary (1)
|
358 |
|
|
*
|
359 |
|
|
* 0x62: USBIRQ:
|
360 |
|
|
* bit 6 OHCI function disabled (0), enabled (1)
|
361 |
|
|
*
|
362 |
|
|
* 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
|
363 |
|
|
*
|
364 |
|
|
* 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
|
365 |
|
|
*
|
366 |
|
|
* We support USBIRQ (in addition to INTA-INTD) and keep the
|
367 |
|
|
* IDE, ACPI and DAQ routing untouched as set by the BIOS.
|
368 |
|
|
*
|
369 |
|
|
* Currently the only reported exception is the new SiS 65x chipset
|
370 |
|
|
* which includes the SiS 69x southbridge. Here we have the 85C503
|
371 |
|
|
* router revision 0x04 and there are changes in the register layout
|
372 |
|
|
* mostly related to the different USB HCs with USB 2.0 support.
|
373 |
|
|
*
|
374 |
|
|
* Onchip routing for router rev-id 0x04 (try-and-error observation)
|
375 |
|
|
*
|
376 |
|
|
* 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
|
377 |
|
|
* bit 6-4 are probably unused, not like 5595
|
378 |
|
|
*/
|
379 |
|
|
|
380 |
|
|
#define PIRQ_SIS_IRQ_MASK 0x0f
|
381 |
|
|
#define PIRQ_SIS_IRQ_DISABLE 0x80
|
382 |
|
|
#define PIRQ_SIS_USB_ENABLE 0x40
|
383 |
|
|
|
384 |
|
|
static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
385 |
|
|
{
|
386 |
|
|
u8 x;
|
387 |
|
|
int reg;
|
388 |
|
|
|
389 |
|
|
reg = pirq;
|
390 |
|
|
if (reg >= 0x01 && reg <= 0x04)
|
391 |
|
|
reg += 0x40;
|
392 |
|
|
pci_read_config_byte(router, reg, &x);
|
393 |
|
|
return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
|
394 |
|
|
}
|
395 |
|
|
|
396 |
|
|
static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
397 |
|
|
{
|
398 |
|
|
u8 x;
|
399 |
|
|
int reg;
|
400 |
|
|
|
401 |
|
|
reg = pirq;
|
402 |
|
|
if (reg >= 0x01 && reg <= 0x04)
|
403 |
|
|
reg += 0x40;
|
404 |
|
|
pci_read_config_byte(router, reg, &x);
|
405 |
|
|
x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
|
406 |
|
|
x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
|
407 |
|
|
pci_write_config_byte(router, reg, x);
|
408 |
|
|
return 1;
|
409 |
|
|
}
|
410 |
|
|
|
411 |
|
|
|
412 |
|
|
/*
|
413 |
|
|
* VLSI: nibble offset 0x74 - educated guess due to routing table and
|
414 |
|
|
* config space of VLSI 82C534 PCI-bridge/router (1004:0102)
|
415 |
|
|
* Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
|
416 |
|
|
* devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
|
417 |
|
|
* for the busbridge to the docking station.
|
418 |
|
|
*/
|
419 |
|
|
|
420 |
|
|
static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
421 |
|
|
{
|
422 |
|
|
if (pirq > 8) {
|
423 |
|
|
printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
|
424 |
|
|
return 0;
|
425 |
|
|
}
|
426 |
|
|
return read_config_nybble(router, 0x74, pirq-1);
|
427 |
|
|
}
|
428 |
|
|
|
429 |
|
|
static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
430 |
|
|
{
|
431 |
|
|
if (pirq > 8) {
|
432 |
|
|
printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
|
433 |
|
|
return 0;
|
434 |
|
|
}
|
435 |
|
|
write_config_nybble(router, 0x74, pirq-1, irq);
|
436 |
|
|
return 1;
|
437 |
|
|
}
|
438 |
|
|
|
439 |
|
|
/*
|
440 |
|
|
* ServerWorks: PCI interrupts mapped to system IRQ lines through Index
|
441 |
|
|
* and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
|
442 |
|
|
* format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
|
443 |
|
|
* register is a straight binary coding of desired PIC IRQ (low nibble).
|
444 |
|
|
*
|
445 |
|
|
* The 'link' value in the PIRQ table is already in the correct format
|
446 |
|
|
* for the Index register. There are some special index values:
|
447 |
|
|
* 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
|
448 |
|
|
* and 0x03 for SMBus.
|
449 |
|
|
*/
|
450 |
|
|
static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
451 |
|
|
{
|
452 |
|
|
outb_p(pirq, 0xc00);
|
453 |
|
|
return inb(0xc01) & 0xf;
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
457 |
|
|
{
|
458 |
|
|
outb_p(pirq, 0xc00);
|
459 |
|
|
outb_p(irq, 0xc01);
|
460 |
|
|
return 1;
|
461 |
|
|
}
|
462 |
|
|
|
463 |
|
|
/* Support for AMD756 PCI IRQ Routing
|
464 |
|
|
* Jhon H. Caicedo <jhcaiced@osso.org.co>
|
465 |
|
|
* Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
|
466 |
|
|
* Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
|
467 |
|
|
* The AMD756 pirq rules are nibble-based
|
468 |
|
|
* offset 0x56 0-3 PIRQA 4-7 PIRQB
|
469 |
|
|
* offset 0x57 0-3 PIRQC 4-7 PIRQD
|
470 |
|
|
*/
|
471 |
|
|
static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
472 |
|
|
{
|
473 |
|
|
u8 irq;
|
474 |
|
|
irq = 0;
|
475 |
|
|
if (pirq <= 4)
|
476 |
|
|
{
|
477 |
|
|
irq = read_config_nybble(router, 0x56, pirq - 1);
|
478 |
|
|
}
|
479 |
|
|
printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
|
480 |
|
|
dev->vendor, dev->device, pirq, irq);
|
481 |
|
|
return irq;
|
482 |
|
|
}
|
483 |
|
|
|
484 |
|
|
static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
485 |
|
|
{
|
486 |
|
|
printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
|
487 |
|
|
dev->vendor, dev->device, pirq, irq);
|
488 |
|
|
if (pirq <= 4)
|
489 |
|
|
{
|
490 |
|
|
write_config_nybble(router, 0x56, pirq - 1, irq);
|
491 |
|
|
}
|
492 |
|
|
return 1;
|
493 |
|
|
}
|
494 |
|
|
|
495 |
|
|
/*
|
496 |
|
|
* PicoPower PT86C523
|
497 |
|
|
*/
|
498 |
|
|
static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
|
499 |
|
|
{
|
500 |
|
|
outb(0x10 + ((pirq - 1) >> 1), 0x24);
|
501 |
|
|
return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
|
502 |
|
|
}
|
503 |
|
|
|
504 |
|
|
static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
|
505 |
|
|
int irq)
|
506 |
|
|
{
|
507 |
|
|
unsigned int x;
|
508 |
|
|
outb(0x10 + ((pirq - 1) >> 1), 0x24);
|
509 |
|
|
x = inb(0x26);
|
510 |
|
|
x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq));
|
511 |
|
|
outb(x, 0x26);
|
512 |
|
|
return 1;
|
513 |
|
|
}
|
514 |
|
|
|
515 |
|
|
#ifdef CONFIG_PCI_BIOS
|
516 |
|
|
|
517 |
|
|
static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
|
518 |
|
|
{
|
519 |
|
|
struct pci_dev *bridge;
|
520 |
|
|
int pin = pci_get_interrupt_pin(dev, &bridge);
|
521 |
|
|
return pcibios_set_irq_routing(bridge, pin, irq);
|
522 |
|
|
}
|
523 |
|
|
|
524 |
|
|
#endif
|
525 |
|
|
|
526 |
|
|
static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
527 |
|
|
{
|
528 |
|
|
static struct pci_device_id __initdata pirq_440gx[] = {
|
529 |
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
|
530 |
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
|
531 |
|
|
{ },
|
532 |
|
|
};
|
533 |
|
|
|
534 |
|
|
/* 440GX has a proprietary PIRQ router -- don't use it */
|
535 |
|
|
if (pci_dev_present(pirq_440gx))
|
536 |
|
|
return 0;
|
537 |
|
|
|
538 |
|
|
switch(device)
|
539 |
|
|
{
|
540 |
|
|
case PCI_DEVICE_ID_INTEL_82371FB_0:
|
541 |
|
|
case PCI_DEVICE_ID_INTEL_82371SB_0:
|
542 |
|
|
case PCI_DEVICE_ID_INTEL_82371AB_0:
|
543 |
|
|
case PCI_DEVICE_ID_INTEL_82371MX:
|
544 |
|
|
case PCI_DEVICE_ID_INTEL_82443MX_0:
|
545 |
|
|
case PCI_DEVICE_ID_INTEL_82801AA_0:
|
546 |
|
|
case PCI_DEVICE_ID_INTEL_82801AB_0:
|
547 |
|
|
case PCI_DEVICE_ID_INTEL_82801BA_0:
|
548 |
|
|
case PCI_DEVICE_ID_INTEL_82801BA_10:
|
549 |
|
|
case PCI_DEVICE_ID_INTEL_82801CA_0:
|
550 |
|
|
case PCI_DEVICE_ID_INTEL_82801CA_12:
|
551 |
|
|
case PCI_DEVICE_ID_INTEL_82801DB_0:
|
552 |
|
|
case PCI_DEVICE_ID_INTEL_82801E_0:
|
553 |
|
|
case PCI_DEVICE_ID_INTEL_82801EB_0:
|
554 |
|
|
case PCI_DEVICE_ID_INTEL_ESB_1:
|
555 |
|
|
case PCI_DEVICE_ID_INTEL_ICH6_0:
|
556 |
|
|
case PCI_DEVICE_ID_INTEL_ICH6_1:
|
557 |
|
|
case PCI_DEVICE_ID_INTEL_ICH7_0:
|
558 |
|
|
case PCI_DEVICE_ID_INTEL_ICH7_1:
|
559 |
|
|
case PCI_DEVICE_ID_INTEL_ICH7_30:
|
560 |
|
|
case PCI_DEVICE_ID_INTEL_ICH7_31:
|
561 |
|
|
case PCI_DEVICE_ID_INTEL_ESB2_0:
|
562 |
|
|
case PCI_DEVICE_ID_INTEL_ICH8_0:
|
563 |
|
|
case PCI_DEVICE_ID_INTEL_ICH8_1:
|
564 |
|
|
case PCI_DEVICE_ID_INTEL_ICH8_2:
|
565 |
|
|
case PCI_DEVICE_ID_INTEL_ICH8_3:
|
566 |
|
|
case PCI_DEVICE_ID_INTEL_ICH8_4:
|
567 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_0:
|
568 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_1:
|
569 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_2:
|
570 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_3:
|
571 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_4:
|
572 |
|
|
case PCI_DEVICE_ID_INTEL_ICH9_5:
|
573 |
|
|
case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
|
574 |
|
|
r->name = "PIIX/ICH";
|
575 |
|
|
r->get = pirq_piix_get;
|
576 |
|
|
r->set = pirq_piix_set;
|
577 |
|
|
return 1;
|
578 |
|
|
}
|
579 |
|
|
return 0;
|
580 |
|
|
}
|
581 |
|
|
|
582 |
|
|
static __init int via_router_probe(struct irq_router *r,
|
583 |
|
|
struct pci_dev *router, u16 device)
|
584 |
|
|
{
|
585 |
|
|
/* FIXME: We should move some of the quirk fixup stuff here */
|
586 |
|
|
|
587 |
|
|
/*
|
588 |
|
|
* workarounds for some buggy BIOSes
|
589 |
|
|
*/
|
590 |
|
|
if (device == PCI_DEVICE_ID_VIA_82C586_0) {
|
591 |
|
|
switch(router->device) {
|
592 |
|
|
case PCI_DEVICE_ID_VIA_82C686:
|
593 |
|
|
/*
|
594 |
|
|
* Asus k7m bios wrongly reports 82C686A
|
595 |
|
|
* as 586-compatible
|
596 |
|
|
*/
|
597 |
|
|
device = PCI_DEVICE_ID_VIA_82C686;
|
598 |
|
|
break;
|
599 |
|
|
case PCI_DEVICE_ID_VIA_8235:
|
600 |
|
|
/**
|
601 |
|
|
* Asus a7v-x bios wrongly reports 8235
|
602 |
|
|
* as 586-compatible
|
603 |
|
|
*/
|
604 |
|
|
device = PCI_DEVICE_ID_VIA_8235;
|
605 |
|
|
break;
|
606 |
|
|
}
|
607 |
|
|
}
|
608 |
|
|
|
609 |
|
|
switch(device) {
|
610 |
|
|
case PCI_DEVICE_ID_VIA_82C586_0:
|
611 |
|
|
r->name = "VIA";
|
612 |
|
|
r->get = pirq_via586_get;
|
613 |
|
|
r->set = pirq_via586_set;
|
614 |
|
|
return 1;
|
615 |
|
|
case PCI_DEVICE_ID_VIA_82C596:
|
616 |
|
|
case PCI_DEVICE_ID_VIA_82C686:
|
617 |
|
|
case PCI_DEVICE_ID_VIA_8231:
|
618 |
|
|
case PCI_DEVICE_ID_VIA_8233A:
|
619 |
|
|
case PCI_DEVICE_ID_VIA_8235:
|
620 |
|
|
case PCI_DEVICE_ID_VIA_8237:
|
621 |
|
|
/* FIXME: add new ones for 8233/5 */
|
622 |
|
|
r->name = "VIA";
|
623 |
|
|
r->get = pirq_via_get;
|
624 |
|
|
r->set = pirq_via_set;
|
625 |
|
|
return 1;
|
626 |
|
|
}
|
627 |
|
|
return 0;
|
628 |
|
|
}
|
629 |
|
|
|
630 |
|
|
static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
631 |
|
|
{
|
632 |
|
|
switch(device)
|
633 |
|
|
{
|
634 |
|
|
case PCI_DEVICE_ID_VLSI_82C534:
|
635 |
|
|
r->name = "VLSI 82C534";
|
636 |
|
|
r->get = pirq_vlsi_get;
|
637 |
|
|
r->set = pirq_vlsi_set;
|
638 |
|
|
return 1;
|
639 |
|
|
}
|
640 |
|
|
return 0;
|
641 |
|
|
}
|
642 |
|
|
|
643 |
|
|
|
644 |
|
|
static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
645 |
|
|
{
|
646 |
|
|
switch(device)
|
647 |
|
|
{
|
648 |
|
|
case PCI_DEVICE_ID_SERVERWORKS_OSB4:
|
649 |
|
|
case PCI_DEVICE_ID_SERVERWORKS_CSB5:
|
650 |
|
|
r->name = "ServerWorks";
|
651 |
|
|
r->get = pirq_serverworks_get;
|
652 |
|
|
r->set = pirq_serverworks_set;
|
653 |
|
|
return 1;
|
654 |
|
|
}
|
655 |
|
|
return 0;
|
656 |
|
|
}
|
657 |
|
|
|
658 |
|
|
static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
659 |
|
|
{
|
660 |
|
|
if (device != PCI_DEVICE_ID_SI_503)
|
661 |
|
|
return 0;
|
662 |
|
|
|
663 |
|
|
r->name = "SIS";
|
664 |
|
|
r->get = pirq_sis_get;
|
665 |
|
|
r->set = pirq_sis_set;
|
666 |
|
|
return 1;
|
667 |
|
|
}
|
668 |
|
|
|
669 |
|
|
static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
670 |
|
|
{
|
671 |
|
|
switch(device)
|
672 |
|
|
{
|
673 |
|
|
case PCI_DEVICE_ID_CYRIX_5520:
|
674 |
|
|
r->name = "NatSemi";
|
675 |
|
|
r->get = pirq_cyrix_get;
|
676 |
|
|
r->set = pirq_cyrix_set;
|
677 |
|
|
return 1;
|
678 |
|
|
}
|
679 |
|
|
return 0;
|
680 |
|
|
}
|
681 |
|
|
|
682 |
|
|
static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
683 |
|
|
{
|
684 |
|
|
switch(device)
|
685 |
|
|
{
|
686 |
|
|
case PCI_DEVICE_ID_OPTI_82C700:
|
687 |
|
|
r->name = "OPTI";
|
688 |
|
|
r->get = pirq_opti_get;
|
689 |
|
|
r->set = pirq_opti_set;
|
690 |
|
|
return 1;
|
691 |
|
|
}
|
692 |
|
|
return 0;
|
693 |
|
|
}
|
694 |
|
|
|
695 |
|
|
static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
696 |
|
|
{
|
697 |
|
|
switch(device)
|
698 |
|
|
{
|
699 |
|
|
case PCI_DEVICE_ID_ITE_IT8330G_0:
|
700 |
|
|
r->name = "ITE";
|
701 |
|
|
r->get = pirq_ite_get;
|
702 |
|
|
r->set = pirq_ite_set;
|
703 |
|
|
return 1;
|
704 |
|
|
}
|
705 |
|
|
return 0;
|
706 |
|
|
}
|
707 |
|
|
|
708 |
|
|
static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
709 |
|
|
{
|
710 |
|
|
switch(device)
|
711 |
|
|
{
|
712 |
|
|
case PCI_DEVICE_ID_AL_M1533:
|
713 |
|
|
case PCI_DEVICE_ID_AL_M1563:
|
714 |
|
|
printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
|
715 |
|
|
r->name = "ALI";
|
716 |
|
|
r->get = pirq_ali_get;
|
717 |
|
|
r->set = pirq_ali_set;
|
718 |
|
|
return 1;
|
719 |
|
|
}
|
720 |
|
|
return 0;
|
721 |
|
|
}
|
722 |
|
|
|
723 |
|
|
static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
724 |
|
|
{
|
725 |
|
|
switch(device)
|
726 |
|
|
{
|
727 |
|
|
case PCI_DEVICE_ID_AMD_VIPER_740B:
|
728 |
|
|
r->name = "AMD756";
|
729 |
|
|
break;
|
730 |
|
|
case PCI_DEVICE_ID_AMD_VIPER_7413:
|
731 |
|
|
r->name = "AMD766";
|
732 |
|
|
break;
|
733 |
|
|
case PCI_DEVICE_ID_AMD_VIPER_7443:
|
734 |
|
|
r->name = "AMD768";
|
735 |
|
|
break;
|
736 |
|
|
default:
|
737 |
|
|
return 0;
|
738 |
|
|
}
|
739 |
|
|
r->get = pirq_amd756_get;
|
740 |
|
|
r->set = pirq_amd756_set;
|
741 |
|
|
return 1;
|
742 |
|
|
}
|
743 |
|
|
|
744 |
|
|
static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
|
745 |
|
|
{
|
746 |
|
|
switch (device) {
|
747 |
|
|
case PCI_DEVICE_ID_PICOPOWER_PT86C523:
|
748 |
|
|
r->name = "PicoPower PT86C523";
|
749 |
|
|
r->get = pirq_pico_get;
|
750 |
|
|
r->set = pirq_pico_set;
|
751 |
|
|
return 1;
|
752 |
|
|
|
753 |
|
|
case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP:
|
754 |
|
|
r->name = "PicoPower PT86C523 rev. BB+";
|
755 |
|
|
r->get = pirq_pico_get;
|
756 |
|
|
r->set = pirq_pico_set;
|
757 |
|
|
return 1;
|
758 |
|
|
}
|
759 |
|
|
return 0;
|
760 |
|
|
}
|
761 |
|
|
|
762 |
|
|
static __initdata struct irq_router_handler pirq_routers[] = {
|
763 |
|
|
{ PCI_VENDOR_ID_INTEL, intel_router_probe },
|
764 |
|
|
{ PCI_VENDOR_ID_AL, ali_router_probe },
|
765 |
|
|
{ PCI_VENDOR_ID_ITE, ite_router_probe },
|
766 |
|
|
{ PCI_VENDOR_ID_VIA, via_router_probe },
|
767 |
|
|
{ PCI_VENDOR_ID_OPTI, opti_router_probe },
|
768 |
|
|
{ PCI_VENDOR_ID_SI, sis_router_probe },
|
769 |
|
|
{ PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
|
770 |
|
|
{ PCI_VENDOR_ID_VLSI, vlsi_router_probe },
|
771 |
|
|
{ PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
|
772 |
|
|
{ PCI_VENDOR_ID_AMD, amd_router_probe },
|
773 |
|
|
{ PCI_VENDOR_ID_PICOPOWER, pico_router_probe },
|
774 |
|
|
/* Someone with docs needs to add the ATI Radeon IGP */
|
775 |
|
|
{ 0, NULL }
|
776 |
|
|
};
|
777 |
|
|
static struct irq_router pirq_router;
|
778 |
|
|
static struct pci_dev *pirq_router_dev;
|
779 |
|
|
|
780 |
|
|
|
781 |
|
|
/*
|
782 |
|
|
* FIXME: should we have an option to say "generic for
|
783 |
|
|
* chipset" ?
|
784 |
|
|
*/
|
785 |
|
|
|
786 |
|
|
static void __init pirq_find_router(struct irq_router *r)
|
787 |
|
|
{
|
788 |
|
|
struct irq_routing_table *rt = pirq_table;
|
789 |
|
|
struct irq_router_handler *h;
|
790 |
|
|
|
791 |
|
|
#ifdef CONFIG_PCI_BIOS
|
792 |
|
|
if (!rt->signature) {
|
793 |
|
|
printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
|
794 |
|
|
r->set = pirq_bios_set;
|
795 |
|
|
r->name = "BIOS";
|
796 |
|
|
return;
|
797 |
|
|
}
|
798 |
|
|
#endif
|
799 |
|
|
|
800 |
|
|
/* Default unless a driver reloads it */
|
801 |
|
|
r->name = "default";
|
802 |
|
|
r->get = NULL;
|
803 |
|
|
r->set = NULL;
|
804 |
|
|
|
805 |
|
|
DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
|
806 |
|
|
rt->rtr_vendor, rt->rtr_device);
|
807 |
|
|
|
808 |
|
|
pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
|
809 |
|
|
if (!pirq_router_dev) {
|
810 |
|
|
DBG(KERN_DEBUG "PCI: Interrupt router not found at "
|
811 |
|
|
"%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
|
812 |
|
|
return;
|
813 |
|
|
}
|
814 |
|
|
|
815 |
|
|
for( h = pirq_routers; h->vendor; h++) {
|
816 |
|
|
/* First look for a router match */
|
817 |
|
|
if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
|
818 |
|
|
break;
|
819 |
|
|
/* Fall back to a device match */
|
820 |
|
|
if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
|
821 |
|
|
break;
|
822 |
|
|
}
|
823 |
|
|
printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
|
824 |
|
|
pirq_router.name,
|
825 |
|
|
pirq_router_dev->vendor,
|
826 |
|
|
pirq_router_dev->device,
|
827 |
|
|
pci_name(pirq_router_dev));
|
828 |
|
|
|
829 |
|
|
/* The device remains referenced for the kernel lifetime */
|
830 |
|
|
}
|
831 |
|
|
|
832 |
|
|
static struct irq_info *pirq_get_info(struct pci_dev *dev)
|
833 |
|
|
{
|
834 |
|
|
struct irq_routing_table *rt = pirq_table;
|
835 |
|
|
int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
|
836 |
|
|
struct irq_info *info;
|
837 |
|
|
|
838 |
|
|
for (info = rt->slots; entries--; info++)
|
839 |
|
|
if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
|
840 |
|
|
return info;
|
841 |
|
|
return NULL;
|
842 |
|
|
}
|
843 |
|
|
|
844 |
|
|
static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
|
845 |
|
|
{
|
846 |
|
|
u8 pin;
|
847 |
|
|
struct irq_info *info;
|
848 |
|
|
int i, pirq, newirq;
|
849 |
|
|
int irq = 0;
|
850 |
|
|
u32 mask;
|
851 |
|
|
struct irq_router *r = &pirq_router;
|
852 |
|
|
struct pci_dev *dev2 = NULL;
|
853 |
|
|
char *msg = NULL;
|
854 |
|
|
|
855 |
|
|
/* Find IRQ pin */
|
856 |
|
|
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
857 |
|
|
if (!pin) {
|
858 |
|
|
DBG(KERN_DEBUG " -> no interrupt pin\n");
|
859 |
|
|
return 0;
|
860 |
|
|
}
|
861 |
|
|
pin = pin - 1;
|
862 |
|
|
|
863 |
|
|
/* Find IRQ routing entry */
|
864 |
|
|
|
865 |
|
|
if (!pirq_table)
|
866 |
|
|
return 0;
|
867 |
|
|
|
868 |
|
|
DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
|
869 |
|
|
info = pirq_get_info(dev);
|
870 |
|
|
if (!info) {
|
871 |
|
|
DBG(" -> not found in routing table\n" KERN_DEBUG);
|
872 |
|
|
return 0;
|
873 |
|
|
}
|
874 |
|
|
pirq = info->irq[pin].link;
|
875 |
|
|
mask = info->irq[pin].bitmap;
|
876 |
|
|
if (!pirq) {
|
877 |
|
|
DBG(" -> not routed\n" KERN_DEBUG);
|
878 |
|
|
return 0;
|
879 |
|
|
}
|
880 |
|
|
DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
|
881 |
|
|
mask &= pcibios_irq_mask;
|
882 |
|
|
|
883 |
|
|
/* Work around broken HP Pavilion Notebooks which assign USB to
|
884 |
|
|
IRQ 9 even though it is actually wired to IRQ 11 */
|
885 |
|
|
|
886 |
|
|
if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
|
887 |
|
|
dev->irq = 11;
|
888 |
|
|
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
|
889 |
|
|
r->set(pirq_router_dev, dev, pirq, 11);
|
890 |
|
|
}
|
891 |
|
|
|
892 |
|
|
/* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
|
893 |
|
|
if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
|
894 |
|
|
pirq = 0x68;
|
895 |
|
|
mask = 0x400;
|
896 |
|
|
dev->irq = r->get(pirq_router_dev, dev, pirq);
|
897 |
|
|
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
|
898 |
|
|
}
|
899 |
|
|
|
900 |
|
|
/*
|
901 |
|
|
* Find the best IRQ to assign: use the one
|
902 |
|
|
* reported by the device if possible.
|
903 |
|
|
*/
|
904 |
|
|
newirq = dev->irq;
|
905 |
|
|
if (newirq && !((1 << newirq) & mask)) {
|
906 |
|
|
if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
|
907 |
|
|
else printk("\n" KERN_WARNING
|
908 |
|
|
"PCI: IRQ %i for device %s doesn't match PIRQ mask "
|
909 |
|
|
"- try pci=usepirqmask\n" KERN_DEBUG, newirq,
|
910 |
|
|
pci_name(dev));
|
911 |
|
|
}
|
912 |
|
|
if (!newirq && assign) {
|
913 |
|
|
for (i = 0; i < 16; i++) {
|
914 |
|
|
if (!(mask & (1 << i)))
|
915 |
|
|
continue;
|
916 |
|
|
if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
|
917 |
|
|
newirq = i;
|
918 |
|
|
}
|
919 |
|
|
}
|
920 |
|
|
DBG(" -> newirq=%d", newirq);
|
921 |
|
|
|
922 |
|
|
/* Check if it is hardcoded */
|
923 |
|
|
if ((pirq & 0xf0) == 0xf0) {
|
924 |
|
|
irq = pirq & 0xf;
|
925 |
|
|
DBG(" -> hardcoded IRQ %d\n", irq);
|
926 |
|
|
msg = "Hardcoded";
|
927 |
|
|
} else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
|
928 |
|
|
((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
|
929 |
|
|
DBG(" -> got IRQ %d\n", irq);
|
930 |
|
|
msg = "Found";
|
931 |
|
|
eisa_set_level_irq(irq);
|
932 |
|
|
} else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
|
933 |
|
|
DBG(" -> assigning IRQ %d", newirq);
|
934 |
|
|
if (r->set(pirq_router_dev, dev, pirq, newirq)) {
|
935 |
|
|
eisa_set_level_irq(newirq);
|
936 |
|
|
DBG(" ... OK\n");
|
937 |
|
|
msg = "Assigned";
|
938 |
|
|
irq = newirq;
|
939 |
|
|
}
|
940 |
|
|
}
|
941 |
|
|
|
942 |
|
|
if (!irq) {
|
943 |
|
|
DBG(" ... failed\n");
|
944 |
|
|
if (newirq && mask == (1 << newirq)) {
|
945 |
|
|
msg = "Guessed";
|
946 |
|
|
irq = newirq;
|
947 |
|
|
} else
|
948 |
|
|
return 0;
|
949 |
|
|
}
|
950 |
|
|
printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
|
951 |
|
|
|
952 |
|
|
/* Update IRQ for all devices with the same pirq value */
|
953 |
|
|
while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
|
954 |
|
|
pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
|
955 |
|
|
if (!pin)
|
956 |
|
|
continue;
|
957 |
|
|
pin--;
|
958 |
|
|
info = pirq_get_info(dev2);
|
959 |
|
|
if (!info)
|
960 |
|
|
continue;
|
961 |
|
|
if (info->irq[pin].link == pirq) {
|
962 |
|
|
/* We refuse to override the dev->irq information. Give a warning! */
|
963 |
|
|
if ( dev2->irq && dev2->irq != irq && \
|
964 |
|
|
(!(pci_probe & PCI_USE_PIRQ_MASK) || \
|
965 |
|
|
((1 << dev2->irq) & mask)) ) {
|
966 |
|
|
#ifndef CONFIG_PCI_MSI
|
967 |
|
|
printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
|
968 |
|
|
pci_name(dev2), dev2->irq, irq);
|
969 |
|
|
#endif
|
970 |
|
|
continue;
|
971 |
|
|
}
|
972 |
|
|
dev2->irq = irq;
|
973 |
|
|
pirq_penalty[irq]++;
|
974 |
|
|
if (dev != dev2)
|
975 |
|
|
printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
|
976 |
|
|
}
|
977 |
|
|
}
|
978 |
|
|
return 1;
|
979 |
|
|
}
|
980 |
|
|
|
981 |
|
|
static void __init pcibios_fixup_irqs(void)
|
982 |
|
|
{
|
983 |
|
|
struct pci_dev *dev = NULL;
|
984 |
|
|
u8 pin;
|
985 |
|
|
|
986 |
|
|
DBG(KERN_DEBUG "PCI: IRQ fixup\n");
|
987 |
|
|
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
|
988 |
|
|
/*
|
989 |
|
|
* If the BIOS has set an out of range IRQ number, just ignore it.
|
990 |
|
|
* Also keep track of which IRQ's are already in use.
|
991 |
|
|
*/
|
992 |
|
|
if (dev->irq >= 16) {
|
993 |
|
|
DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
|
994 |
|
|
dev->irq = 0;
|
995 |
|
|
}
|
996 |
|
|
/* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
|
997 |
|
|
if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
|
998 |
|
|
pirq_penalty[dev->irq] = 0;
|
999 |
|
|
pirq_penalty[dev->irq]++;
|
1000 |
|
|
}
|
1001 |
|
|
|
1002 |
|
|
dev = NULL;
|
1003 |
|
|
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
|
1004 |
|
|
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
1005 |
|
|
#ifdef CONFIG_X86_IO_APIC
|
1006 |
|
|
/*
|
1007 |
|
|
* Recalculate IRQ numbers if we use the I/O APIC.
|
1008 |
|
|
*/
|
1009 |
|
|
if (io_apic_assign_pci_irqs)
|
1010 |
|
|
{
|
1011 |
|
|
int irq;
|
1012 |
|
|
|
1013 |
|
|
if (pin) {
|
1014 |
|
|
pin--; /* interrupt pins are numbered starting from 1 */
|
1015 |
|
|
irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
|
1016 |
|
|
/*
|
1017 |
|
|
* Busses behind bridges are typically not listed in the MP-table.
|
1018 |
|
|
* In this case we have to look up the IRQ based on the parent bus,
|
1019 |
|
|
* parent slot, and pin number. The SMP code detects such bridged
|
1020 |
|
|
* busses itself so we should get into this branch reliably.
|
1021 |
|
|
*/
|
1022 |
|
|
if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
|
1023 |
|
|
struct pci_dev * bridge = dev->bus->self;
|
1024 |
|
|
|
1025 |
|
|
pin = (pin + PCI_SLOT(dev->devfn)) % 4;
|
1026 |
|
|
irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
|
1027 |
|
|
PCI_SLOT(bridge->devfn), pin);
|
1028 |
|
|
if (irq >= 0)
|
1029 |
|
|
printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
|
1030 |
|
|
pci_name(bridge), 'A' + pin, irq);
|
1031 |
|
|
}
|
1032 |
|
|
if (irq >= 0) {
|
1033 |
|
|
printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
|
1034 |
|
|
pci_name(dev), 'A' + pin, irq);
|
1035 |
|
|
dev->irq = irq;
|
1036 |
|
|
}
|
1037 |
|
|
}
|
1038 |
|
|
}
|
1039 |
|
|
#endif
|
1040 |
|
|
/*
|
1041 |
|
|
* Still no IRQ? Try to lookup one...
|
1042 |
|
|
*/
|
1043 |
|
|
if (pin && !dev->irq)
|
1044 |
|
|
pcibios_lookup_irq(dev, 0);
|
1045 |
|
|
}
|
1046 |
|
|
}
|
1047 |
|
|
|
1048 |
|
|
/*
|
1049 |
|
|
* Work around broken HP Pavilion Notebooks which assign USB to
|
1050 |
|
|
* IRQ 9 even though it is actually wired to IRQ 11
|
1051 |
|
|
*/
|
1052 |
|
|
static int __init fix_broken_hp_bios_irq9(const struct dmi_system_id *d)
|
1053 |
|
|
{
|
1054 |
|
|
if (!broken_hp_bios_irq9) {
|
1055 |
|
|
broken_hp_bios_irq9 = 1;
|
1056 |
|
|
printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
|
1057 |
|
|
}
|
1058 |
|
|
return 0;
|
1059 |
|
|
}
|
1060 |
|
|
|
1061 |
|
|
/*
|
1062 |
|
|
* Work around broken Acer TravelMate 360 Notebooks which assign
|
1063 |
|
|
* Cardbus to IRQ 11 even though it is actually wired to IRQ 10
|
1064 |
|
|
*/
|
1065 |
|
|
static int __init fix_acer_tm360_irqrouting(const struct dmi_system_id *d)
|
1066 |
|
|
{
|
1067 |
|
|
if (!acer_tm360_irqrouting) {
|
1068 |
|
|
acer_tm360_irqrouting = 1;
|
1069 |
|
|
printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
|
1070 |
|
|
}
|
1071 |
|
|
return 0;
|
1072 |
|
|
}
|
1073 |
|
|
|
1074 |
|
|
static struct dmi_system_id __initdata pciirq_dmi_table[] = {
|
1075 |
|
|
{
|
1076 |
|
|
.callback = fix_broken_hp_bios_irq9,
|
1077 |
|
|
.ident = "HP Pavilion N5400 Series Laptop",
|
1078 |
|
|
.matches = {
|
1079 |
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
1080 |
|
|
DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
|
1081 |
|
|
DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
|
1082 |
|
|
DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
|
1083 |
|
|
},
|
1084 |
|
|
},
|
1085 |
|
|
{
|
1086 |
|
|
.callback = fix_acer_tm360_irqrouting,
|
1087 |
|
|
.ident = "Acer TravelMate 36x Laptop",
|
1088 |
|
|
.matches = {
|
1089 |
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
1090 |
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
|
1091 |
|
|
},
|
1092 |
|
|
},
|
1093 |
|
|
{ }
|
1094 |
|
|
};
|
1095 |
|
|
|
1096 |
|
|
static int __init pcibios_irq_init(void)
|
1097 |
|
|
{
|
1098 |
|
|
DBG(KERN_DEBUG "PCI: IRQ init\n");
|
1099 |
|
|
|
1100 |
|
|
if (pcibios_enable_irq || raw_pci_ops == NULL)
|
1101 |
|
|
return 0;
|
1102 |
|
|
|
1103 |
|
|
dmi_check_system(pciirq_dmi_table);
|
1104 |
|
|
|
1105 |
|
|
pirq_table = pirq_find_routing_table();
|
1106 |
|
|
|
1107 |
|
|
#ifdef CONFIG_PCI_BIOS
|
1108 |
|
|
if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
|
1109 |
|
|
pirq_table = pcibios_get_irq_routing_table();
|
1110 |
|
|
#endif
|
1111 |
|
|
if (pirq_table) {
|
1112 |
|
|
pirq_peer_trick();
|
1113 |
|
|
pirq_find_router(&pirq_router);
|
1114 |
|
|
if (pirq_table->exclusive_irqs) {
|
1115 |
|
|
int i;
|
1116 |
|
|
for (i=0; i<16; i++)
|
1117 |
|
|
if (!(pirq_table->exclusive_irqs & (1 << i)))
|
1118 |
|
|
pirq_penalty[i] += 100;
|
1119 |
|
|
}
|
1120 |
|
|
/* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
|
1121 |
|
|
if (io_apic_assign_pci_irqs)
|
1122 |
|
|
pirq_table = NULL;
|
1123 |
|
|
}
|
1124 |
|
|
|
1125 |
|
|
pcibios_enable_irq = pirq_enable_irq;
|
1126 |
|
|
|
1127 |
|
|
pcibios_fixup_irqs();
|
1128 |
|
|
return 0;
|
1129 |
|
|
}
|
1130 |
|
|
|
1131 |
|
|
subsys_initcall(pcibios_irq_init);
|
1132 |
|
|
|
1133 |
|
|
|
1134 |
|
|
static void pirq_penalize_isa_irq(int irq, int active)
|
1135 |
|
|
{
|
1136 |
|
|
/*
|
1137 |
|
|
* If any ISAPnP device reports an IRQ in its list of possible
|
1138 |
|
|
* IRQ's, we try to avoid assigning it to PCI devices.
|
1139 |
|
|
*/
|
1140 |
|
|
if (irq < 16) {
|
1141 |
|
|
if (active)
|
1142 |
|
|
pirq_penalty[irq] += 1000;
|
1143 |
|
|
else
|
1144 |
|
|
pirq_penalty[irq] += 100;
|
1145 |
|
|
}
|
1146 |
|
|
}
|
1147 |
|
|
|
1148 |
|
|
void pcibios_penalize_isa_irq(int irq, int active)
|
1149 |
|
|
{
|
1150 |
|
|
#ifdef CONFIG_ACPI
|
1151 |
|
|
if (!acpi_noirq)
|
1152 |
|
|
acpi_penalize_isa_irq(irq, active);
|
1153 |
|
|
else
|
1154 |
|
|
#endif
|
1155 |
|
|
pirq_penalize_isa_irq(irq, active);
|
1156 |
|
|
}
|
1157 |
|
|
|
1158 |
|
|
static int pirq_enable_irq(struct pci_dev *dev)
|
1159 |
|
|
{
|
1160 |
|
|
u8 pin;
|
1161 |
|
|
struct pci_dev *temp_dev;
|
1162 |
|
|
|
1163 |
|
|
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
|
1164 |
|
|
if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
|
1165 |
|
|
char *msg = "";
|
1166 |
|
|
|
1167 |
|
|
pin--; /* interrupt pins are numbered starting from 1 */
|
1168 |
|
|
|
1169 |
|
|
if (io_apic_assign_pci_irqs) {
|
1170 |
|
|
int irq;
|
1171 |
|
|
|
1172 |
|
|
irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
|
1173 |
|
|
/*
|
1174 |
|
|
* Busses behind bridges are typically not listed in the MP-table.
|
1175 |
|
|
* In this case we have to look up the IRQ based on the parent bus,
|
1176 |
|
|
* parent slot, and pin number. The SMP code detects such bridged
|
1177 |
|
|
* busses itself so we should get into this branch reliably.
|
1178 |
|
|
*/
|
1179 |
|
|
temp_dev = dev;
|
1180 |
|
|
while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
|
1181 |
|
|
struct pci_dev * bridge = dev->bus->self;
|
1182 |
|
|
|
1183 |
|
|
pin = (pin + PCI_SLOT(dev->devfn)) % 4;
|
1184 |
|
|
irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
|
1185 |
|
|
PCI_SLOT(bridge->devfn), pin);
|
1186 |
|
|
if (irq >= 0)
|
1187 |
|
|
printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
|
1188 |
|
|
pci_name(bridge), 'A' + pin, irq);
|
1189 |
|
|
dev = bridge;
|
1190 |
|
|
}
|
1191 |
|
|
dev = temp_dev;
|
1192 |
|
|
if (irq >= 0) {
|
1193 |
|
|
printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
|
1194 |
|
|
pci_name(dev), 'A' + pin, irq);
|
1195 |
|
|
dev->irq = irq;
|
1196 |
|
|
return 0;
|
1197 |
|
|
} else
|
1198 |
|
|
msg = " Probably buggy MP table.";
|
1199 |
|
|
} else if (pci_probe & PCI_BIOS_IRQ_SCAN)
|
1200 |
|
|
msg = "";
|
1201 |
|
|
else
|
1202 |
|
|
msg = " Please try using pci=biosirq.";
|
1203 |
|
|
|
1204 |
|
|
/* With IDE legacy devices the IRQ lookup failure is not a problem.. */
|
1205 |
|
|
if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
|
1206 |
|
|
return 0;
|
1207 |
|
|
|
1208 |
|
|
printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
|
1209 |
|
|
'A' + pin, pci_name(dev), msg);
|
1210 |
|
|
}
|
1211 |
|
|
return 0;
|
1212 |
|
|
}
|