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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [drivers/] [input/] [serio/] [i8042-or32.h] - Blame information for rev 7

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Line No. Rev Author Line
1 7 xianfeng
#ifndef _I8042_OR32_H
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#define _I8042_OR32_H
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/*
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 as published by
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 * the Free Software Foundation.
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 */
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/*
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 * Names.
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 */
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#define I8042_KBD_PHYS_DESC "isa0060/serio0"
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#define I8042_AUX_PHYS_DESC "isa0060/serio1"
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#define I8042_MUX_PHYS_DESC "isa0060/serio%d"
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/*
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 * IRQs.
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 */
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#define I8042_BASE_ADDR         0x94000000
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#define I8042_KBD_IRQ           5
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#define I8042_AUX_IRQ           5
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/*
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 * Register numbers.
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 */
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#define I8042_COMMAND_REG       (I8042_BASE_ADDR + 0x64)        
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#define I8042_STATUS_REG        (I8042_BASE_ADDR + 0x64)        
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#define I8042_DATA_REG          (I8042_BASE_ADDR + 0x60)
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static inline int i8042_read_data(void)
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{
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        return inb(I8042_DATA_REG);
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}
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static inline int i8042_read_status(void)
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{
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        return inb(I8042_STATUS_REG);
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}
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static inline void i8042_write_data(int val)
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{
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        outb(val, I8042_DATA_REG);
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        return;
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}
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static inline void i8042_write_command(int val)
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{
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        outb(val, I8042_COMMAND_REG);
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        return;
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}
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static inline int i8042_platform_init(void)
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{
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        if (!request_region(I8042_DATA_REG, 16, "i8042"))
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          return -1;
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        i8042_reset = 1;
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        return 0;
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}
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static inline void i8042_platform_exit(void)
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{
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        release_region(I8042_DATA_REG, 16);
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}
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#endif /* _I8042_OR32_H */

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