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xianfeng |
/* myri_sbus.c: MyriCOM MyriNET SBUS card driver.
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*
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* Copyright (C) 1996, 1999, 2006 David S. Miller (davem@davemloft.net)
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*/
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static char version[] =
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"myri_sbus.c:v2.0 June 23, 2006 David S. Miller (davem@davemloft.net)\n";
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/fcntl.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/in.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/bitops.h>
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#include <net/dst.h>
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#include <net/arp.h>
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#include <net/sock.h>
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#include <net/ipv6.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/byteorder.h>
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#include <asm/idprom.h>
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#include <asm/sbus.h>
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#include <asm/openprom.h>
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#include <asm/oplib.h>
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#include <asm/auxio.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include "myri_sbus.h"
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#include "myri_code.h"
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/* #define DEBUG_DETECT */
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/* #define DEBUG_IRQ */
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/* #define DEBUG_TRANSMIT */
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/* #define DEBUG_RECEIVE */
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/* #define DEBUG_HEADER */
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#ifdef DEBUG_DETECT
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#define DET(x) printk x
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#else
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#define DET(x)
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#endif
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#ifdef DEBUG_IRQ
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#define DIRQ(x) printk x
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#else
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#define DIRQ(x)
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#endif
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#ifdef DEBUG_TRANSMIT
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#define DTX(x) printk x
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#else
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#define DTX(x)
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#endif
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#ifdef DEBUG_RECEIVE
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#define DRX(x) printk x
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#else
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#define DRX(x)
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#endif
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#ifdef DEBUG_HEADER
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#define DHDR(x) printk x
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#else
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#define DHDR(x)
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#endif
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static void myri_reset_off(void __iomem *lp, void __iomem *cregs)
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{
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/* Clear IRQ mask. */
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sbus_writel(0, lp + LANAI_EIMASK);
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/* Turn RESET function off. */
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sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
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}
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static void myri_reset_on(void __iomem *cregs)
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{
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/* Enable RESET function. */
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sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
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/* Disable IRQ's. */
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sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
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}
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static void myri_disable_irq(void __iomem *lp, void __iomem *cregs)
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{
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sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
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sbus_writel(0, lp + LANAI_EIMASK);
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sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
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}
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static void myri_enable_irq(void __iomem *lp, void __iomem *cregs)
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{
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sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
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sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
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}
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static inline void bang_the_chip(struct myri_eth *mp)
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{
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struct myri_shmem __iomem *shmem = mp->shmem;
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void __iomem *cregs = mp->cregs;
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sbus_writel(1, &shmem->send);
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sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
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}
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static int myri_do_handshake(struct myri_eth *mp)
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{
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struct myri_shmem __iomem *shmem = mp->shmem;
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void __iomem *cregs = mp->cregs;
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struct myri_channel __iomem *chan = &shmem->channel;
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int tick = 0;
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DET(("myri_do_handshake: "));
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if (sbus_readl(&chan->state) == STATE_READY) {
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DET(("Already STATE_READY, failed.\n"));
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return -1; /* We're hosed... */
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}
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myri_disable_irq(mp->lregs, cregs);
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while (tick++ < 25) {
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u32 softstate;
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/* Wake it up. */
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DET(("shakedown, CONTROL_WON, "));
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sbus_writel(1, &shmem->shakedown);
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sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
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softstate = sbus_readl(&chan->state);
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DET(("chanstate[%08x] ", softstate));
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if (softstate == STATE_READY) {
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DET(("wakeup successful, "));
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break;
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}
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if (softstate != STATE_WFN) {
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DET(("not WFN setting that, "));
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sbus_writel(STATE_WFN, &chan->state);
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}
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udelay(20);
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}
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myri_enable_irq(mp->lregs, cregs);
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if (tick > 25) {
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DET(("25 ticks we lose, failure.\n"));
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return -1;
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}
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DET(("success\n"));
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return 0;
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}
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static int __devinit myri_load_lanai(struct myri_eth *mp)
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{
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struct net_device *dev = mp->dev;
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struct myri_shmem __iomem *shmem = mp->shmem;
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void __iomem *rptr;
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int i;
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myri_disable_irq(mp->lregs, mp->cregs);
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myri_reset_on(mp->cregs);
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rptr = mp->lanai;
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for (i = 0; i < mp->eeprom.ramsz; i++)
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sbus_writeb(0, rptr + i);
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if (mp->eeprom.cpuvers >= CPUVERS_3_0)
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sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
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/* Load executable code. */
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for (i = 0; i < sizeof(lanai4_code); i++)
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sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i);
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/* Load data segment. */
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for (i = 0; i < sizeof(lanai4_data); i++)
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sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i);
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/* Set device address. */
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sbus_writeb(0, &shmem->addr[0]);
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sbus_writeb(0, &shmem->addr[1]);
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for (i = 0; i < 6; i++)
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sbus_writeb(dev->dev_addr[i],
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&shmem->addr[i + 2]);
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/* Set SBUS bursts and interrupt mask. */
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sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
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sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
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/* Release the LANAI. */
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myri_disable_irq(mp->lregs, mp->cregs);
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myri_reset_off(mp->lregs, mp->cregs);
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myri_disable_irq(mp->lregs, mp->cregs);
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/* Wait for the reset to complete. */
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for (i = 0; i < 5000; i++) {
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if (sbus_readl(&shmem->channel.state) != STATE_READY)
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break;
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else
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udelay(10);
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}
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if (i == 5000)
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printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
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i = myri_do_handshake(mp);
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if (i)
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printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
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if (mp->eeprom.cpuvers == CPUVERS_4_0)
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sbus_writel(0, mp->lregs + LANAI_VERS);
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return i;
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}
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static void myri_clean_rings(struct myri_eth *mp)
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{
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struct sendq __iomem *sq = mp->sq;
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struct recvq __iomem *rq = mp->rq;
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int i;
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sbus_writel(0, &rq->tail);
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sbus_writel(0, &rq->head);
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for (i = 0; i < (RX_RING_SIZE+1); i++) {
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if (mp->rx_skbs[i] != NULL) {
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struct myri_rxd __iomem *rxd = &rq->myri_rxd[i];
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u32 dma_addr;
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dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
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sbus_unmap_single(mp->myri_sdev, dma_addr, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
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dev_kfree_skb(mp->rx_skbs[i]);
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mp->rx_skbs[i] = NULL;
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}
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}
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mp->tx_old = 0;
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sbus_writel(0, &sq->tail);
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sbus_writel(0, &sq->head);
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for (i = 0; i < TX_RING_SIZE; i++) {
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if (mp->tx_skbs[i] != NULL) {
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struct sk_buff *skb = mp->tx_skbs[i];
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struct myri_txd __iomem *txd = &sq->myri_txd[i];
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u32 dma_addr;
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dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
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sbus_unmap_single(mp->myri_sdev, dma_addr, (skb->len + 3) & ~3, SBUS_DMA_TODEVICE);
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dev_kfree_skb(mp->tx_skbs[i]);
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mp->tx_skbs[i] = NULL;
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}
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}
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}
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static void myri_init_rings(struct myri_eth *mp, int from_irq)
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{
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struct recvq __iomem *rq = mp->rq;
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struct myri_rxd __iomem *rxd = &rq->myri_rxd[0];
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struct net_device *dev = mp->dev;
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gfp_t gfp_flags = GFP_KERNEL;
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int i;
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if (from_irq || in_interrupt())
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gfp_flags = GFP_ATOMIC;
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myri_clean_rings(mp);
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for (i = 0; i < RX_RING_SIZE; i++) {
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struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags);
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u32 dma_addr;
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if (!skb)
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continue;
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mp->rx_skbs[i] = skb;
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skb->dev = dev;
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skb_put(skb, RX_ALLOC_SIZE);
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dma_addr = sbus_map_single(mp->myri_sdev, skb->data, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
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sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr);
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sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len);
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sbus_writel(i, &rxd[i].ctx);
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sbus_writel(1, &rxd[i].num_sg);
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}
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sbus_writel(0, &rq->head);
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sbus_writel(RX_RING_SIZE, &rq->tail);
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}
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static int myri_init(struct myri_eth *mp, int from_irq)
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{
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myri_init_rings(mp, from_irq);
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return 0;
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}
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static void myri_is_not_so_happy(struct myri_eth *mp)
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{
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}
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310 |
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311 |
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#ifdef DEBUG_HEADER
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312 |
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static void dump_ehdr(struct ethhdr *ehdr)
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313 |
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{
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314 |
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DECLARE_MAC_BUF(mac);
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DECLARE_MAC_BUF(mac2);
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printk("ehdr[h_dst(%s)"
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"h_source(%s)"
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"h_proto(%04x)]\n",
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print_mac(mac, ehdr->h_dest), print_mac(mac2, ehdr->h_source),
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ehdr->h_proto);
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}
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322 |
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static void dump_ehdr_and_myripad(unsigned char *stuff)
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{
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struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2);
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printk("pad[%02x:%02x]", stuff[0], stuff[1]);
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dump_ehdr(ehdr);
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}
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#endif
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331 |
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332 |
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static void myri_tx(struct myri_eth *mp, struct net_device *dev)
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333 |
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{
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334 |
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struct sendq __iomem *sq= mp->sq;
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int entry = mp->tx_old;
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int limit = sbus_readl(&sq->head);
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DTX(("entry[%d] limit[%d] ", entry, limit));
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if (entry == limit)
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return;
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341 |
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while (entry != limit) {
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342 |
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struct sk_buff *skb = mp->tx_skbs[entry];
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343 |
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u32 dma_addr;
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344 |
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345 |
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DTX(("SKB[%d] ", entry));
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346 |
|
|
dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr);
|
347 |
|
|
sbus_unmap_single(mp->myri_sdev, dma_addr, skb->len, SBUS_DMA_TODEVICE);
|
348 |
|
|
dev_kfree_skb(skb);
|
349 |
|
|
mp->tx_skbs[entry] = NULL;
|
350 |
|
|
dev->stats.tx_packets++;
|
351 |
|
|
entry = NEXT_TX(entry);
|
352 |
|
|
}
|
353 |
|
|
mp->tx_old = entry;
|
354 |
|
|
}
|
355 |
|
|
|
356 |
|
|
/* Determine the packet's protocol ID. The rule here is that we
|
357 |
|
|
* assume 802.3 if the type field is short enough to be a length.
|
358 |
|
|
* This is normal practice and works for any 'now in use' protocol.
|
359 |
|
|
*/
|
360 |
|
|
static __be16 myri_type_trans(struct sk_buff *skb, struct net_device *dev)
|
361 |
|
|
{
|
362 |
|
|
struct ethhdr *eth;
|
363 |
|
|
unsigned char *rawp;
|
364 |
|
|
|
365 |
|
|
skb_set_mac_header(skb, MYRI_PAD_LEN);
|
366 |
|
|
skb_pull(skb, dev->hard_header_len);
|
367 |
|
|
eth = eth_hdr(skb);
|
368 |
|
|
|
369 |
|
|
#ifdef DEBUG_HEADER
|
370 |
|
|
DHDR(("myri_type_trans: "));
|
371 |
|
|
dump_ehdr(eth);
|
372 |
|
|
#endif
|
373 |
|
|
if (*eth->h_dest & 1) {
|
374 |
|
|
if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0)
|
375 |
|
|
skb->pkt_type = PACKET_BROADCAST;
|
376 |
|
|
else
|
377 |
|
|
skb->pkt_type = PACKET_MULTICAST;
|
378 |
|
|
} else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) {
|
379 |
|
|
if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
|
380 |
|
|
skb->pkt_type = PACKET_OTHERHOST;
|
381 |
|
|
}
|
382 |
|
|
|
383 |
|
|
if (ntohs(eth->h_proto) >= 1536)
|
384 |
|
|
return eth->h_proto;
|
385 |
|
|
|
386 |
|
|
rawp = skb->data;
|
387 |
|
|
|
388 |
|
|
/* This is a magic hack to spot IPX packets. Older Novell breaks
|
389 |
|
|
* the protocol design and runs IPX over 802.3 without an 802.2 LLC
|
390 |
|
|
* layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
|
391 |
|
|
* won't work for fault tolerant netware but does for the rest.
|
392 |
|
|
*/
|
393 |
|
|
if (*(unsigned short *)rawp == 0xFFFF)
|
394 |
|
|
return htons(ETH_P_802_3);
|
395 |
|
|
|
396 |
|
|
/* Real 802.2 LLC */
|
397 |
|
|
return htons(ETH_P_802_2);
|
398 |
|
|
}
|
399 |
|
|
|
400 |
|
|
static void myri_rx(struct myri_eth *mp, struct net_device *dev)
|
401 |
|
|
{
|
402 |
|
|
struct recvq __iomem *rq = mp->rq;
|
403 |
|
|
struct recvq __iomem *rqa = mp->rqack;
|
404 |
|
|
int entry = sbus_readl(&rqa->head);
|
405 |
|
|
int limit = sbus_readl(&rqa->tail);
|
406 |
|
|
int drops;
|
407 |
|
|
|
408 |
|
|
DRX(("entry[%d] limit[%d] ", entry, limit));
|
409 |
|
|
if (entry == limit)
|
410 |
|
|
return;
|
411 |
|
|
drops = 0;
|
412 |
|
|
DRX(("\n"));
|
413 |
|
|
while (entry != limit) {
|
414 |
|
|
struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry];
|
415 |
|
|
u32 csum = sbus_readl(&rxdack->csum);
|
416 |
|
|
int len = sbus_readl(&rxdack->myri_scatters[0].len);
|
417 |
|
|
int index = sbus_readl(&rxdack->ctx);
|
418 |
|
|
struct myri_rxd __iomem *rxd = &rq->myri_rxd[sbus_readl(&rq->tail)];
|
419 |
|
|
struct sk_buff *skb = mp->rx_skbs[index];
|
420 |
|
|
|
421 |
|
|
/* Ack it. */
|
422 |
|
|
sbus_writel(NEXT_RX(entry), &rqa->head);
|
423 |
|
|
|
424 |
|
|
/* Check for errors. */
|
425 |
|
|
DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum));
|
426 |
|
|
sbus_dma_sync_single_for_cpu(mp->myri_sdev,
|
427 |
|
|
sbus_readl(&rxd->myri_scatters[0].addr),
|
428 |
|
|
RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
|
429 |
|
|
if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) {
|
430 |
|
|
DRX(("ERROR["));
|
431 |
|
|
dev->stats.rx_errors++;
|
432 |
|
|
if (len < (ETH_HLEN + MYRI_PAD_LEN)) {
|
433 |
|
|
DRX(("BAD_LENGTH] "));
|
434 |
|
|
dev->stats.rx_length_errors++;
|
435 |
|
|
} else {
|
436 |
|
|
DRX(("NO_PADDING] "));
|
437 |
|
|
dev->stats.rx_frame_errors++;
|
438 |
|
|
}
|
439 |
|
|
|
440 |
|
|
/* Return it to the LANAI. */
|
441 |
|
|
drop_it:
|
442 |
|
|
drops++;
|
443 |
|
|
DRX(("DROP "));
|
444 |
|
|
dev->stats.rx_dropped++;
|
445 |
|
|
sbus_dma_sync_single_for_device(mp->myri_sdev,
|
446 |
|
|
sbus_readl(&rxd->myri_scatters[0].addr),
|
447 |
|
|
RX_ALLOC_SIZE,
|
448 |
|
|
SBUS_DMA_FROMDEVICE);
|
449 |
|
|
sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
|
450 |
|
|
sbus_writel(index, &rxd->ctx);
|
451 |
|
|
sbus_writel(1, &rxd->num_sg);
|
452 |
|
|
sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
|
453 |
|
|
goto next;
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
DRX(("len[%d] ", len));
|
457 |
|
|
if (len > RX_COPY_THRESHOLD) {
|
458 |
|
|
struct sk_buff *new_skb;
|
459 |
|
|
u32 dma_addr;
|
460 |
|
|
|
461 |
|
|
DRX(("BIGBUFF "));
|
462 |
|
|
new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC);
|
463 |
|
|
if (new_skb == NULL) {
|
464 |
|
|
DRX(("skb_alloc(FAILED) "));
|
465 |
|
|
goto drop_it;
|
466 |
|
|
}
|
467 |
|
|
sbus_unmap_single(mp->myri_sdev,
|
468 |
|
|
sbus_readl(&rxd->myri_scatters[0].addr),
|
469 |
|
|
RX_ALLOC_SIZE,
|
470 |
|
|
SBUS_DMA_FROMDEVICE);
|
471 |
|
|
mp->rx_skbs[index] = new_skb;
|
472 |
|
|
new_skb->dev = dev;
|
473 |
|
|
skb_put(new_skb, RX_ALLOC_SIZE);
|
474 |
|
|
dma_addr = sbus_map_single(mp->myri_sdev,
|
475 |
|
|
new_skb->data,
|
476 |
|
|
RX_ALLOC_SIZE,
|
477 |
|
|
SBUS_DMA_FROMDEVICE);
|
478 |
|
|
sbus_writel(dma_addr, &rxd->myri_scatters[0].addr);
|
479 |
|
|
sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
|
480 |
|
|
sbus_writel(index, &rxd->ctx);
|
481 |
|
|
sbus_writel(1, &rxd->num_sg);
|
482 |
|
|
sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
|
483 |
|
|
|
484 |
|
|
/* Trim the original skb for the netif. */
|
485 |
|
|
DRX(("trim(%d) ", len));
|
486 |
|
|
skb_trim(skb, len);
|
487 |
|
|
} else {
|
488 |
|
|
struct sk_buff *copy_skb = dev_alloc_skb(len);
|
489 |
|
|
|
490 |
|
|
DRX(("SMALLBUFF "));
|
491 |
|
|
if (copy_skb == NULL) {
|
492 |
|
|
DRX(("dev_alloc_skb(FAILED) "));
|
493 |
|
|
goto drop_it;
|
494 |
|
|
}
|
495 |
|
|
/* DMA sync already done above. */
|
496 |
|
|
copy_skb->dev = dev;
|
497 |
|
|
DRX(("resv_and_put "));
|
498 |
|
|
skb_put(copy_skb, len);
|
499 |
|
|
skb_copy_from_linear_data(skb, copy_skb->data, len);
|
500 |
|
|
|
501 |
|
|
/* Reuse original ring buffer. */
|
502 |
|
|
DRX(("reuse "));
|
503 |
|
|
sbus_dma_sync_single_for_device(mp->myri_sdev,
|
504 |
|
|
sbus_readl(&rxd->myri_scatters[0].addr),
|
505 |
|
|
RX_ALLOC_SIZE,
|
506 |
|
|
SBUS_DMA_FROMDEVICE);
|
507 |
|
|
sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
|
508 |
|
|
sbus_writel(index, &rxd->ctx);
|
509 |
|
|
sbus_writel(1, &rxd->num_sg);
|
510 |
|
|
sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
|
511 |
|
|
|
512 |
|
|
skb = copy_skb;
|
513 |
|
|
}
|
514 |
|
|
|
515 |
|
|
/* Just like the happy meal we get checksums from this card. */
|
516 |
|
|
skb->csum = csum;
|
517 |
|
|
skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */
|
518 |
|
|
|
519 |
|
|
skb->protocol = myri_type_trans(skb, dev);
|
520 |
|
|
DRX(("prot[%04x] netif_rx ", skb->protocol));
|
521 |
|
|
netif_rx(skb);
|
522 |
|
|
|
523 |
|
|
dev->last_rx = jiffies;
|
524 |
|
|
dev->stats.rx_packets++;
|
525 |
|
|
dev->stats.rx_bytes += len;
|
526 |
|
|
next:
|
527 |
|
|
DRX(("NEXT\n"));
|
528 |
|
|
entry = NEXT_RX(entry);
|
529 |
|
|
}
|
530 |
|
|
}
|
531 |
|
|
|
532 |
|
|
static irqreturn_t myri_interrupt(int irq, void *dev_id)
|
533 |
|
|
{
|
534 |
|
|
struct net_device *dev = (struct net_device *) dev_id;
|
535 |
|
|
struct myri_eth *mp = (struct myri_eth *) dev->priv;
|
536 |
|
|
void __iomem *lregs = mp->lregs;
|
537 |
|
|
struct myri_channel __iomem *chan = &mp->shmem->channel;
|
538 |
|
|
unsigned long flags;
|
539 |
|
|
u32 status;
|
540 |
|
|
int handled = 0;
|
541 |
|
|
|
542 |
|
|
spin_lock_irqsave(&mp->irq_lock, flags);
|
543 |
|
|
|
544 |
|
|
status = sbus_readl(lregs + LANAI_ISTAT);
|
545 |
|
|
DIRQ(("myri_interrupt: status[%08x] ", status));
|
546 |
|
|
if (status & ISTAT_HOST) {
|
547 |
|
|
u32 softstate;
|
548 |
|
|
|
549 |
|
|
handled = 1;
|
550 |
|
|
DIRQ(("IRQ_DISAB "));
|
551 |
|
|
myri_disable_irq(lregs, mp->cregs);
|
552 |
|
|
softstate = sbus_readl(&chan->state);
|
553 |
|
|
DIRQ(("state[%08x] ", softstate));
|
554 |
|
|
if (softstate != STATE_READY) {
|
555 |
|
|
DIRQ(("myri_not_so_happy "));
|
556 |
|
|
myri_is_not_so_happy(mp);
|
557 |
|
|
}
|
558 |
|
|
DIRQ(("\nmyri_rx: "));
|
559 |
|
|
myri_rx(mp, dev);
|
560 |
|
|
DIRQ(("\nistat=ISTAT_HOST "));
|
561 |
|
|
sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT);
|
562 |
|
|
DIRQ(("IRQ_ENAB "));
|
563 |
|
|
myri_enable_irq(lregs, mp->cregs);
|
564 |
|
|
}
|
565 |
|
|
DIRQ(("\n"));
|
566 |
|
|
|
567 |
|
|
spin_unlock_irqrestore(&mp->irq_lock, flags);
|
568 |
|
|
|
569 |
|
|
return IRQ_RETVAL(handled);
|
570 |
|
|
}
|
571 |
|
|
|
572 |
|
|
static int myri_open(struct net_device *dev)
|
573 |
|
|
{
|
574 |
|
|
struct myri_eth *mp = (struct myri_eth *) dev->priv;
|
575 |
|
|
|
576 |
|
|
return myri_init(mp, in_interrupt());
|
577 |
|
|
}
|
578 |
|
|
|
579 |
|
|
static int myri_close(struct net_device *dev)
|
580 |
|
|
{
|
581 |
|
|
struct myri_eth *mp = (struct myri_eth *) dev->priv;
|
582 |
|
|
|
583 |
|
|
myri_clean_rings(mp);
|
584 |
|
|
return 0;
|
585 |
|
|
}
|
586 |
|
|
|
587 |
|
|
static void myri_tx_timeout(struct net_device *dev)
|
588 |
|
|
{
|
589 |
|
|
struct myri_eth *mp = (struct myri_eth *) dev->priv;
|
590 |
|
|
|
591 |
|
|
printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
|
592 |
|
|
|
593 |
|
|
dev->stats.tx_errors++;
|
594 |
|
|
myri_init(mp, 0);
|
595 |
|
|
netif_wake_queue(dev);
|
596 |
|
|
}
|
597 |
|
|
|
598 |
|
|
static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
599 |
|
|
{
|
600 |
|
|
struct myri_eth *mp = (struct myri_eth *) dev->priv;
|
601 |
|
|
struct sendq __iomem *sq = mp->sq;
|
602 |
|
|
struct myri_txd __iomem *txd;
|
603 |
|
|
unsigned long flags;
|
604 |
|
|
unsigned int head, tail;
|
605 |
|
|
int len, entry;
|
606 |
|
|
u32 dma_addr;
|
607 |
|
|
|
608 |
|
|
DTX(("myri_start_xmit: "));
|
609 |
|
|
|
610 |
|
|
myri_tx(mp, dev);
|
611 |
|
|
|
612 |
|
|
netif_stop_queue(dev);
|
613 |
|
|
|
614 |
|
|
/* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */
|
615 |
|
|
head = sbus_readl(&sq->head);
|
616 |
|
|
tail = sbus_readl(&sq->tail);
|
617 |
|
|
|
618 |
|
|
if (!TX_BUFFS_AVAIL(head, tail)) {
|
619 |
|
|
DTX(("no buffs available, returning 1\n"));
|
620 |
|
|
return 1;
|
621 |
|
|
}
|
622 |
|
|
|
623 |
|
|
spin_lock_irqsave(&mp->irq_lock, flags);
|
624 |
|
|
|
625 |
|
|
DHDR(("xmit[skbdata(%p)]\n", skb->data));
|
626 |
|
|
#ifdef DEBUG_HEADER
|
627 |
|
|
dump_ehdr_and_myripad(((unsigned char *) skb->data));
|
628 |
|
|
#endif
|
629 |
|
|
|
630 |
|
|
/* XXX Maybe this can go as well. */
|
631 |
|
|
len = skb->len;
|
632 |
|
|
if (len & 3) {
|
633 |
|
|
DTX(("len&3 "));
|
634 |
|
|
len = (len + 4) & (~3);
|
635 |
|
|
}
|
636 |
|
|
|
637 |
|
|
entry = sbus_readl(&sq->tail);
|
638 |
|
|
|
639 |
|
|
txd = &sq->myri_txd[entry];
|
640 |
|
|
mp->tx_skbs[entry] = skb;
|
641 |
|
|
|
642 |
|
|
/* Must do this before we sbus map it. */
|
643 |
|
|
if (skb->data[MYRI_PAD_LEN] & 0x1) {
|
644 |
|
|
sbus_writew(0xffff, &txd->addr[0]);
|
645 |
|
|
sbus_writew(0xffff, &txd->addr[1]);
|
646 |
|
|
sbus_writew(0xffff, &txd->addr[2]);
|
647 |
|
|
sbus_writew(0xffff, &txd->addr[3]);
|
648 |
|
|
} else {
|
649 |
|
|
sbus_writew(0xffff, &txd->addr[0]);
|
650 |
|
|
sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]);
|
651 |
|
|
sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]);
|
652 |
|
|
sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]);
|
653 |
|
|
}
|
654 |
|
|
|
655 |
|
|
dma_addr = sbus_map_single(mp->myri_sdev, skb->data, len, SBUS_DMA_TODEVICE);
|
656 |
|
|
sbus_writel(dma_addr, &txd->myri_gathers[0].addr);
|
657 |
|
|
sbus_writel(len, &txd->myri_gathers[0].len);
|
658 |
|
|
sbus_writel(1, &txd->num_sg);
|
659 |
|
|
sbus_writel(KERNEL_CHANNEL, &txd->chan);
|
660 |
|
|
sbus_writel(len, &txd->len);
|
661 |
|
|
sbus_writel((u32)-1, &txd->csum_off);
|
662 |
|
|
sbus_writel(0, &txd->csum_field);
|
663 |
|
|
|
664 |
|
|
sbus_writel(NEXT_TX(entry), &sq->tail);
|
665 |
|
|
DTX(("BangTheChip "));
|
666 |
|
|
bang_the_chip(mp);
|
667 |
|
|
|
668 |
|
|
DTX(("tbusy=0, returning 0\n"));
|
669 |
|
|
netif_start_queue(dev);
|
670 |
|
|
spin_unlock_irqrestore(&mp->irq_lock, flags);
|
671 |
|
|
return 0;
|
672 |
|
|
}
|
673 |
|
|
|
674 |
|
|
/* Create the MyriNet MAC header for an arbitrary protocol layer
|
675 |
|
|
*
|
676 |
|
|
* saddr=NULL means use device source address
|
677 |
|
|
* daddr=NULL means leave destination address (eg unresolved arp)
|
678 |
|
|
*/
|
679 |
|
|
static int myri_header(struct sk_buff *skb, struct net_device *dev,
|
680 |
|
|
unsigned short type, const void *daddr,
|
681 |
|
|
const void *saddr, unsigned len)
|
682 |
|
|
{
|
683 |
|
|
struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN);
|
684 |
|
|
unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN);
|
685 |
|
|
|
686 |
|
|
#ifdef DEBUG_HEADER
|
687 |
|
|
DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1]));
|
688 |
|
|
dump_ehdr(eth);
|
689 |
|
|
#endif
|
690 |
|
|
|
691 |
|
|
/* Set the MyriNET padding identifier. */
|
692 |
|
|
pad[0] = MYRI_PAD_LEN;
|
693 |
|
|
pad[1] = 0xab;
|
694 |
|
|
|
695 |
|
|
/* Set the protocol type. For a packet of type ETH_P_802_3 we put the length
|
696 |
|
|
* in here instead. It is up to the 802.2 layer to carry protocol information.
|
697 |
|
|
*/
|
698 |
|
|
if (type != ETH_P_802_3)
|
699 |
|
|
eth->h_proto = htons(type);
|
700 |
|
|
else
|
701 |
|
|
eth->h_proto = htons(len);
|
702 |
|
|
|
703 |
|
|
/* Set the source hardware address. */
|
704 |
|
|
if (saddr)
|
705 |
|
|
memcpy(eth->h_source, saddr, dev->addr_len);
|
706 |
|
|
else
|
707 |
|
|
memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
|
708 |
|
|
|
709 |
|
|
/* Anyway, the loopback-device should never use this function... */
|
710 |
|
|
if (dev->flags & IFF_LOOPBACK) {
|
711 |
|
|
int i;
|
712 |
|
|
for (i = 0; i < dev->addr_len; i++)
|
713 |
|
|
eth->h_dest[i] = 0;
|
714 |
|
|
return(dev->hard_header_len);
|
715 |
|
|
}
|
716 |
|
|
|
717 |
|
|
if (daddr) {
|
718 |
|
|
memcpy(eth->h_dest, daddr, dev->addr_len);
|
719 |
|
|
return dev->hard_header_len;
|
720 |
|
|
}
|
721 |
|
|
return -dev->hard_header_len;
|
722 |
|
|
}
|
723 |
|
|
|
724 |
|
|
/* Rebuild the MyriNet MAC header. This is called after an ARP
|
725 |
|
|
* (or in future other address resolution) has completed on this
|
726 |
|
|
* sk_buff. We now let ARP fill in the other fields.
|
727 |
|
|
*/
|
728 |
|
|
static int myri_rebuild_header(struct sk_buff *skb)
|
729 |
|
|
{
|
730 |
|
|
unsigned char *pad = (unsigned char *) skb->data;
|
731 |
|
|
struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
|
732 |
|
|
struct net_device *dev = skb->dev;
|
733 |
|
|
|
734 |
|
|
#ifdef DEBUG_HEADER
|
735 |
|
|
DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1]));
|
736 |
|
|
dump_ehdr(eth);
|
737 |
|
|
#endif
|
738 |
|
|
|
739 |
|
|
/* Refill MyriNet padding identifiers, this is just being anal. */
|
740 |
|
|
pad[0] = MYRI_PAD_LEN;
|
741 |
|
|
pad[1] = 0xab;
|
742 |
|
|
|
743 |
|
|
switch (eth->h_proto)
|
744 |
|
|
{
|
745 |
|
|
#ifdef CONFIG_INET
|
746 |
|
|
case __constant_htons(ETH_P_IP):
|
747 |
|
|
return arp_find(eth->h_dest, skb);
|
748 |
|
|
#endif
|
749 |
|
|
|
750 |
|
|
default:
|
751 |
|
|
printk(KERN_DEBUG
|
752 |
|
|
"%s: unable to resolve type %X addresses.\n",
|
753 |
|
|
dev->name, (int)eth->h_proto);
|
754 |
|
|
|
755 |
|
|
memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
|
756 |
|
|
return 0;
|
757 |
|
|
break;
|
758 |
|
|
}
|
759 |
|
|
|
760 |
|
|
return 0;
|
761 |
|
|
}
|
762 |
|
|
|
763 |
|
|
static int myri_header_cache(const struct neighbour *neigh, struct hh_cache *hh)
|
764 |
|
|
{
|
765 |
|
|
unsigned short type = hh->hh_type;
|
766 |
|
|
unsigned char *pad;
|
767 |
|
|
struct ethhdr *eth;
|
768 |
|
|
const struct net_device *dev = neigh->dev;
|
769 |
|
|
|
770 |
|
|
pad = ((unsigned char *) hh->hh_data) +
|
771 |
|
|
HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN);
|
772 |
|
|
eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
|
773 |
|
|
|
774 |
|
|
if (type == htons(ETH_P_802_3))
|
775 |
|
|
return -1;
|
776 |
|
|
|
777 |
|
|
/* Refill MyriNet padding identifiers, this is just being anal. */
|
778 |
|
|
pad[0] = MYRI_PAD_LEN;
|
779 |
|
|
pad[1] = 0xab;
|
780 |
|
|
|
781 |
|
|
eth->h_proto = type;
|
782 |
|
|
memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
|
783 |
|
|
memcpy(eth->h_dest, neigh->ha, dev->addr_len);
|
784 |
|
|
hh->hh_len = 16;
|
785 |
|
|
return 0;
|
786 |
|
|
}
|
787 |
|
|
|
788 |
|
|
|
789 |
|
|
/* Called by Address Resolution module to notify changes in address. */
|
790 |
|
|
void myri_header_cache_update(struct hh_cache *hh,
|
791 |
|
|
const struct net_device *dev,
|
792 |
|
|
const unsigned char * haddr)
|
793 |
|
|
{
|
794 |
|
|
memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)),
|
795 |
|
|
haddr, dev->addr_len);
|
796 |
|
|
}
|
797 |
|
|
|
798 |
|
|
static int myri_change_mtu(struct net_device *dev, int new_mtu)
|
799 |
|
|
{
|
800 |
|
|
if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU))
|
801 |
|
|
return -EINVAL;
|
802 |
|
|
dev->mtu = new_mtu;
|
803 |
|
|
return 0;
|
804 |
|
|
}
|
805 |
|
|
|
806 |
|
|
static void myri_set_multicast(struct net_device *dev)
|
807 |
|
|
{
|
808 |
|
|
/* Do nothing, all MyriCOM nodes transmit multicast frames
|
809 |
|
|
* as broadcast packets...
|
810 |
|
|
*/
|
811 |
|
|
}
|
812 |
|
|
|
813 |
|
|
static inline void set_boardid_from_idprom(struct myri_eth *mp, int num)
|
814 |
|
|
{
|
815 |
|
|
mp->eeprom.id[0] = 0;
|
816 |
|
|
mp->eeprom.id[1] = idprom->id_machtype;
|
817 |
|
|
mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff;
|
818 |
|
|
mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff;
|
819 |
|
|
mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff;
|
820 |
|
|
mp->eeprom.id[5] = num;
|
821 |
|
|
}
|
822 |
|
|
|
823 |
|
|
static inline void determine_reg_space_size(struct myri_eth *mp)
|
824 |
|
|
{
|
825 |
|
|
switch(mp->eeprom.cpuvers) {
|
826 |
|
|
case CPUVERS_2_3:
|
827 |
|
|
case CPUVERS_3_0:
|
828 |
|
|
case CPUVERS_3_1:
|
829 |
|
|
case CPUVERS_3_2:
|
830 |
|
|
mp->reg_size = (3 * 128 * 1024) + 4096;
|
831 |
|
|
break;
|
832 |
|
|
|
833 |
|
|
case CPUVERS_4_0:
|
834 |
|
|
case CPUVERS_4_1:
|
835 |
|
|
mp->reg_size = ((4096<<1) + mp->eeprom.ramsz);
|
836 |
|
|
break;
|
837 |
|
|
|
838 |
|
|
case CPUVERS_4_2:
|
839 |
|
|
case CPUVERS_5_0:
|
840 |
|
|
default:
|
841 |
|
|
printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n",
|
842 |
|
|
mp->eeprom.cpuvers);
|
843 |
|
|
mp->reg_size = (3 * 128 * 1024) + 4096;
|
844 |
|
|
};
|
845 |
|
|
}
|
846 |
|
|
|
847 |
|
|
#ifdef DEBUG_DETECT
|
848 |
|
|
static void dump_eeprom(struct myri_eth *mp)
|
849 |
|
|
{
|
850 |
|
|
printk("EEPROM: clockval[%08x] cpuvers[%04x] "
|
851 |
|
|
"id[%02x,%02x,%02x,%02x,%02x,%02x]\n",
|
852 |
|
|
mp->eeprom.cval, mp->eeprom.cpuvers,
|
853 |
|
|
mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2],
|
854 |
|
|
mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]);
|
855 |
|
|
printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz);
|
856 |
|
|
printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
|
857 |
|
|
mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2],
|
858 |
|
|
mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5],
|
859 |
|
|
mp->eeprom.fvers[6], mp->eeprom.fvers[7]);
|
860 |
|
|
printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
|
861 |
|
|
mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10],
|
862 |
|
|
mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13],
|
863 |
|
|
mp->eeprom.fvers[14], mp->eeprom.fvers[15]);
|
864 |
|
|
printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
|
865 |
|
|
mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18],
|
866 |
|
|
mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21],
|
867 |
|
|
mp->eeprom.fvers[22], mp->eeprom.fvers[23]);
|
868 |
|
|
printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
|
869 |
|
|
mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26],
|
870 |
|
|
mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29],
|
871 |
|
|
mp->eeprom.fvers[30], mp->eeprom.fvers[31]);
|
872 |
|
|
printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
|
873 |
|
|
mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2],
|
874 |
|
|
mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5],
|
875 |
|
|
mp->eeprom.mvers[6], mp->eeprom.mvers[7]);
|
876 |
|
|
printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
|
877 |
|
|
mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10],
|
878 |
|
|
mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13],
|
879 |
|
|
mp->eeprom.mvers[14], mp->eeprom.mvers[15]);
|
880 |
|
|
printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n",
|
881 |
|
|
mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type,
|
882 |
|
|
mp->eeprom.prod_code);
|
883 |
|
|
printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num);
|
884 |
|
|
}
|
885 |
|
|
#endif
|
886 |
|
|
|
887 |
|
|
static const struct header_ops myri_header_ops = {
|
888 |
|
|
.create = myri_header,
|
889 |
|
|
.rebuild = myri_rebuild_header,
|
890 |
|
|
.cache = myri_header_cache,
|
891 |
|
|
.cache_update = myri_header_cache_update,
|
892 |
|
|
};
|
893 |
|
|
|
894 |
|
|
static int __devinit myri_ether_init(struct sbus_dev *sdev)
|
895 |
|
|
{
|
896 |
|
|
static int num;
|
897 |
|
|
static unsigned version_printed;
|
898 |
|
|
struct net_device *dev;
|
899 |
|
|
struct myri_eth *mp;
|
900 |
|
|
unsigned char prop_buf[32];
|
901 |
|
|
int i;
|
902 |
|
|
DECLARE_MAC_BUF(mac);
|
903 |
|
|
|
904 |
|
|
DET(("myri_ether_init(%p,%d):\n", sdev, num));
|
905 |
|
|
dev = alloc_etherdev(sizeof(struct myri_eth));
|
906 |
|
|
|
907 |
|
|
if (!dev)
|
908 |
|
|
return -ENOMEM;
|
909 |
|
|
|
910 |
|
|
if (version_printed++ == 0)
|
911 |
|
|
printk(version);
|
912 |
|
|
|
913 |
|
|
SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
|
914 |
|
|
|
915 |
|
|
mp = (struct myri_eth *) dev->priv;
|
916 |
|
|
spin_lock_init(&mp->irq_lock);
|
917 |
|
|
mp->myri_sdev = sdev;
|
918 |
|
|
|
919 |
|
|
/* Clean out skb arrays. */
|
920 |
|
|
for (i = 0; i < (RX_RING_SIZE + 1); i++)
|
921 |
|
|
mp->rx_skbs[i] = NULL;
|
922 |
|
|
|
923 |
|
|
for (i = 0; i < TX_RING_SIZE; i++)
|
924 |
|
|
mp->tx_skbs[i] = NULL;
|
925 |
|
|
|
926 |
|
|
/* First check for EEPROM information. */
|
927 |
|
|
i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
|
928 |
|
|
(char *)&mp->eeprom, sizeof(struct myri_eeprom));
|
929 |
|
|
DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
|
930 |
|
|
if (i == 0 || i == -1) {
|
931 |
|
|
/* No eeprom property, must cook up the values ourselves. */
|
932 |
|
|
DET(("No EEPROM: "));
|
933 |
|
|
mp->eeprom.bus_type = BUS_TYPE_SBUS;
|
934 |
|
|
mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
|
935 |
|
|
mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
|
936 |
|
|
mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
|
937 |
|
|
DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
|
938 |
|
|
mp->eeprom.cval, mp->eeprom.ramsz));
|
939 |
|
|
if (mp->eeprom.cpuvers == 0) {
|
940 |
|
|
DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
|
941 |
|
|
mp->eeprom.cpuvers = CPUVERS_2_3;
|
942 |
|
|
}
|
943 |
|
|
if (mp->eeprom.cpuvers < CPUVERS_3_0) {
|
944 |
|
|
DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
|
945 |
|
|
mp->eeprom.cval = 0;
|
946 |
|
|
}
|
947 |
|
|
if (mp->eeprom.ramsz == 0) {
|
948 |
|
|
DET(("EEPROM: ramsz == 0, setting to 128k\n"));
|
949 |
|
|
mp->eeprom.ramsz = (128 * 1024);
|
950 |
|
|
}
|
951 |
|
|
i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
|
952 |
|
|
&prop_buf[0], 10);
|
953 |
|
|
DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
|
954 |
|
|
if ((i != 0) && (i != -1))
|
955 |
|
|
memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
|
956 |
|
|
else
|
957 |
|
|
set_boardid_from_idprom(mp, num);
|
958 |
|
|
i = prom_getproperty(sdev->prom_node, "fpga_version",
|
959 |
|
|
&mp->eeprom.fvers[0], 32);
|
960 |
|
|
DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
|
961 |
|
|
if (i == 0 || i == -1)
|
962 |
|
|
memset(&mp->eeprom.fvers[0], 0, 32);
|
963 |
|
|
|
964 |
|
|
if (mp->eeprom.cpuvers == CPUVERS_4_1) {
|
965 |
|
|
DET(("EEPROM: cpuvers CPUVERS_4_1, "));
|
966 |
|
|
if (mp->eeprom.ramsz == (128 * 1024)) {
|
967 |
|
|
DET(("ramsize 128k, setting to 256k, "));
|
968 |
|
|
mp->eeprom.ramsz = (256 * 1024);
|
969 |
|
|
}
|
970 |
|
|
if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
|
971 |
|
|
DET(("changing cval from %08x to %08x ",
|
972 |
|
|
mp->eeprom.cval, 0x50e450e4));
|
973 |
|
|
mp->eeprom.cval = 0x50e450e4;
|
974 |
|
|
}
|
975 |
|
|
DET(("\n"));
|
976 |
|
|
}
|
977 |
|
|
}
|
978 |
|
|
#ifdef DEBUG_DETECT
|
979 |
|
|
dump_eeprom(mp);
|
980 |
|
|
#endif
|
981 |
|
|
|
982 |
|
|
for (i = 0; i < 6; i++)
|
983 |
|
|
dev->dev_addr[i] = mp->eeprom.id[i];
|
984 |
|
|
|
985 |
|
|
determine_reg_space_size(mp);
|
986 |
|
|
|
987 |
|
|
/* Map in the MyriCOM register/localram set. */
|
988 |
|
|
if (mp->eeprom.cpuvers < CPUVERS_4_0) {
|
989 |
|
|
/* XXX Makes no sense, if control reg is non-existant this
|
990 |
|
|
* XXX driver cannot function at all... maybe pre-4.0 is
|
991 |
|
|
* XXX only a valid version for PCI cards? Ask feldy...
|
992 |
|
|
*/
|
993 |
|
|
DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
|
994 |
|
|
mp->regs = sbus_ioremap(&sdev->resource[0], 0,
|
995 |
|
|
mp->reg_size, "MyriCOM Regs");
|
996 |
|
|
if (!mp->regs) {
|
997 |
|
|
printk("MyriCOM: Cannot map MyriCOM registers.\n");
|
998 |
|
|
goto err;
|
999 |
|
|
}
|
1000 |
|
|
mp->lanai = mp->regs + (256 * 1024);
|
1001 |
|
|
mp->lregs = mp->lanai + (0x10000 * 2);
|
1002 |
|
|
} else {
|
1003 |
|
|
DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
|
1004 |
|
|
mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
|
1005 |
|
|
PAGE_SIZE, "MyriCOM Control Regs");
|
1006 |
|
|
mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
|
1007 |
|
|
PAGE_SIZE, "MyriCOM LANAI Regs");
|
1008 |
|
|
mp->lanai =
|
1009 |
|
|
sbus_ioremap(&sdev->resource[0], (512 * 1024),
|
1010 |
|
|
mp->eeprom.ramsz, "MyriCOM SRAM");
|
1011 |
|
|
}
|
1012 |
|
|
DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
|
1013 |
|
|
mp->cregs, mp->lregs, mp->lanai));
|
1014 |
|
|
|
1015 |
|
|
if (mp->eeprom.cpuvers >= CPUVERS_4_0)
|
1016 |
|
|
mp->shmem_base = 0xf000;
|
1017 |
|
|
else
|
1018 |
|
|
mp->shmem_base = 0x8000;
|
1019 |
|
|
|
1020 |
|
|
DET(("Shared memory base is %04x, ", mp->shmem_base));
|
1021 |
|
|
|
1022 |
|
|
mp->shmem = (struct myri_shmem __iomem *)
|
1023 |
|
|
(mp->lanai + (mp->shmem_base * 2));
|
1024 |
|
|
DET(("shmem mapped at %p\n", mp->shmem));
|
1025 |
|
|
|
1026 |
|
|
mp->rqack = &mp->shmem->channel.recvqa;
|
1027 |
|
|
mp->rq = &mp->shmem->channel.recvq;
|
1028 |
|
|
mp->sq = &mp->shmem->channel.sendq;
|
1029 |
|
|
|
1030 |
|
|
/* Reset the board. */
|
1031 |
|
|
DET(("Resetting LANAI\n"));
|
1032 |
|
|
myri_reset_off(mp->lregs, mp->cregs);
|
1033 |
|
|
myri_reset_on(mp->cregs);
|
1034 |
|
|
|
1035 |
|
|
/* Turn IRQ's off. */
|
1036 |
|
|
myri_disable_irq(mp->lregs, mp->cregs);
|
1037 |
|
|
|
1038 |
|
|
/* Reset once more. */
|
1039 |
|
|
myri_reset_on(mp->cregs);
|
1040 |
|
|
|
1041 |
|
|
/* Get the supported DVMA burst sizes from our SBUS. */
|
1042 |
|
|
mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
|
1043 |
|
|
"burst-sizes", 0x00);
|
1044 |
|
|
|
1045 |
|
|
if (!sbus_can_burst64(sdev))
|
1046 |
|
|
mp->myri_bursts &= ~(DMA_BURST64);
|
1047 |
|
|
|
1048 |
|
|
DET(("MYRI bursts %02x\n", mp->myri_bursts));
|
1049 |
|
|
|
1050 |
|
|
/* Encode SBUS interrupt level in second control register. */
|
1051 |
|
|
i = prom_getint(sdev->prom_node, "interrupts");
|
1052 |
|
|
if (i == 0)
|
1053 |
|
|
i = 4;
|
1054 |
|
|
DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
|
1055 |
|
|
i, (1 << i)));
|
1056 |
|
|
|
1057 |
|
|
sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
|
1058 |
|
|
|
1059 |
|
|
mp->dev = dev;
|
1060 |
|
|
dev->open = &myri_open;
|
1061 |
|
|
dev->stop = &myri_close;
|
1062 |
|
|
dev->hard_start_xmit = &myri_start_xmit;
|
1063 |
|
|
dev->tx_timeout = &myri_tx_timeout;
|
1064 |
|
|
dev->watchdog_timeo = 5*HZ;
|
1065 |
|
|
dev->set_multicast_list = &myri_set_multicast;
|
1066 |
|
|
dev->irq = sdev->irqs[0];
|
1067 |
|
|
|
1068 |
|
|
/* Register interrupt handler now. */
|
1069 |
|
|
DET(("Requesting MYRIcom IRQ line.\n"));
|
1070 |
|
|
if (request_irq(dev->irq, &myri_interrupt,
|
1071 |
|
|
IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) {
|
1072 |
|
|
printk("MyriCOM: Cannot register interrupt handler.\n");
|
1073 |
|
|
goto err;
|
1074 |
|
|
}
|
1075 |
|
|
|
1076 |
|
|
dev->mtu = MYRINET_MTU;
|
1077 |
|
|
dev->change_mtu = myri_change_mtu;
|
1078 |
|
|
dev->header_ops = &myri_header_ops;
|
1079 |
|
|
|
1080 |
|
|
dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
|
1081 |
|
|
|
1082 |
|
|
/* Load code onto the LANai. */
|
1083 |
|
|
DET(("Loading LANAI firmware\n"));
|
1084 |
|
|
myri_load_lanai(mp);
|
1085 |
|
|
|
1086 |
|
|
if (register_netdev(dev)) {
|
1087 |
|
|
printk("MyriCOM: Cannot register device.\n");
|
1088 |
|
|
goto err_free_irq;
|
1089 |
|
|
}
|
1090 |
|
|
|
1091 |
|
|
dev_set_drvdata(&sdev->ofdev.dev, mp);
|
1092 |
|
|
|
1093 |
|
|
num++;
|
1094 |
|
|
|
1095 |
|
|
printk("%s: MyriCOM MyriNET Ethernet %s\n",
|
1096 |
|
|
dev->name, print_mac(mac, dev->dev_addr));
|
1097 |
|
|
|
1098 |
|
|
return 0;
|
1099 |
|
|
|
1100 |
|
|
err_free_irq:
|
1101 |
|
|
free_irq(dev->irq, dev);
|
1102 |
|
|
err:
|
1103 |
|
|
/* This will also free the co-allocated 'dev->priv' */
|
1104 |
|
|
free_netdev(dev);
|
1105 |
|
|
return -ENODEV;
|
1106 |
|
|
}
|
1107 |
|
|
|
1108 |
|
|
|
1109 |
|
|
static int __devinit myri_sbus_probe(struct of_device *dev, const struct of_device_id *match)
|
1110 |
|
|
{
|
1111 |
|
|
struct sbus_dev *sdev = to_sbus_device(&dev->dev);
|
1112 |
|
|
|
1113 |
|
|
return myri_ether_init(sdev);
|
1114 |
|
|
}
|
1115 |
|
|
|
1116 |
|
|
static int __devexit myri_sbus_remove(struct of_device *dev)
|
1117 |
|
|
{
|
1118 |
|
|
struct myri_eth *mp = dev_get_drvdata(&dev->dev);
|
1119 |
|
|
struct net_device *net_dev = mp->dev;
|
1120 |
|
|
|
1121 |
|
|
unregister_netdevice(net_dev);
|
1122 |
|
|
|
1123 |
|
|
free_irq(net_dev->irq, net_dev);
|
1124 |
|
|
|
1125 |
|
|
if (mp->eeprom.cpuvers < CPUVERS_4_0) {
|
1126 |
|
|
sbus_iounmap(mp->regs, mp->reg_size);
|
1127 |
|
|
} else {
|
1128 |
|
|
sbus_iounmap(mp->cregs, PAGE_SIZE);
|
1129 |
|
|
sbus_iounmap(mp->lregs, (256 * 1024));
|
1130 |
|
|
sbus_iounmap(mp->lanai, (512 * 1024));
|
1131 |
|
|
}
|
1132 |
|
|
|
1133 |
|
|
free_netdev(net_dev);
|
1134 |
|
|
|
1135 |
|
|
dev_set_drvdata(&dev->dev, NULL);
|
1136 |
|
|
|
1137 |
|
|
return 0;
|
1138 |
|
|
}
|
1139 |
|
|
|
1140 |
|
|
static struct of_device_id myri_sbus_match[] = {
|
1141 |
|
|
{
|
1142 |
|
|
.name = "MYRICOM,mlanai",
|
1143 |
|
|
},
|
1144 |
|
|
{
|
1145 |
|
|
.name = "myri",
|
1146 |
|
|
},
|
1147 |
|
|
{},
|
1148 |
|
|
};
|
1149 |
|
|
|
1150 |
|
|
MODULE_DEVICE_TABLE(of, myri_sbus_match);
|
1151 |
|
|
|
1152 |
|
|
static struct of_platform_driver myri_sbus_driver = {
|
1153 |
|
|
.name = "myri",
|
1154 |
|
|
.match_table = myri_sbus_match,
|
1155 |
|
|
.probe = myri_sbus_probe,
|
1156 |
|
|
.remove = __devexit_p(myri_sbus_remove),
|
1157 |
|
|
};
|
1158 |
|
|
|
1159 |
|
|
static int __init myri_sbus_init(void)
|
1160 |
|
|
{
|
1161 |
|
|
return of_register_driver(&myri_sbus_driver, &sbus_bus_type);
|
1162 |
|
|
}
|
1163 |
|
|
|
1164 |
|
|
static void __exit myri_sbus_exit(void)
|
1165 |
|
|
{
|
1166 |
|
|
of_unregister_driver(&myri_sbus_driver);
|
1167 |
|
|
}
|
1168 |
|
|
|
1169 |
|
|
module_init(myri_sbus_init);
|
1170 |
|
|
module_exit(myri_sbus_exit);
|
1171 |
|
|
|
1172 |
|
|
MODULE_LICENSE("GPL");
|