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xianfeng |
/*
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* Adaptec AIC79xx device driver for Linux.
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*
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* Copyright (c) 2000-2001 Adaptec Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm.h#166 $
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*
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*/
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#ifndef _AIC79XX_LINUX_H_
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#define _AIC79XX_LINUX_H_
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#include <linux/types.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include <asm/io.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_eh.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_transport.h>
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#include <scsi/scsi_transport_spi.h>
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/* Core SCSI definitions */
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#define AIC_LIB_PREFIX ahd
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/* Name space conflict with BSD queue macros */
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#ifdef LIST_HEAD
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#undef LIST_HEAD
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#endif
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#include "cam.h"
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#include "queue.h"
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#include "scsi_message.h"
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#include "scsi_iu.h"
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#include "aiclib.h"
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/*********************************** Debugging ********************************/
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#ifdef CONFIG_AIC79XX_DEBUG_ENABLE
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#ifdef CONFIG_AIC79XX_DEBUG_MASK
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#define AHD_DEBUG 1
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#define AHD_DEBUG_OPTS CONFIG_AIC79XX_DEBUG_MASK
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#else
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/*
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* Compile in debugging code, but do not enable any printfs.
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*/
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#define AHD_DEBUG 1
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#define AHD_DEBUG_OPTS 0
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#endif
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/* No debugging code. */
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#endif
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/********************************** Misc Macros *******************************/
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#define powerof2(x) ((((x)-1)&(x))==0)
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/************************* Forward Declarations *******************************/
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struct ahd_softc;
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typedef struct pci_dev *ahd_dev_softc_t;
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typedef struct scsi_cmnd *ahd_io_ctx_t;
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/******************************* Byte Order ***********************************/
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#define ahd_htobe16(x) cpu_to_be16(x)
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#define ahd_htobe32(x) cpu_to_be32(x)
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#define ahd_htobe64(x) cpu_to_be64(x)
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#define ahd_htole16(x) cpu_to_le16(x)
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#define ahd_htole32(x) cpu_to_le32(x)
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#define ahd_htole64(x) cpu_to_le64(x)
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#define ahd_be16toh(x) be16_to_cpu(x)
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#define ahd_be32toh(x) be32_to_cpu(x)
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#define ahd_be64toh(x) be64_to_cpu(x)
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#define ahd_le16toh(x) le16_to_cpu(x)
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#define ahd_le32toh(x) le32_to_cpu(x)
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#define ahd_le64toh(x) le64_to_cpu(x)
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/************************* Configuration Data *********************************/
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extern uint32_t aic79xx_allow_memio;
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extern struct scsi_host_template aic79xx_driver_template;
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/***************************** Bus Space/DMA **********************************/
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typedef uint32_t bus_size_t;
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typedef enum {
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BUS_SPACE_MEMIO,
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BUS_SPACE_PIO
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} bus_space_tag_t;
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typedef union {
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u_long ioport;
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volatile uint8_t __iomem *maddr;
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} bus_space_handle_t;
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typedef struct bus_dma_segment
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{
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dma_addr_t ds_addr;
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bus_size_t ds_len;
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} bus_dma_segment_t;
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struct ahd_linux_dma_tag
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{
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bus_size_t alignment;
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bus_size_t boundary;
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bus_size_t maxsize;
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};
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typedef struct ahd_linux_dma_tag* bus_dma_tag_t;
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typedef dma_addr_t bus_dmamap_t;
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typedef int bus_dma_filter_t(void*, dma_addr_t);
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typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
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#define BUS_DMA_WAITOK 0x0
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#define BUS_DMA_NOWAIT 0x1
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#define BUS_DMA_ALLOCNOW 0x2
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#define BUS_DMA_LOAD_SEGS 0x4 /*
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* Argument is an S/G list not
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* a single buffer.
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*/
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#define BUS_SPACE_MAXADDR 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
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int ahd_dma_tag_create(struct ahd_softc *, bus_dma_tag_t /*parent*/,
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bus_size_t /*alignment*/, bus_size_t /*boundary*/,
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dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/,
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bus_dma_filter_t*/*filter*/, void */*filterarg*/,
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bus_size_t /*maxsize*/, int /*nsegments*/,
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bus_size_t /*maxsegsz*/, int /*flags*/,
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bus_dma_tag_t */*dma_tagp*/);
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void ahd_dma_tag_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/);
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int ahd_dmamem_alloc(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
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void** /*vaddr*/, int /*flags*/,
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bus_dmamap_t* /*mapp*/);
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void ahd_dmamem_free(struct ahd_softc *, bus_dma_tag_t /*dmat*/,
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void* /*vaddr*/, bus_dmamap_t /*map*/);
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void ahd_dmamap_destroy(struct ahd_softc *, bus_dma_tag_t /*tag*/,
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bus_dmamap_t /*map*/);
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int ahd_dmamap_load(struct ahd_softc *ahd, bus_dma_tag_t /*dmat*/,
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bus_dmamap_t /*map*/, void * /*buf*/,
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bus_size_t /*buflen*/, bus_dmamap_callback_t *,
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void */*callback_arg*/, int /*flags*/);
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int ahd_dmamap_unload(struct ahd_softc *, bus_dma_tag_t, bus_dmamap_t);
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/*
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* Operations performed by ahd_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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/*
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* XXX
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* ahd_dmamap_sync is only used on buffers allocated with
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* the pci_alloc_consistent() API. Although I'm not sure how
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* this works on architectures with a write buffer, Linux does
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* not have an API to sync "coherent" memory. Perhaps we need
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* to do an mb()?
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*/
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#define ahd_dmamap_sync(ahd, dma_tag, dmamap, offset, len, op)
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/************************** Timer DataStructures ******************************/
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typedef struct timer_list ahd_timer_t;
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/********************************** Includes **********************************/
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#ifdef CONFIG_AIC79XX_REG_PRETTY_PRINT
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#define AIC_DEBUG_REGISTERS 1
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#else
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#define AIC_DEBUG_REGISTERS 0
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#endif
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#include "aic79xx.h"
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/***************************** Timer Facilities *******************************/
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#define ahd_timer_init init_timer
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#define ahd_timer_stop del_timer_sync
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typedef void ahd_linux_callback_t (u_long);
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static __inline void ahd_timer_reset(ahd_timer_t *timer, int usec,
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ahd_callback_t *func, void *arg);
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static __inline void
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ahd_timer_reset(ahd_timer_t *timer, int usec, ahd_callback_t *func, void *arg)
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{
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struct ahd_softc *ahd;
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ahd = (struct ahd_softc *)arg;
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del_timer(timer);
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timer->data = (u_long)arg;
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timer->expires = jiffies + (usec * HZ)/1000000;
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timer->function = (ahd_linux_callback_t*)func;
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add_timer(timer);
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}
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/***************************** SMP support ************************************/
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#include <linux/spinlock.h>
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#define AIC79XX_DRIVER_VERSION "3.0"
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/*************************** Device Data Structures ***************************/
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/*
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* A per probed device structure used to deal with some error recovery
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* scenarios that the Linux mid-layer code just doesn't know how to
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* handle. The structure allocated for a device only becomes persistent
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* after a successfully completed inquiry command to the target when
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* that inquiry data indicates a lun is present.
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*/
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typedef enum {
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AHD_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */
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AHD_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */
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AHD_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */
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AHD_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */
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} ahd_linux_dev_flags;
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struct ahd_linux_device {
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TAILQ_ENTRY(ahd_linux_device) links;
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/*
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* The number of transactions currently
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* queued to the device.
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*/
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int active;
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/*
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* The currently allowed number of
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* transactions that can be queued to
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* the device. Must be signed for
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* conversion from tagged to untagged
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* mode where the device may have more
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* than one outstanding active transaction.
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*/
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int openings;
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/*
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* A positive count indicates that this
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* device's queue is halted.
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*/
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u_int qfrozen;
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/*
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* Cumulative command counter.
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*/
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u_long commands_issued;
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/*
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* The number of tagged transactions when
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* running at our current opening level
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* that have been successfully received by
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* this device since the last QUEUE FULL.
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*/
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u_int tag_success_count;
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#define AHD_TAG_SUCCESS_INTERVAL 50
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ahd_linux_dev_flags flags;
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/*
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* Per device timer.
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*/
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struct timer_list timer;
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/*
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* The high limit for the tags variable.
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*/
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u_int maxtags;
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/*
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* The computed number of tags outstanding
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* at the time of the last QUEUE FULL event.
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*/
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u_int tags_on_last_queuefull;
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/*
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* How many times we have seen a queue full
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* with the same number of tags. This is used
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* to stop our adaptive queue depth algorithm
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* on devices with a fixed number of tags.
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*/
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u_int last_queuefull_same_count;
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#define AHD_LOCK_TAGS_COUNT 50
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/*
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* How many transactions have been queued
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* without the device going idle. We use
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* this statistic to determine when to issue
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* an ordered tag to prevent transaction
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* starvation. This statistic is only updated
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* if the AHD_DEV_PERIODIC_OTAG flag is set
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* on this device.
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*/
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u_int commands_since_idle_or_otag;
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#define AHD_OTAG_THRESH 500
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};
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/********************* Definitions Required by the Core ***********************/
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/*
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* Number of SG segments we require. So long as the S/G segments for
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345 |
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|
* a particular transaction are allocated in a physically contiguous
|
346 |
|
|
* manner and are allocated below 4GB, the number of S/G segments is
|
347 |
|
|
* unrestricted.
|
348 |
|
|
*/
|
349 |
|
|
#define AHD_NSEG 128
|
350 |
|
|
|
351 |
|
|
/*
|
352 |
|
|
* Per-SCB OSM storage.
|
353 |
|
|
*/
|
354 |
|
|
struct scb_platform_data {
|
355 |
|
|
struct ahd_linux_device *dev;
|
356 |
|
|
dma_addr_t buf_busaddr;
|
357 |
|
|
uint32_t xfer_len;
|
358 |
|
|
uint32_t sense_resid; /* Auto-Sense residual */
|
359 |
|
|
};
|
360 |
|
|
|
361 |
|
|
/*
|
362 |
|
|
* Define a structure used for each host adapter. All members are
|
363 |
|
|
* aligned on a boundary >= the size of the member to honor the
|
364 |
|
|
* alignment restrictions of the various platforms supported by
|
365 |
|
|
* this driver.
|
366 |
|
|
*/
|
367 |
|
|
struct ahd_platform_data {
|
368 |
|
|
/*
|
369 |
|
|
* Fields accessed from interrupt context.
|
370 |
|
|
*/
|
371 |
|
|
struct scsi_target *starget[AHD_NUM_TARGETS];
|
372 |
|
|
|
373 |
|
|
spinlock_t spin_lock;
|
374 |
|
|
struct completion *eh_done;
|
375 |
|
|
struct Scsi_Host *host; /* pointer to scsi host */
|
376 |
|
|
#define AHD_LINUX_NOIRQ ((uint32_t)~0)
|
377 |
|
|
uint32_t irq; /* IRQ for this adapter */
|
378 |
|
|
uint32_t bios_address;
|
379 |
|
|
uint32_t mem_busaddr; /* Mem Base Addr */
|
380 |
|
|
};
|
381 |
|
|
|
382 |
|
|
/************************** OS Utility Wrappers *******************************/
|
383 |
|
|
#define printf printk
|
384 |
|
|
#define M_NOWAIT GFP_ATOMIC
|
385 |
|
|
#define M_WAITOK 0
|
386 |
|
|
#define malloc(size, type, flags) kmalloc(size, flags)
|
387 |
|
|
#define free(ptr, type) kfree(ptr)
|
388 |
|
|
|
389 |
|
|
static __inline void ahd_delay(long);
|
390 |
|
|
static __inline void
|
391 |
|
|
ahd_delay(long usec)
|
392 |
|
|
{
|
393 |
|
|
/*
|
394 |
|
|
* udelay on Linux can have problems for
|
395 |
|
|
* multi-millisecond waits. Wait at most
|
396 |
|
|
* 1024us per call.
|
397 |
|
|
*/
|
398 |
|
|
while (usec > 0) {
|
399 |
|
|
udelay(usec % 1024);
|
400 |
|
|
usec -= 1024;
|
401 |
|
|
}
|
402 |
|
|
}
|
403 |
|
|
|
404 |
|
|
|
405 |
|
|
/***************************** Low Level I/O **********************************/
|
406 |
|
|
static __inline uint8_t ahd_inb(struct ahd_softc * ahd, long port);
|
407 |
|
|
static __inline uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
|
408 |
|
|
static __inline void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
|
409 |
|
|
static __inline void ahd_outw_atomic(struct ahd_softc * ahd,
|
410 |
|
|
long port, uint16_t val);
|
411 |
|
|
static __inline void ahd_outsb(struct ahd_softc * ahd, long port,
|
412 |
|
|
uint8_t *, int count);
|
413 |
|
|
static __inline void ahd_insb(struct ahd_softc * ahd, long port,
|
414 |
|
|
uint8_t *, int count);
|
415 |
|
|
|
416 |
|
|
static __inline uint8_t
|
417 |
|
|
ahd_inb(struct ahd_softc * ahd, long port)
|
418 |
|
|
{
|
419 |
|
|
uint8_t x;
|
420 |
|
|
|
421 |
|
|
if (ahd->tags[0] == BUS_SPACE_MEMIO) {
|
422 |
|
|
x = readb(ahd->bshs[0].maddr + port);
|
423 |
|
|
} else {
|
424 |
|
|
x = inb(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
|
425 |
|
|
}
|
426 |
|
|
mb();
|
427 |
|
|
return (x);
|
428 |
|
|
}
|
429 |
|
|
|
430 |
|
|
static __inline uint16_t
|
431 |
|
|
ahd_inw_atomic(struct ahd_softc * ahd, long port)
|
432 |
|
|
{
|
433 |
|
|
uint8_t x;
|
434 |
|
|
|
435 |
|
|
if (ahd->tags[0] == BUS_SPACE_MEMIO) {
|
436 |
|
|
x = readw(ahd->bshs[0].maddr + port);
|
437 |
|
|
} else {
|
438 |
|
|
x = inw(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
|
439 |
|
|
}
|
440 |
|
|
mb();
|
441 |
|
|
return (x);
|
442 |
|
|
}
|
443 |
|
|
|
444 |
|
|
static __inline void
|
445 |
|
|
ahd_outb(struct ahd_softc * ahd, long port, uint8_t val)
|
446 |
|
|
{
|
447 |
|
|
if (ahd->tags[0] == BUS_SPACE_MEMIO) {
|
448 |
|
|
writeb(val, ahd->bshs[0].maddr + port);
|
449 |
|
|
} else {
|
450 |
|
|
outb(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
|
451 |
|
|
}
|
452 |
|
|
mb();
|
453 |
|
|
}
|
454 |
|
|
|
455 |
|
|
static __inline void
|
456 |
|
|
ahd_outw_atomic(struct ahd_softc * ahd, long port, uint16_t val)
|
457 |
|
|
{
|
458 |
|
|
if (ahd->tags[0] == BUS_SPACE_MEMIO) {
|
459 |
|
|
writew(val, ahd->bshs[0].maddr + port);
|
460 |
|
|
} else {
|
461 |
|
|
outw(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
|
462 |
|
|
}
|
463 |
|
|
mb();
|
464 |
|
|
}
|
465 |
|
|
|
466 |
|
|
static __inline void
|
467 |
|
|
ahd_outsb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
|
468 |
|
|
{
|
469 |
|
|
int i;
|
470 |
|
|
|
471 |
|
|
/*
|
472 |
|
|
* There is probably a more efficient way to do this on Linux
|
473 |
|
|
* but we don't use this for anything speed critical and this
|
474 |
|
|
* should work.
|
475 |
|
|
*/
|
476 |
|
|
for (i = 0; i < count; i++)
|
477 |
|
|
ahd_outb(ahd, port, *array++);
|
478 |
|
|
}
|
479 |
|
|
|
480 |
|
|
static __inline void
|
481 |
|
|
ahd_insb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
|
482 |
|
|
{
|
483 |
|
|
int i;
|
484 |
|
|
|
485 |
|
|
/*
|
486 |
|
|
* There is probably a more efficient way to do this on Linux
|
487 |
|
|
* but we don't use this for anything speed critical and this
|
488 |
|
|
* should work.
|
489 |
|
|
*/
|
490 |
|
|
for (i = 0; i < count; i++)
|
491 |
|
|
*array++ = ahd_inb(ahd, port);
|
492 |
|
|
}
|
493 |
|
|
|
494 |
|
|
/**************************** Initialization **********************************/
|
495 |
|
|
int ahd_linux_register_host(struct ahd_softc *,
|
496 |
|
|
struct scsi_host_template *);
|
497 |
|
|
|
498 |
|
|
/*************************** Pretty Printing **********************************/
|
499 |
|
|
struct info_str {
|
500 |
|
|
char *buffer;
|
501 |
|
|
int length;
|
502 |
|
|
off_t offset;
|
503 |
|
|
int pos;
|
504 |
|
|
};
|
505 |
|
|
|
506 |
|
|
/******************************** Locking *************************************/
|
507 |
|
|
static __inline void
|
508 |
|
|
ahd_lockinit(struct ahd_softc *ahd)
|
509 |
|
|
{
|
510 |
|
|
spin_lock_init(&ahd->platform_data->spin_lock);
|
511 |
|
|
}
|
512 |
|
|
|
513 |
|
|
static __inline void
|
514 |
|
|
ahd_lock(struct ahd_softc *ahd, unsigned long *flags)
|
515 |
|
|
{
|
516 |
|
|
spin_lock_irqsave(&ahd->platform_data->spin_lock, *flags);
|
517 |
|
|
}
|
518 |
|
|
|
519 |
|
|
static __inline void
|
520 |
|
|
ahd_unlock(struct ahd_softc *ahd, unsigned long *flags)
|
521 |
|
|
{
|
522 |
|
|
spin_unlock_irqrestore(&ahd->platform_data->spin_lock, *flags);
|
523 |
|
|
}
|
524 |
|
|
|
525 |
|
|
/******************************* PCI Definitions ******************************/
|
526 |
|
|
/*
|
527 |
|
|
* PCIM_xxx: mask to locate subfield in register
|
528 |
|
|
* PCIR_xxx: config register offset
|
529 |
|
|
* PCIC_xxx: device class
|
530 |
|
|
* PCIS_xxx: device subclass
|
531 |
|
|
* PCIP_xxx: device programming interface
|
532 |
|
|
* PCIV_xxx: PCI vendor ID (only required to fixup ancient devices)
|
533 |
|
|
* PCID_xxx: device ID
|
534 |
|
|
*/
|
535 |
|
|
#define PCIR_DEVVENDOR 0x00
|
536 |
|
|
#define PCIR_VENDOR 0x00
|
537 |
|
|
#define PCIR_DEVICE 0x02
|
538 |
|
|
#define PCIR_COMMAND 0x04
|
539 |
|
|
#define PCIM_CMD_PORTEN 0x0001
|
540 |
|
|
#define PCIM_CMD_MEMEN 0x0002
|
541 |
|
|
#define PCIM_CMD_BUSMASTEREN 0x0004
|
542 |
|
|
#define PCIM_CMD_MWRICEN 0x0010
|
543 |
|
|
#define PCIM_CMD_PERRESPEN 0x0040
|
544 |
|
|
#define PCIM_CMD_SERRESPEN 0x0100
|
545 |
|
|
#define PCIR_STATUS 0x06
|
546 |
|
|
#define PCIR_REVID 0x08
|
547 |
|
|
#define PCIR_PROGIF 0x09
|
548 |
|
|
#define PCIR_SUBCLASS 0x0a
|
549 |
|
|
#define PCIR_CLASS 0x0b
|
550 |
|
|
#define PCIR_CACHELNSZ 0x0c
|
551 |
|
|
#define PCIR_LATTIMER 0x0d
|
552 |
|
|
#define PCIR_HEADERTYPE 0x0e
|
553 |
|
|
#define PCIM_MFDEV 0x80
|
554 |
|
|
#define PCIR_BIST 0x0f
|
555 |
|
|
#define PCIR_CAP_PTR 0x34
|
556 |
|
|
|
557 |
|
|
/* config registers for header type 0 devices */
|
558 |
|
|
#define PCIR_MAPS 0x10
|
559 |
|
|
#define PCIR_SUBVEND_0 0x2c
|
560 |
|
|
#define PCIR_SUBDEV_0 0x2e
|
561 |
|
|
|
562 |
|
|
/****************************** PCI-X definitions *****************************/
|
563 |
|
|
#define PCIXR_COMMAND 0x96
|
564 |
|
|
#define PCIXR_DEVADDR 0x98
|
565 |
|
|
#define PCIXM_DEVADDR_FNUM 0x0003 /* Function Number */
|
566 |
|
|
#define PCIXM_DEVADDR_DNUM 0x00F8 /* Device Number */
|
567 |
|
|
#define PCIXM_DEVADDR_BNUM 0xFF00 /* Bus Number */
|
568 |
|
|
#define PCIXR_STATUS 0x9A
|
569 |
|
|
#define PCIXM_STATUS_64BIT 0x0001 /* Active 64bit connection to device. */
|
570 |
|
|
#define PCIXM_STATUS_133CAP 0x0002 /* Device is 133MHz capable */
|
571 |
|
|
#define PCIXM_STATUS_SCDISC 0x0004 /* Split Completion Discarded */
|
572 |
|
|
#define PCIXM_STATUS_UNEXPSC 0x0008 /* Unexpected Split Completion */
|
573 |
|
|
#define PCIXM_STATUS_CMPLEXDEV 0x0010 /* Device Complexity (set == bridge) */
|
574 |
|
|
#define PCIXM_STATUS_MAXMRDBC 0x0060 /* Maximum Burst Read Count */
|
575 |
|
|
#define PCIXM_STATUS_MAXSPLITS 0x0380 /* Maximum Split Transactions */
|
576 |
|
|
#define PCIXM_STATUS_MAXCRDS 0x1C00 /* Maximum Cumulative Read Size */
|
577 |
|
|
#define PCIXM_STATUS_RCVDSCEM 0x2000 /* Received a Split Comp w/Error msg */
|
578 |
|
|
|
579 |
|
|
typedef enum
|
580 |
|
|
{
|
581 |
|
|
AHD_POWER_STATE_D0,
|
582 |
|
|
AHD_POWER_STATE_D1,
|
583 |
|
|
AHD_POWER_STATE_D2,
|
584 |
|
|
AHD_POWER_STATE_D3
|
585 |
|
|
} ahd_power_state;
|
586 |
|
|
|
587 |
|
|
void ahd_power_state_change(struct ahd_softc *ahd,
|
588 |
|
|
ahd_power_state new_state);
|
589 |
|
|
|
590 |
|
|
/******************************* PCI Routines *********************************/
|
591 |
|
|
int ahd_linux_pci_init(void);
|
592 |
|
|
void ahd_linux_pci_exit(void);
|
593 |
|
|
int ahd_pci_map_registers(struct ahd_softc *ahd);
|
594 |
|
|
int ahd_pci_map_int(struct ahd_softc *ahd);
|
595 |
|
|
|
596 |
|
|
static __inline uint32_t ahd_pci_read_config(ahd_dev_softc_t pci,
|
597 |
|
|
int reg, int width);
|
598 |
|
|
|
599 |
|
|
static __inline uint32_t
|
600 |
|
|
ahd_pci_read_config(ahd_dev_softc_t pci, int reg, int width)
|
601 |
|
|
{
|
602 |
|
|
switch (width) {
|
603 |
|
|
case 1:
|
604 |
|
|
{
|
605 |
|
|
uint8_t retval;
|
606 |
|
|
|
607 |
|
|
pci_read_config_byte(pci, reg, &retval);
|
608 |
|
|
return (retval);
|
609 |
|
|
}
|
610 |
|
|
case 2:
|
611 |
|
|
{
|
612 |
|
|
uint16_t retval;
|
613 |
|
|
pci_read_config_word(pci, reg, &retval);
|
614 |
|
|
return (retval);
|
615 |
|
|
}
|
616 |
|
|
case 4:
|
617 |
|
|
{
|
618 |
|
|
uint32_t retval;
|
619 |
|
|
pci_read_config_dword(pci, reg, &retval);
|
620 |
|
|
return (retval);
|
621 |
|
|
}
|
622 |
|
|
default:
|
623 |
|
|
panic("ahd_pci_read_config: Read size too big");
|
624 |
|
|
/* NOTREACHED */
|
625 |
|
|
return (0);
|
626 |
|
|
}
|
627 |
|
|
}
|
628 |
|
|
|
629 |
|
|
static __inline void ahd_pci_write_config(ahd_dev_softc_t pci,
|
630 |
|
|
int reg, uint32_t value,
|
631 |
|
|
int width);
|
632 |
|
|
|
633 |
|
|
static __inline void
|
634 |
|
|
ahd_pci_write_config(ahd_dev_softc_t pci, int reg, uint32_t value, int width)
|
635 |
|
|
{
|
636 |
|
|
switch (width) {
|
637 |
|
|
case 1:
|
638 |
|
|
pci_write_config_byte(pci, reg, value);
|
639 |
|
|
break;
|
640 |
|
|
case 2:
|
641 |
|
|
pci_write_config_word(pci, reg, value);
|
642 |
|
|
break;
|
643 |
|
|
case 4:
|
644 |
|
|
pci_write_config_dword(pci, reg, value);
|
645 |
|
|
break;
|
646 |
|
|
default:
|
647 |
|
|
panic("ahd_pci_write_config: Write size too big");
|
648 |
|
|
/* NOTREACHED */
|
649 |
|
|
}
|
650 |
|
|
}
|
651 |
|
|
|
652 |
|
|
static __inline int ahd_get_pci_function(ahd_dev_softc_t);
|
653 |
|
|
static __inline int
|
654 |
|
|
ahd_get_pci_function(ahd_dev_softc_t pci)
|
655 |
|
|
{
|
656 |
|
|
return (PCI_FUNC(pci->devfn));
|
657 |
|
|
}
|
658 |
|
|
|
659 |
|
|
static __inline int ahd_get_pci_slot(ahd_dev_softc_t);
|
660 |
|
|
static __inline int
|
661 |
|
|
ahd_get_pci_slot(ahd_dev_softc_t pci)
|
662 |
|
|
{
|
663 |
|
|
return (PCI_SLOT(pci->devfn));
|
664 |
|
|
}
|
665 |
|
|
|
666 |
|
|
static __inline int ahd_get_pci_bus(ahd_dev_softc_t);
|
667 |
|
|
static __inline int
|
668 |
|
|
ahd_get_pci_bus(ahd_dev_softc_t pci)
|
669 |
|
|
{
|
670 |
|
|
return (pci->bus->number);
|
671 |
|
|
}
|
672 |
|
|
|
673 |
|
|
static __inline void ahd_flush_device_writes(struct ahd_softc *);
|
674 |
|
|
static __inline void
|
675 |
|
|
ahd_flush_device_writes(struct ahd_softc *ahd)
|
676 |
|
|
{
|
677 |
|
|
/* XXX Is this sufficient for all architectures??? */
|
678 |
|
|
ahd_inb(ahd, INTSTAT);
|
679 |
|
|
}
|
680 |
|
|
|
681 |
|
|
/**************************** Proc FS Support *********************************/
|
682 |
|
|
int ahd_linux_proc_info(struct Scsi_Host *, char *, char **,
|
683 |
|
|
off_t, int, int);
|
684 |
|
|
|
685 |
|
|
/*********************** Transaction Access Wrappers **************************/
|
686 |
|
|
static __inline void ahd_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
|
687 |
|
|
static __inline void ahd_set_transaction_status(struct scb *, uint32_t);
|
688 |
|
|
static __inline void ahd_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t);
|
689 |
|
|
static __inline void ahd_set_scsi_status(struct scb *, uint32_t);
|
690 |
|
|
static __inline uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd);
|
691 |
|
|
static __inline uint32_t ahd_get_transaction_status(struct scb *);
|
692 |
|
|
static __inline uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd);
|
693 |
|
|
static __inline uint32_t ahd_get_scsi_status(struct scb *);
|
694 |
|
|
static __inline void ahd_set_transaction_tag(struct scb *, int, u_int);
|
695 |
|
|
static __inline u_long ahd_get_transfer_length(struct scb *);
|
696 |
|
|
static __inline int ahd_get_transfer_dir(struct scb *);
|
697 |
|
|
static __inline void ahd_set_residual(struct scb *, u_long);
|
698 |
|
|
static __inline void ahd_set_sense_residual(struct scb *scb, u_long resid);
|
699 |
|
|
static __inline u_long ahd_get_residual(struct scb *);
|
700 |
|
|
static __inline u_long ahd_get_sense_residual(struct scb *);
|
701 |
|
|
static __inline int ahd_perform_autosense(struct scb *);
|
702 |
|
|
static __inline uint32_t ahd_get_sense_bufsize(struct ahd_softc *,
|
703 |
|
|
struct scb *);
|
704 |
|
|
static __inline void ahd_notify_xfer_settings_change(struct ahd_softc *,
|
705 |
|
|
struct ahd_devinfo *);
|
706 |
|
|
static __inline void ahd_platform_scb_free(struct ahd_softc *ahd,
|
707 |
|
|
struct scb *scb);
|
708 |
|
|
static __inline void ahd_freeze_scb(struct scb *scb);
|
709 |
|
|
|
710 |
|
|
static __inline
|
711 |
|
|
void ahd_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status)
|
712 |
|
|
{
|
713 |
|
|
cmd->result &= ~(CAM_STATUS_MASK << 16);
|
714 |
|
|
cmd->result |= status << 16;
|
715 |
|
|
}
|
716 |
|
|
|
717 |
|
|
static __inline
|
718 |
|
|
void ahd_set_transaction_status(struct scb *scb, uint32_t status)
|
719 |
|
|
{
|
720 |
|
|
ahd_cmd_set_transaction_status(scb->io_ctx,status);
|
721 |
|
|
}
|
722 |
|
|
|
723 |
|
|
static __inline
|
724 |
|
|
void ahd_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status)
|
725 |
|
|
{
|
726 |
|
|
cmd->result &= ~0xFFFF;
|
727 |
|
|
cmd->result |= status;
|
728 |
|
|
}
|
729 |
|
|
|
730 |
|
|
static __inline
|
731 |
|
|
void ahd_set_scsi_status(struct scb *scb, uint32_t status)
|
732 |
|
|
{
|
733 |
|
|
ahd_cmd_set_scsi_status(scb->io_ctx, status);
|
734 |
|
|
}
|
735 |
|
|
|
736 |
|
|
static __inline
|
737 |
|
|
uint32_t ahd_cmd_get_transaction_status(struct scsi_cmnd *cmd)
|
738 |
|
|
{
|
739 |
|
|
return ((cmd->result >> 16) & CAM_STATUS_MASK);
|
740 |
|
|
}
|
741 |
|
|
|
742 |
|
|
static __inline
|
743 |
|
|
uint32_t ahd_get_transaction_status(struct scb *scb)
|
744 |
|
|
{
|
745 |
|
|
return (ahd_cmd_get_transaction_status(scb->io_ctx));
|
746 |
|
|
}
|
747 |
|
|
|
748 |
|
|
static __inline
|
749 |
|
|
uint32_t ahd_cmd_get_scsi_status(struct scsi_cmnd *cmd)
|
750 |
|
|
{
|
751 |
|
|
return (cmd->result & 0xFFFF);
|
752 |
|
|
}
|
753 |
|
|
|
754 |
|
|
static __inline
|
755 |
|
|
uint32_t ahd_get_scsi_status(struct scb *scb)
|
756 |
|
|
{
|
757 |
|
|
return (ahd_cmd_get_scsi_status(scb->io_ctx));
|
758 |
|
|
}
|
759 |
|
|
|
760 |
|
|
static __inline
|
761 |
|
|
void ahd_set_transaction_tag(struct scb *scb, int enabled, u_int type)
|
762 |
|
|
{
|
763 |
|
|
/*
|
764 |
|
|
* Nothing to do for linux as the incoming transaction
|
765 |
|
|
* has no concept of tag/non tagged, etc.
|
766 |
|
|
*/
|
767 |
|
|
}
|
768 |
|
|
|
769 |
|
|
static __inline
|
770 |
|
|
u_long ahd_get_transfer_length(struct scb *scb)
|
771 |
|
|
{
|
772 |
|
|
return (scb->platform_data->xfer_len);
|
773 |
|
|
}
|
774 |
|
|
|
775 |
|
|
static __inline
|
776 |
|
|
int ahd_get_transfer_dir(struct scb *scb)
|
777 |
|
|
{
|
778 |
|
|
return (scb->io_ctx->sc_data_direction);
|
779 |
|
|
}
|
780 |
|
|
|
781 |
|
|
static __inline
|
782 |
|
|
void ahd_set_residual(struct scb *scb, u_long resid)
|
783 |
|
|
{
|
784 |
|
|
scsi_set_resid(scb->io_ctx, resid);
|
785 |
|
|
}
|
786 |
|
|
|
787 |
|
|
static __inline
|
788 |
|
|
void ahd_set_sense_residual(struct scb *scb, u_long resid)
|
789 |
|
|
{
|
790 |
|
|
scb->platform_data->sense_resid = resid;
|
791 |
|
|
}
|
792 |
|
|
|
793 |
|
|
static __inline
|
794 |
|
|
u_long ahd_get_residual(struct scb *scb)
|
795 |
|
|
{
|
796 |
|
|
return scsi_get_resid(scb->io_ctx);
|
797 |
|
|
}
|
798 |
|
|
|
799 |
|
|
static __inline
|
800 |
|
|
u_long ahd_get_sense_residual(struct scb *scb)
|
801 |
|
|
{
|
802 |
|
|
return (scb->platform_data->sense_resid);
|
803 |
|
|
}
|
804 |
|
|
|
805 |
|
|
static __inline
|
806 |
|
|
int ahd_perform_autosense(struct scb *scb)
|
807 |
|
|
{
|
808 |
|
|
/*
|
809 |
|
|
* We always perform autosense in Linux.
|
810 |
|
|
* On other platforms this is set on a
|
811 |
|
|
* per-transaction basis.
|
812 |
|
|
*/
|
813 |
|
|
return (1);
|
814 |
|
|
}
|
815 |
|
|
|
816 |
|
|
static __inline uint32_t
|
817 |
|
|
ahd_get_sense_bufsize(struct ahd_softc *ahd, struct scb *scb)
|
818 |
|
|
{
|
819 |
|
|
return (sizeof(struct scsi_sense_data));
|
820 |
|
|
}
|
821 |
|
|
|
822 |
|
|
static __inline void
|
823 |
|
|
ahd_notify_xfer_settings_change(struct ahd_softc *ahd,
|
824 |
|
|
struct ahd_devinfo *devinfo)
|
825 |
|
|
{
|
826 |
|
|
/* Nothing to do here for linux */
|
827 |
|
|
}
|
828 |
|
|
|
829 |
|
|
static __inline void
|
830 |
|
|
ahd_platform_scb_free(struct ahd_softc *ahd, struct scb *scb)
|
831 |
|
|
{
|
832 |
|
|
ahd->flags &= ~AHD_RESOURCE_SHORTAGE;
|
833 |
|
|
}
|
834 |
|
|
|
835 |
|
|
int ahd_platform_alloc(struct ahd_softc *ahd, void *platform_arg);
|
836 |
|
|
void ahd_platform_free(struct ahd_softc *ahd);
|
837 |
|
|
void ahd_platform_init(struct ahd_softc *ahd);
|
838 |
|
|
void ahd_platform_freeze_devq(struct ahd_softc *ahd, struct scb *scb);
|
839 |
|
|
|
840 |
|
|
static __inline void
|
841 |
|
|
ahd_freeze_scb(struct scb *scb)
|
842 |
|
|
{
|
843 |
|
|
if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) {
|
844 |
|
|
scb->io_ctx->result |= CAM_DEV_QFRZN << 16;
|
845 |
|
|
scb->platform_data->dev->qfrozen++;
|
846 |
|
|
}
|
847 |
|
|
}
|
848 |
|
|
|
849 |
|
|
void ahd_platform_set_tags(struct ahd_softc *ahd, struct scsi_device *sdev,
|
850 |
|
|
struct ahd_devinfo *devinfo, ahd_queue_alg);
|
851 |
|
|
int ahd_platform_abort_scbs(struct ahd_softc *ahd, int target,
|
852 |
|
|
char channel, int lun, u_int tag,
|
853 |
|
|
role_t role, uint32_t status);
|
854 |
|
|
irqreturn_t
|
855 |
|
|
ahd_linux_isr(int irq, void *dev_id);
|
856 |
|
|
void ahd_done(struct ahd_softc*, struct scb*);
|
857 |
|
|
void ahd_send_async(struct ahd_softc *, char channel,
|
858 |
|
|
u_int target, u_int lun, ac_code);
|
859 |
|
|
void ahd_print_path(struct ahd_softc *, struct scb *);
|
860 |
|
|
|
861 |
|
|
#ifdef CONFIG_PCI
|
862 |
|
|
#define AHD_PCI_CONFIG 1
|
863 |
|
|
#else
|
864 |
|
|
#define AHD_PCI_CONFIG 0
|
865 |
|
|
#endif
|
866 |
|
|
#define bootverbose aic79xx_verbose
|
867 |
|
|
extern uint32_t aic79xx_verbose;
|
868 |
|
|
|
869 |
|
|
#endif /* _AIC79XX_LINUX_H_ */
|