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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [sound/] [oss/] [hal2.c] - Blame information for rev 3

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1 3 xianfeng
/*
2
 *  Driver for A2 audio system used in SGI machines
3
 *  Copyright (c) 2001, 2002, 2003 Ladislav Michl <ladis@linux-mips.org>
4
 *
5
 *  Based on Ulf Carlsson's code.
6
 *
7
 *  This program is free software; you can redistribute it and/or modify
8
 *  it under the terms of the GNU General Public License version 2 as
9
 *  published by the Free Software Foundation.
10
 *
11
 *  This program is distributed in the hope that it will be useful,
12
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
 *  GNU General Public License for more details.
15
 *
16
 *  You should have received a copy of the GNU General Public License
17
 *  along with this program; if not, write to the Free Software
18
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
 *
20
 *  Supported devices:
21
 *  /dev/dsp    standard dsp device, (mostly) OSS compatible
22
 *  /dev/mixer  standard mixer device, (mostly) OSS compatible
23
 *
24
 */
25
#include <linux/kernel.h>
26
#include <linux/module.h>
27
#include <linux/sched.h>
28
#include <linux/init.h>
29
#include <linux/slab.h>
30
#include <linux/poll.h>
31
#include <linux/interrupt.h>
32
#include <linux/dma-mapping.h>
33
#include <linux/sound.h>
34
#include <linux/soundcard.h>
35
#include <linux/mutex.h>
36
 
37
 
38
#include <asm/io.h>
39
#include <asm/sgi/hpc3.h>
40
#include <asm/sgi/ip22.h>
41
 
42
#include "hal2.h"
43
 
44
#if 0
45
#define DEBUG(args...)          printk(args)
46
#else
47
#define DEBUG(args...)
48
#endif
49
 
50
#if 0 
51
#define DEBUG_MIX(args...)      printk(args)
52
#else
53
#define DEBUG_MIX(args...)
54
#endif
55
 
56
/*
57
 * Before touching these look how it works. It is a bit unusual I know,
58
 * but it helps to keep things simple. This driver is considered complete
59
 * and I won't add any new features although hardware has many cool
60
 * capabilities.
61
 * (Historical note: HAL2 driver was first written by Ulf Carlsson - ALSA
62
 * 0.3 running with 2.2.x kernel. Then ALSA changed completely and it
63
 * seemed easier to me to write OSS driver from scratch - this one. Now
64
 * when ALSA is official part of 2.6 kernel it's time to write ALSA driver
65
 * using (hopefully) final version of ALSA interface)
66
 */
67
#define H2_BLOCK_SIZE   1024
68
#define H2_ADC_BUFSIZE  8192
69
#define H2_DAC_BUFSIZE  16834
70
 
71
struct hal2_pbus {
72
        struct hpc3_pbus_dmacregs *pbus;
73
        int pbusnr;
74
        unsigned int ctrl;              /* Current state of pbus->pbdma_ctrl */
75
};
76
 
77
struct hal2_desc {
78
        struct hpc_dma_desc desc;
79
        u32 cnt;                        /* don't touch, it is also padding */
80
};
81
 
82
struct hal2_codec {
83
        unsigned char *buffer;
84
        struct hal2_desc *desc;
85
        int desc_count;
86
        int tail, head;                 /* tail index, head index */
87
        struct hal2_pbus pbus;
88
        unsigned int format;            /* Audio data format */
89
        int voices;                     /* mono/stereo */
90
        unsigned int sample_rate;
91
        unsigned int master;            /* Master frequency */
92
        unsigned short mod;             /* MOD value */
93
        unsigned short inc;             /* INC value */
94
 
95
        wait_queue_head_t dma_wait;
96
        spinlock_t lock;
97
        struct mutex sem;
98
 
99
        int usecount;                   /* recording and playback are
100
                                         * independent */
101
};
102
 
103
#define H2_MIX_OUTPUT_ATT       0
104
#define H2_MIX_INPUT_GAIN       1
105
#define H2_MIXERS               2
106
struct hal2_mixer {
107
        int modcnt;
108
        unsigned int master;
109
        unsigned int volume[H2_MIXERS];
110
};
111
 
112
struct hal2_card {
113
        int dev_dsp;                    /* audio device */
114
        int dev_mixer;                  /* mixer device */
115
        int dev_midi;                   /* midi device */
116
 
117
        struct hal2_ctl_regs *ctl_regs; /* HAL2 ctl registers */
118
        struct hal2_aes_regs *aes_regs; /* HAL2 aes registers */
119
        struct hal2_vol_regs *vol_regs; /* HAL2 vol registers */
120
        struct hal2_syn_regs *syn_regs; /* HAL2 syn registers */
121
 
122
        struct hal2_codec dac;
123
        struct hal2_codec adc;
124
        struct hal2_mixer mixer;
125
};
126
 
127
#define H2_INDIRECT_WAIT(regs)  while (regs->isr & H2_ISR_TSTATUS);
128
 
129
#define H2_READ_ADDR(addr)      (addr | (1<<7))
130
#define H2_WRITE_ADDR(addr)     (addr)
131
 
132
static char *hal2str = "HAL2";
133
 
134
/*
135
 * I doubt anyone has a machine with two HAL2 cards. It's possible to
136
 * have two HPC's, so it is probably possible to have two HAL2 cards.
137
 * Try to deal with it, but note that it is not tested.
138
 */
139
#define MAXCARDS        2
140
static struct hal2_card* hal2_card[MAXCARDS];
141
 
142
static const struct {
143
        unsigned char idx:4, avail:1;
144
} mixtable[SOUND_MIXER_NRDEVICES] = {
145
        [SOUND_MIXER_PCM]       = { H2_MIX_OUTPUT_ATT, 1 },     /* voice */
146
        [SOUND_MIXER_MIC]       = { H2_MIX_INPUT_GAIN, 1 },     /* mic */
147
};
148
 
149
#define H2_SUPPORTED_FORMATS    (AFMT_S16_LE | AFMT_S16_BE)
150
 
151
static inline void hal2_isr_write(struct hal2_card *hal2, u16 val)
152
{
153
        hal2->ctl_regs->isr = val;
154
}
155
 
156
static inline u16 hal2_isr_look(struct hal2_card *hal2)
157
{
158
        return hal2->ctl_regs->isr;
159
}
160
 
161
static inline u16 hal2_rev_look(struct hal2_card *hal2)
162
{
163
        return hal2->ctl_regs->rev;
164
}
165
 
166
#ifdef HAL2_DUMP_REGS
167
static u16 hal2_i_look16(struct hal2_card *hal2, u16 addr)
168
{
169
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
170
 
171
        regs->iar = H2_READ_ADDR(addr);
172
        H2_INDIRECT_WAIT(regs);
173
        return regs->idr0;
174
}
175
#endif
176
 
177
static u32 hal2_i_look32(struct hal2_card *hal2, u16 addr)
178
{
179
        u32 ret;
180
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
181
 
182
        regs->iar = H2_READ_ADDR(addr);
183
        H2_INDIRECT_WAIT(regs);
184
        ret = regs->idr0 & 0xffff;
185
        regs->iar = H2_READ_ADDR(addr | 0x1);
186
        H2_INDIRECT_WAIT(regs);
187
        ret |= (regs->idr0 & 0xffff) << 16;
188
        return ret;
189
}
190
 
191
static void hal2_i_write16(struct hal2_card *hal2, u16 addr, u16 val)
192
{
193
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
194
 
195
        regs->idr0 = val;
196
        regs->idr1 = 0;
197
        regs->idr2 = 0;
198
        regs->idr3 = 0;
199
        regs->iar = H2_WRITE_ADDR(addr);
200
        H2_INDIRECT_WAIT(regs);
201
}
202
 
203
static void hal2_i_write32(struct hal2_card *hal2, u16 addr, u32 val)
204
{
205
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
206
 
207
        regs->idr0 = val & 0xffff;
208
        regs->idr1 = val >> 16;
209
        regs->idr2 = 0;
210
        regs->idr3 = 0;
211
        regs->iar = H2_WRITE_ADDR(addr);
212
        H2_INDIRECT_WAIT(regs);
213
}
214
 
215
static void hal2_i_setbit16(struct hal2_card *hal2, u16 addr, u16 bit)
216
{
217
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
218
 
219
        regs->iar = H2_READ_ADDR(addr);
220
        H2_INDIRECT_WAIT(regs);
221
        regs->idr0 = (regs->idr0 & 0xffff) | bit;
222
        regs->idr1 = 0;
223
        regs->idr2 = 0;
224
        regs->idr3 = 0;
225
        regs->iar = H2_WRITE_ADDR(addr);
226
        H2_INDIRECT_WAIT(regs);
227
}
228
 
229
static void hal2_i_setbit32(struct hal2_card *hal2, u16 addr, u32 bit)
230
{
231
        u32 tmp;
232
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
233
 
234
        regs->iar = H2_READ_ADDR(addr);
235
        H2_INDIRECT_WAIT(regs);
236
        tmp = (regs->idr0 & 0xffff) | (regs->idr1 << 16) | bit;
237
        regs->idr0 = tmp & 0xffff;
238
        regs->idr1 = tmp >> 16;
239
        regs->idr2 = 0;
240
        regs->idr3 = 0;
241
        regs->iar = H2_WRITE_ADDR(addr);
242
        H2_INDIRECT_WAIT(regs);
243
}
244
 
245
static void hal2_i_clearbit16(struct hal2_card *hal2, u16 addr, u16 bit)
246
{
247
        struct hal2_ctl_regs *regs = hal2->ctl_regs;
248
 
249
        regs->iar = H2_READ_ADDR(addr);
250
        H2_INDIRECT_WAIT(regs);
251
        regs->idr0 = (regs->idr0 & 0xffff) & ~bit;
252
        regs->idr1 = 0;
253
        regs->idr2 = 0;
254
        regs->idr3 = 0;
255
        regs->iar = H2_WRITE_ADDR(addr);
256
        H2_INDIRECT_WAIT(regs);
257
}
258
 
259
#if 0
260
static void hal2_i_clearbit32(struct hal2_card *hal2, u16 addr, u32 bit)
261
{
262
        u32 tmp;
263
        hal2_ctl_regs_t *regs = hal2->ctl_regs;
264
 
265
        regs->iar = H2_READ_ADDR(addr);
266
        H2_INDIRECT_WAIT(regs);
267
        tmp = ((regs->idr0 & 0xffff) | (regs->idr1 << 16)) & ~bit;
268
        regs->idr0 = tmp & 0xffff;
269
        regs->idr1 = tmp >> 16;
270
        regs->idr2 = 0;
271
        regs->idr3 = 0;
272
        regs->iar = H2_WRITE_ADDR(addr);
273
        H2_INDIRECT_WAIT(regs);
274
}
275
#endif
276
 
277
#ifdef HAL2_DUMP_REGS
278
static void hal2_dump_regs(struct hal2_card *hal2)
279
{
280
        DEBUG("isr: %08hx ", hal2_isr_look(hal2));
281
        DEBUG("rev: %08hx\n", hal2_rev_look(hal2));
282
        DEBUG("relay: %04hx\n", hal2_i_look16(hal2, H2I_RELAY_C));
283
        DEBUG("port en: %04hx ", hal2_i_look16(hal2, H2I_DMA_PORT_EN));
284
        DEBUG("dma end: %04hx ", hal2_i_look16(hal2, H2I_DMA_END));
285
        DEBUG("dma drv: %04hx\n", hal2_i_look16(hal2, H2I_DMA_DRV));
286
        DEBUG("syn ctl: %04hx ", hal2_i_look16(hal2, H2I_SYNTH_C));
287
        DEBUG("aesrx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESRX_C));
288
        DEBUG("aestx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESTX_C));
289
        DEBUG("dac ctl1: %04hx ", hal2_i_look16(hal2, H2I_ADC_C1));
290
        DEBUG("dac ctl2: %08x ", hal2_i_look32(hal2, H2I_ADC_C2));
291
        DEBUG("adc ctl1: %04hx ", hal2_i_look16(hal2, H2I_DAC_C1));
292
        DEBUG("adc ctl2: %08x ", hal2_i_look32(hal2, H2I_DAC_C2));
293
        DEBUG("syn map: %04hx\n", hal2_i_look16(hal2, H2I_SYNTH_MAP_C));
294
        DEBUG("bres1 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES1_C1));
295
        DEBUG("bres1 ctl2: %04x ", hal2_i_look32(hal2, H2I_BRES1_C2));
296
        DEBUG("bres2 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES2_C1));
297
        DEBUG("bres2 ctl2: %04x ", hal2_i_look32(hal2, H2I_BRES2_C2));
298
        DEBUG("bres3 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES3_C1));
299
        DEBUG("bres3 ctl2: %04x\n", hal2_i_look32(hal2, H2I_BRES3_C2));
300
}
301
#endif
302
 
303
static struct hal2_card* hal2_dsp_find_card(int minor)
304
{
305
        int i;
306
 
307
        for (i = 0; i < MAXCARDS; i++)
308
                if (hal2_card[i] != NULL && hal2_card[i]->dev_dsp == minor)
309
                        return hal2_card[i];
310
        return NULL;
311
}
312
 
313
static struct hal2_card* hal2_mixer_find_card(int minor)
314
{
315
        int i;
316
 
317
        for (i = 0; i < MAXCARDS; i++)
318
                if (hal2_card[i] != NULL && hal2_card[i]->dev_mixer == minor)
319
                        return hal2_card[i];
320
        return NULL;
321
}
322
 
323
static void hal2_inc_head(struct hal2_codec *codec)
324
{
325
        codec->head++;
326
        if (codec->head == codec->desc_count)
327
                codec->head = 0;
328
}
329
 
330
static void hal2_inc_tail(struct hal2_codec *codec)
331
{
332
        codec->tail++;
333
        if (codec->tail == codec->desc_count)
334
                codec->tail = 0;
335
}
336
 
337
static void hal2_dac_interrupt(struct hal2_codec *dac)
338
{
339
        int running;
340
 
341
        spin_lock(&dac->lock);
342
        /* if tail buffer contains zero samples DMA stream was already
343
         * stopped */
344
        running = dac->desc[dac->tail].cnt;
345
        dac->desc[dac->tail].cnt = 0;
346
        dac->desc[dac->tail].desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX;
347
        /* we just proccessed empty buffer, don't update tail pointer */
348
        if (running)
349
                hal2_inc_tail(dac);
350
        spin_unlock(&dac->lock);
351
 
352
        wake_up(&dac->dma_wait);
353
}
354
 
355
static void hal2_adc_interrupt(struct hal2_codec *adc)
356
{
357
        int running;
358
 
359
        spin_lock(&adc->lock);
360
        /* if head buffer contains nonzero samples DMA stream was already
361
         * stopped */
362
        running = !adc->desc[adc->head].cnt;
363
        adc->desc[adc->head].cnt = H2_BLOCK_SIZE;
364
        adc->desc[adc->head].desc.cntinfo = HPCDMA_XIE | HPCDMA_EOR;
365
        /* we just proccessed empty buffer, don't update head pointer */
366
        if (running)
367
                hal2_inc_head(adc);
368
        spin_unlock(&adc->lock);
369
 
370
        wake_up(&adc->dma_wait);
371
}
372
 
373
static irqreturn_t hal2_interrupt(int irq, void *dev_id)
374
{
375
        struct hal2_card *hal2 = dev_id;
376
        irqreturn_t ret = IRQ_NONE;
377
 
378
        /* decide what caused this interrupt */
379
        if (hal2->dac.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) {
380
                hal2_dac_interrupt(&hal2->dac);
381
                ret = IRQ_HANDLED;
382
        }
383
        if (hal2->adc.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) {
384
                hal2_adc_interrupt(&hal2->adc);
385
                ret = IRQ_HANDLED;
386
        }
387
        return ret;
388
}
389
 
390
static int hal2_compute_rate(struct hal2_codec *codec, unsigned int rate)
391
{
392
        unsigned short mod;
393
 
394
        DEBUG("rate: %d\n", rate);
395
 
396
        if (rate < 4000) rate = 4000;
397
        else if (rate > 48000) rate = 48000;
398
 
399
        if (44100 % rate < 48000 % rate) {
400
                mod = 4 * 44100 / rate;
401
                codec->master = 44100;
402
        } else {
403
                mod = 4 * 48000 / rate;
404
                codec->master = 48000;
405
        }
406
 
407
        codec->inc = 4;
408
        codec->mod = mod;
409
        rate = 4 * codec->master / mod;
410
 
411
        DEBUG("real_rate: %d\n", rate);
412
 
413
        return rate;
414
}
415
 
416
static void hal2_set_dac_rate(struct hal2_card *hal2)
417
{
418
        unsigned int master = hal2->dac.master;
419
        int inc = hal2->dac.inc;
420
        int mod = hal2->dac.mod;
421
 
422
        DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod);
423
 
424
        hal2_i_write16(hal2, H2I_BRES1_C1, (master == 44100) ? 1 : 0);
425
        hal2_i_write32(hal2, H2I_BRES1_C2, ((0xffff & (inc - mod - 1)) << 16) | inc);
426
}
427
 
428
static void hal2_set_adc_rate(struct hal2_card *hal2)
429
{
430
        unsigned int master = hal2->adc.master;
431
        int inc = hal2->adc.inc;
432
        int mod = hal2->adc.mod;
433
 
434
        DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod);
435
 
436
        hal2_i_write16(hal2, H2I_BRES2_C1, (master == 44100) ? 1 : 0);
437
        hal2_i_write32(hal2, H2I_BRES2_C2, ((0xffff & (inc - mod - 1)) << 16) | inc);
438
}
439
 
440
static void hal2_setup_dac(struct hal2_card *hal2)
441
{
442
        unsigned int fifobeg, fifoend, highwater, sample_size;
443
        struct hal2_pbus *pbus = &hal2->dac.pbus;
444
 
445
        DEBUG("hal2_setup_dac\n");
446
 
447
        /* Now we set up some PBUS information. The PBUS needs information about
448
         * what portion of the fifo it will use. If it's receiving or
449
         * transmitting, and finally whether the stream is little endian or big
450
         * endian. The information is written later, on the start call.
451
         */
452
        sample_size = 2 * hal2->dac.voices;
453
        /* Fifo should be set to hold exactly four samples. Highwater mark
454
         * should be set to two samples. */
455
        highwater = (sample_size * 2) >> 1;     /* halfwords */
456
        fifobeg = 0;                             /* playback is first */
457
        fifoend = (sample_size * 4) >> 3;       /* doublewords */
458
        pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_LD |
459
                     (highwater << 8) | (fifobeg << 16) | (fifoend << 24) |
460
                     (hal2->dac.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0);
461
        /* We disable everything before we do anything at all */
462
        pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
463
        hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX);
464
        /* Setup the HAL2 for playback */
465
        hal2_set_dac_rate(hal2);
466
        /* Set endianess */
467
        if (hal2->dac.format & AFMT_S16_LE)
468
                hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX);
469
        else
470
                hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX);
471
        /* Set DMA bus */
472
        hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
473
        /* We are using 1st Bresenham clock generator for playback */
474
        hal2_i_write16(hal2, H2I_DAC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT)
475
                        | (1 << H2I_C1_CLKID_SHIFT)
476
                        | (hal2->dac.voices << H2I_C1_DATAT_SHIFT));
477
}
478
 
479
static void hal2_setup_adc(struct hal2_card *hal2)
480
{
481
        unsigned int fifobeg, fifoend, highwater, sample_size;
482
        struct hal2_pbus *pbus = &hal2->adc.pbus;
483
 
484
        DEBUG("hal2_setup_adc\n");
485
 
486
        sample_size = 2 * hal2->adc.voices;
487
        highwater = (sample_size * 2) >> 1;             /* halfwords */
488
        fifobeg = (4 * 4) >> 3;                         /* record is second */
489
        fifoend = (4 * 4 + sample_size * 4) >> 3;       /* doublewords */
490
        pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD |
491
                     (highwater << 8) | (fifobeg << 16) | (fifoend << 24) |
492
                     (hal2->adc.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0);
493
        pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
494
        hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR);
495
        /* Setup the HAL2 for record */
496
        hal2_set_adc_rate(hal2);
497
        /* Set endianess */
498
        if (hal2->adc.format & AFMT_S16_LE)
499
                hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR);
500
        else
501
                hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR);
502
        /* Set DMA bus */
503
        hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr));
504
        /* We are using 2nd Bresenham clock generator for record */
505
        hal2_i_write16(hal2, H2I_ADC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT)
506
                        | (2 << H2I_C1_CLKID_SHIFT)
507
                        | (hal2->adc.voices << H2I_C1_DATAT_SHIFT));
508
}
509
 
510
static dma_addr_t hal2_desc_addr(struct hal2_codec *codec, int i)
511
{
512
        if (--i < 0)
513
                i = codec->desc_count - 1;
514
        return codec->desc[i].desc.pnext;
515
}
516
 
517
static void hal2_start_dac(struct hal2_card *hal2)
518
{
519
        struct hal2_codec *dac = &hal2->dac;
520
        struct hal2_pbus *pbus = &dac->pbus;
521
 
522
        pbus->pbus->pbdma_dptr = hal2_desc_addr(dac, dac->tail);
523
        pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT;
524
        /* enable DAC */
525
        hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX);
526
}
527
 
528
static void hal2_start_adc(struct hal2_card *hal2)
529
{
530
        struct hal2_codec *adc = &hal2->adc;
531
        struct hal2_pbus *pbus = &adc->pbus;
532
 
533
        pbus->pbus->pbdma_dptr = hal2_desc_addr(adc, adc->head);
534
        pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT;
535
        /* enable ADC */
536
        hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR);
537
}
538
 
539
static inline void hal2_stop_dac(struct hal2_card *hal2)
540
{
541
        hal2->dac.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
542
        /* The HAL2 itself may remain enabled safely */
543
}
544
 
545
static inline void hal2_stop_adc(struct hal2_card *hal2)
546
{
547
        hal2->adc.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
548
}
549
 
550
static int hal2_alloc_dmabuf(struct hal2_codec *codec, int size,
551
                             int count, int cntinfo, int dir)
552
{
553
        struct hal2_desc *desc, *dma_addr;
554
        int i;
555
 
556
        DEBUG("allocating %dk DMA buffer.\n", size / 1024);
557
 
558
        codec->buffer = (unsigned char *)__get_free_pages(GFP_KERNEL | GFP_DMA,
559
                                                          get_order(size));
560
        if (!codec->buffer)
561
                return -ENOMEM;
562
        desc = dma_alloc_coherent(NULL, count * sizeof(struct hal2_desc),
563
                                  (dma_addr_t *)&dma_addr, GFP_KERNEL);
564
        if (!desc) {
565
                free_pages((unsigned long)codec->buffer, get_order(size));
566
                return -ENOMEM;
567
        }
568
        codec->desc = desc;
569
        for (i = 0; i < count; i++) {
570
                desc->desc.pbuf = dma_map_single(NULL,
571
                        (void *)(codec->buffer + i * H2_BLOCK_SIZE),
572
                        H2_BLOCK_SIZE, dir);
573
                desc->desc.cntinfo = cntinfo;
574
                desc->desc.pnext = (i == count - 1) ?
575
                                   (u32)dma_addr : (u32)(dma_addr + i + 1);
576
                desc->cnt = 0;
577
                desc++;
578
        }
579
        codec->desc_count = count;
580
        codec->head = codec->tail = 0;
581
        return 0;
582
}
583
 
584
static int hal2_alloc_dac_dmabuf(struct hal2_codec *codec)
585
{
586
        return hal2_alloc_dmabuf(codec, H2_DAC_BUFSIZE,
587
                                 H2_DAC_BUFSIZE / H2_BLOCK_SIZE,
588
                                 HPCDMA_XIE | HPCDMA_EOX,
589
                                 DMA_TO_DEVICE);
590
}
591
 
592
static int hal2_alloc_adc_dmabuf(struct hal2_codec *codec)
593
{
594
        return hal2_alloc_dmabuf(codec, H2_ADC_BUFSIZE,
595
                                 H2_ADC_BUFSIZE / H2_BLOCK_SIZE,
596
                                 HPCDMA_XIE | H2_BLOCK_SIZE,
597
                                 DMA_TO_DEVICE);
598
}
599
 
600
static void hal2_free_dmabuf(struct hal2_codec *codec, int size, int dir)
601
{
602
        dma_addr_t dma_addr;
603
        int i;
604
 
605
        dma_addr = codec->desc[codec->desc_count - 1].desc.pnext;
606
        for (i = 0; i < codec->desc_count; i++)
607
                dma_unmap_single(NULL, codec->desc[i].desc.pbuf,
608
                                 H2_BLOCK_SIZE, dir);
609
        dma_free_coherent(NULL, codec->desc_count * sizeof(struct hal2_desc),
610
                          (void *)codec->desc, dma_addr);
611
        free_pages((unsigned long)codec->buffer, get_order(size));
612
}
613
 
614
static void hal2_free_dac_dmabuf(struct hal2_codec *codec)
615
{
616
        return hal2_free_dmabuf(codec, H2_DAC_BUFSIZE, DMA_TO_DEVICE);
617
}
618
 
619
static void hal2_free_adc_dmabuf(struct hal2_codec *codec)
620
{
621
        return hal2_free_dmabuf(codec, H2_ADC_BUFSIZE, DMA_FROM_DEVICE);
622
}
623
 
624
/*
625
 * Add 'count' bytes to 'buffer' from DMA ring buffers. Return number of
626
 * bytes added or -EFAULT if copy_from_user failed.
627
 */
628
static int hal2_get_buffer(struct hal2_card *hal2, char *buffer, int count)
629
{
630
        unsigned long flags;
631
        int size, ret = 0;
632
        unsigned char *buf;
633
        struct hal2_desc *tail;
634
        struct hal2_codec *adc = &hal2->adc;
635
 
636
        DEBUG("getting %d bytes ", count);
637
 
638
        spin_lock_irqsave(&adc->lock, flags);
639
        tail = &adc->desc[adc->tail];
640
        /* enable DMA stream if there are no data */
641
        if (!tail->cnt && !(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT))
642
                hal2_start_adc(hal2);
643
        while (tail->cnt > 0 && count > 0) {
644
                size = min((int)tail->cnt, count);
645
                buf = &adc->buffer[(adc->tail + 1) * H2_BLOCK_SIZE - tail->cnt];
646
                spin_unlock_irqrestore(&adc->lock, flags);
647
                dma_sync_single(NULL, tail->desc.pbuf, size, DMA_FROM_DEVICE);
648
                if (copy_to_user(buffer, buf, size)) {
649
                        ret = -EFAULT;
650
                        goto out;
651
                }
652
                spin_lock_irqsave(&adc->lock, flags);
653
                tail->cnt -= size;
654
                /* buffer is empty, update tail pointer */
655
                if (tail->cnt == 0) {
656
                        tail->desc.cntinfo = HPCDMA_XIE | H2_BLOCK_SIZE;
657
                        hal2_inc_tail(adc);
658
                        tail = &adc->desc[adc->tail];
659
                        /* enable DMA stream again if needed */
660
                        if (!(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT))
661
                                hal2_start_adc(hal2);
662
                }
663
                buffer += size;
664
                ret += size;
665
                count -= size;
666
 
667
                DEBUG("(%d) ", size);
668
        }
669
        spin_unlock_irqrestore(&adc->lock, flags);
670
out:
671
        DEBUG("\n");
672
 
673
        return ret;
674
}
675
 
676
/*
677
 * Add 'count' bytes from 'buffer' to DMA ring buffers. Return number of
678
 * bytes added or -EFAULT if copy_from_user failed.
679
 */
680
static int hal2_add_buffer(struct hal2_card *hal2, char *buffer, int count)
681
{
682
        unsigned long flags;
683
        unsigned char *buf;
684
        int size, ret = 0;
685
        struct hal2_desc *head;
686
        struct hal2_codec *dac = &hal2->dac;
687
 
688
        DEBUG("adding %d bytes ", count);
689
 
690
        spin_lock_irqsave(&dac->lock, flags);
691
        head = &dac->desc[dac->head];
692
        while (head->cnt == 0 && count > 0) {
693
                size = min((int)H2_BLOCK_SIZE, count);
694
                buf = &dac->buffer[dac->head * H2_BLOCK_SIZE];
695
                spin_unlock_irqrestore(&dac->lock, flags);
696
                if (copy_from_user(buf, buffer, size)) {
697
                        ret = -EFAULT;
698
                        goto out;
699
                }
700
                dma_sync_single(NULL, head->desc.pbuf, size, DMA_TO_DEVICE);
701
                spin_lock_irqsave(&dac->lock, flags);
702
                head->desc.cntinfo = size | HPCDMA_XIE;
703
                head->cnt = size;
704
                buffer += size;
705
                ret += size;
706
                count -= size;
707
                hal2_inc_head(dac);
708
                head = &dac->desc[dac->head];
709
 
710
                DEBUG("(%d) ", size);
711
        }
712
        if (!(dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) && ret > 0)
713
                hal2_start_dac(hal2);
714
        spin_unlock_irqrestore(&dac->lock, flags);
715
out:
716
        DEBUG("\n");
717
 
718
        return ret;
719
}
720
 
721
#define hal2_reset_dac_pointer(hal2)    hal2_reset_pointer(hal2, 1)
722
#define hal2_reset_adc_pointer(hal2)    hal2_reset_pointer(hal2, 0)
723
static void hal2_reset_pointer(struct hal2_card *hal2, int is_dac)
724
{
725
        int i;
726
        struct hal2_codec *codec = (is_dac) ? &hal2->dac : &hal2->adc;
727
 
728
        DEBUG("hal2_reset_pointer\n");
729
 
730
        for (i = 0; i < codec->desc_count; i++) {
731
                codec->desc[i].cnt = 0;
732
                codec->desc[i].desc.cntinfo = HPCDMA_XIE | (is_dac) ?
733
                                              HPCDMA_EOX : H2_BLOCK_SIZE;
734
        }
735
        codec->head = codec->tail = 0;
736
}
737
 
738
static int hal2_sync_dac(struct hal2_card *hal2)
739
{
740
        DECLARE_WAITQUEUE(wait, current);
741
        struct hal2_codec *dac = &hal2->dac;
742
        int ret = 0;
743
        unsigned long flags;
744
        signed long timeout = 1000 * H2_BLOCK_SIZE * 2 * dac->voices *
745
                              HZ / dac->sample_rate / 900;
746
 
747
        while (dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) {
748
                add_wait_queue(&dac->dma_wait, &wait);
749
                set_current_state(TASK_INTERRUPTIBLE);
750
                schedule_timeout(timeout);
751
                spin_lock_irqsave(&dac->lock, flags);
752
                if (dac->desc[dac->tail].cnt)
753
                        ret = -ETIME;
754
                spin_unlock_irqrestore(&dac->lock, flags);
755
                if (signal_pending(current))
756
                        ret = -ERESTARTSYS;
757
                if (ret) {
758
                        hal2_stop_dac(hal2);
759
                        hal2_reset_dac_pointer(hal2);
760
                }
761
                remove_wait_queue(&dac->dma_wait, &wait);
762
        }
763
 
764
        return ret;
765
}
766
 
767
static int hal2_write_mixer(struct hal2_card *hal2, int index, int vol)
768
{
769
        unsigned int l, r, tmp;
770
 
771
        DEBUG_MIX("mixer %d write\n", index);
772
 
773
        if (index >= SOUND_MIXER_NRDEVICES || !mixtable[index].avail)
774
                return -EINVAL;
775
 
776
        r = (vol >> 8) & 0xff;
777
        if (r > 100)
778
                r = 100;
779
        l = vol & 0xff;
780
        if (l > 100)
781
                l = 100;
782
 
783
        hal2->mixer.volume[mixtable[index].idx] = l | (r << 8);
784
 
785
        switch (mixtable[index].idx) {
786
        case H2_MIX_OUTPUT_ATT:
787
 
788
                DEBUG_MIX("output attenuator %d,%d\n", l, r);
789
 
790
                if (r | l) {
791
                        tmp = hal2_i_look32(hal2, H2I_DAC_C2);
792
                        tmp &= ~(H2I_C2_L_ATT_M | H2I_C2_R_ATT_M | H2I_C2_MUTE);
793
 
794
                        /* Attenuator has five bits */
795
                        l = 31 * (100 - l) / 99;
796
                        r = 31 * (100 - r) / 99;
797
 
798
                        DEBUG_MIX("left: %d, right %d\n", l, r);
799
 
800
                        tmp |= (l << H2I_C2_L_ATT_SHIFT) & H2I_C2_L_ATT_M;
801
                        tmp |= (r << H2I_C2_R_ATT_SHIFT) & H2I_C2_R_ATT_M;
802
                        hal2_i_write32(hal2, H2I_DAC_C2, tmp);
803
                } else
804
                        hal2_i_setbit32(hal2, H2I_DAC_C2, H2I_C2_MUTE);
805
                break;
806
        case H2_MIX_INPUT_GAIN:
807
 
808
                DEBUG_MIX("input gain %d,%d\n", l, r);
809
 
810
                tmp = hal2_i_look32(hal2, H2I_ADC_C2);
811
                tmp &= ~(H2I_C2_L_GAIN_M | H2I_C2_R_GAIN_M);
812
 
813
                /* Gain control has four bits */
814
                l = 16 * l / 100;
815
                r = 16 * r / 100;
816
 
817
                DEBUG_MIX("left: %d, right %d\n", l, r);
818
 
819
                tmp |= (l << H2I_C2_L_GAIN_SHIFT) & H2I_C2_L_GAIN_M;
820
                tmp |= (r << H2I_C2_R_GAIN_SHIFT) & H2I_C2_R_GAIN_M;
821
                hal2_i_write32(hal2, H2I_ADC_C2, tmp);
822
 
823
                break;
824
        }
825
 
826
        return 0;
827
}
828
 
829
static void hal2_init_mixer(struct hal2_card *hal2)
830
{
831
        int i;
832
 
833
        for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
834
                if (mixtable[i].avail)
835
                        hal2->mixer.volume[mixtable[i].idx] = 100 | (100 << 8);
836
 
837
        /* disable attenuator */
838
        hal2_i_write32(hal2, H2I_DAC_C2, 0);
839
        /* set max input gain */
840
        hal2_i_write32(hal2, H2I_ADC_C2, H2I_C2_MUTE |
841
                        (H2I_C2_L_GAIN_M << H2I_C2_L_GAIN_SHIFT) |
842
                        (H2I_C2_R_GAIN_M << H2I_C2_R_GAIN_SHIFT));
843
        /* set max volume */
844
        hal2->mixer.master = 0xff;
845
        hal2->vol_regs->left = 0xff;
846
        hal2->vol_regs->right = 0xff;
847
}
848
 
849
/*
850
 * XXX: later i'll implement mixer for main volume which will be disabled
851
 * by default. enabling it users will be allowed to have master volume level
852
 * control on panel in their favourite X desktop
853
 */
854
static void hal2_volume_control(int direction)
855
{
856
        unsigned int master = hal2_card[0]->mixer.master;
857
        struct hal2_vol_regs *vol = hal2_card[0]->vol_regs;
858
 
859
        /* volume up */
860
        if (direction > 0 && master < 0xff)
861
                master++;
862
        /* volume down */
863
        else if (direction < 0 && master > 0)
864
                master--;
865
        /* TODO: mute/unmute */
866
        vol->left = master;
867
        vol->right = master;
868
        hal2_card[0]->mixer.master = master;
869
}
870
 
871
static int hal2_mixer_ioctl(struct hal2_card *hal2, unsigned int cmd,
872
                            unsigned long arg)
873
{
874
        int val;
875
 
876
        if (cmd == SOUND_MIXER_INFO) {
877
                mixer_info info;
878
 
879
                memset(&info, 0, sizeof(info));
880
                strlcpy(info.id, hal2str, sizeof(info.id));
881
                strlcpy(info.name, hal2str, sizeof(info.name));
882
                info.modify_counter = hal2->mixer.modcnt;
883
                if (copy_to_user((void *)arg, &info, sizeof(info)))
884
                        return -EFAULT;
885
                return 0;
886
        }
887
        if (cmd == SOUND_OLD_MIXER_INFO) {
888
                _old_mixer_info info;
889
 
890
                memset(&info, 0, sizeof(info));
891
                strlcpy(info.id, hal2str, sizeof(info.id));
892
                strlcpy(info.name, hal2str, sizeof(info.name));
893
                if (copy_to_user((void *)arg, &info, sizeof(info)))
894
                        return -EFAULT;
895
                return 0;
896
        }
897
        if (cmd == OSS_GETVERSION)
898
                return put_user(SOUND_VERSION, (int *)arg);
899
 
900
        if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
901
                return -EINVAL;
902
 
903
        if (_IOC_DIR(cmd) == _IOC_READ) {
904
                switch (_IOC_NR(cmd)) {
905
                /* Give the current record source */
906
                case SOUND_MIXER_RECSRC:
907
                        val = 0; /* FIXME */
908
                        break;
909
                /* Give the supported mixers, all of them support stereo */
910
                case SOUND_MIXER_DEVMASK:
911
                case SOUND_MIXER_STEREODEVS: {
912
                        int i;
913
 
914
                        for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
915
                                if (mixtable[i].avail)
916
                                        val |= 1 << i;
917
                        break;
918
                        }
919
                /* Arg contains a bit for each supported recording source */
920
                case SOUND_MIXER_RECMASK:
921
                        val = 0;
922
                        break;
923
                case SOUND_MIXER_CAPS:
924
                        val = 0;
925
                        break;
926
                /* Read a specific mixer */
927
                default: {
928
                        int i = _IOC_NR(cmd);
929
 
930
                        if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
931
                                return -EINVAL;
932
                        val = hal2->mixer.volume[mixtable[i].idx];
933
                        break;
934
                        }
935
                }
936
                return put_user(val, (int *)arg);
937
        }
938
 
939
        if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
940
                return -EINVAL;
941
 
942
        hal2->mixer.modcnt++;
943
 
944
        if (get_user(val, (int *)arg))
945
                return -EFAULT;
946
 
947
        switch (_IOC_NR(cmd)) {
948
        /* Arg contains a bit for each recording source */
949
        case SOUND_MIXER_RECSRC:
950
                return 0;        /* FIXME */
951
        default:
952
                return hal2_write_mixer(hal2, _IOC_NR(cmd), val);
953
        }
954
 
955
        return 0;
956
}
957
 
958
static int hal2_open_mixdev(struct inode *inode, struct file *file)
959
{
960
        struct hal2_card *hal2 = hal2_mixer_find_card(iminor(inode));
961
 
962
        if (hal2) {
963
                file->private_data = hal2;
964
                return nonseekable_open(inode, file);
965
        }
966
        return -ENODEV;
967
}
968
 
969
static int hal2_release_mixdev(struct inode *inode, struct file *file)
970
{
971
        return 0;
972
}
973
 
974
static int hal2_ioctl_mixdev(struct inode *inode, struct file *file,
975
                             unsigned int cmd, unsigned long arg)
976
{
977
        return hal2_mixer_ioctl((struct hal2_card *)file->private_data, cmd, arg);
978
}
979
 
980
static int hal2_ioctl(struct inode *inode, struct file *file,
981
                      unsigned int cmd, unsigned long arg)
982
{
983
        int val;
984
        struct hal2_card *hal2 = (struct hal2_card *) file->private_data;
985
 
986
        switch (cmd) {
987
        case OSS_GETVERSION:
988
                return put_user(SOUND_VERSION, (int *)arg);
989
 
990
        case SNDCTL_DSP_SYNC:
991
                if (file->f_mode & FMODE_WRITE)
992
                        return hal2_sync_dac(hal2);
993
                return 0;
994
 
995
        case SNDCTL_DSP_SETDUPLEX:
996
                return 0;
997
 
998
        case SNDCTL_DSP_GETCAPS:
999
                return put_user(DSP_CAP_DUPLEX | DSP_CAP_MULTI, (int *)arg);
1000
 
1001
        case SNDCTL_DSP_RESET:
1002
                if (file->f_mode & FMODE_READ) {
1003
                        hal2_stop_adc(hal2);
1004
                        hal2_reset_adc_pointer(hal2);
1005
                }
1006
                if (file->f_mode & FMODE_WRITE) {
1007
                        hal2_stop_dac(hal2);
1008
                        hal2_reset_dac_pointer(hal2);
1009
                }
1010
                return 0;
1011
 
1012
        case SNDCTL_DSP_SPEED:
1013
                if (get_user(val, (int *)arg))
1014
                        return -EFAULT;
1015
                if (file->f_mode & FMODE_READ) {
1016
                        hal2_stop_adc(hal2);
1017
                        val = hal2_compute_rate(&hal2->adc, val);
1018
                        hal2->adc.sample_rate = val;
1019
                        hal2_set_adc_rate(hal2);
1020
                }
1021
                if (file->f_mode & FMODE_WRITE) {
1022
                        hal2_stop_dac(hal2);
1023
                        val = hal2_compute_rate(&hal2->dac, val);
1024
                        hal2->dac.sample_rate = val;
1025
                        hal2_set_dac_rate(hal2);
1026
                }
1027
                return put_user(val, (int *)arg);
1028
 
1029
        case SNDCTL_DSP_STEREO:
1030
                if (get_user(val, (int *)arg))
1031
                        return -EFAULT;
1032
                if (file->f_mode & FMODE_READ) {
1033
                        hal2_stop_adc(hal2);
1034
                        hal2->adc.voices = (val) ? 2 : 1;
1035
                        hal2_setup_adc(hal2);
1036
                }
1037
                if (file->f_mode & FMODE_WRITE) {
1038
                        hal2_stop_dac(hal2);
1039
                        hal2->dac.voices = (val) ? 2 : 1;
1040
                        hal2_setup_dac(hal2);
1041
                }
1042
                return 0;
1043
 
1044
        case SNDCTL_DSP_CHANNELS:
1045
                if (get_user(val, (int *)arg))
1046
                        return -EFAULT;
1047
                if (val != 0) {
1048
                        if (file->f_mode & FMODE_READ) {
1049
                                hal2_stop_adc(hal2);
1050
                                hal2->adc.voices = (val == 1) ? 1 : 2;
1051
                                hal2_setup_adc(hal2);
1052
                        }
1053
                        if (file->f_mode & FMODE_WRITE) {
1054
                                hal2_stop_dac(hal2);
1055
                                hal2->dac.voices = (val == 1) ? 1 : 2;
1056
                                hal2_setup_dac(hal2);
1057
                        }
1058
                }
1059
                val = -EINVAL;
1060
                if (file->f_mode & FMODE_READ)
1061
                        val = hal2->adc.voices;
1062
                if (file->f_mode & FMODE_WRITE)
1063
                        val = hal2->dac.voices;
1064
                return put_user(val, (int *)arg);
1065
 
1066
        case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1067
                return put_user(H2_SUPPORTED_FORMATS, (int *)arg);
1068
 
1069
        case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1070
                if (get_user(val, (int *)arg))
1071
                        return -EFAULT;
1072
                if (val != AFMT_QUERY) {
1073
                        if (!(val & H2_SUPPORTED_FORMATS))
1074
                                return -EINVAL;
1075
                        if (file->f_mode & FMODE_READ) {
1076
                                hal2_stop_adc(hal2);
1077
                                hal2->adc.format = val;
1078
                                hal2_setup_adc(hal2);
1079
                        }
1080
                        if (file->f_mode & FMODE_WRITE) {
1081
                                hal2_stop_dac(hal2);
1082
                                hal2->dac.format = val;
1083
                                hal2_setup_dac(hal2);
1084
                        }
1085
                } else {
1086
                        val = -EINVAL;
1087
                        if (file->f_mode & FMODE_READ)
1088
                                val = hal2->adc.format;
1089
                        if (file->f_mode & FMODE_WRITE)
1090
                                val = hal2->dac.format;
1091
                }
1092
                return put_user(val, (int *)arg);
1093
 
1094
        case SNDCTL_DSP_POST:
1095
                return 0;
1096
 
1097
        case SNDCTL_DSP_GETOSPACE: {
1098
                audio_buf_info info;
1099
                int i;
1100
                unsigned long flags;
1101
                struct hal2_codec *dac = &hal2->dac;
1102
 
1103
                if (!(file->f_mode & FMODE_WRITE))
1104
                        return -EINVAL;
1105
                info.fragments = 0;
1106
                spin_lock_irqsave(&dac->lock, flags);
1107
                for (i = 0; i < dac->desc_count; i++)
1108
                        if (dac->desc[i].cnt == 0)
1109
                                info.fragments++;
1110
                spin_unlock_irqrestore(&dac->lock, flags);
1111
                info.fragstotal = dac->desc_count;
1112
                info.fragsize = H2_BLOCK_SIZE;
1113
                info.bytes = info.fragsize * info.fragments;
1114
 
1115
                return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
1116
        }
1117
 
1118
        case SNDCTL_DSP_GETISPACE: {
1119
                audio_buf_info info;
1120
                int i;
1121
                unsigned long flags;
1122
                struct hal2_codec *adc = &hal2->adc;
1123
 
1124
                if (!(file->f_mode & FMODE_READ))
1125
                        return -EINVAL;
1126
                info.fragments = 0;
1127
                info.bytes = 0;
1128
                spin_lock_irqsave(&adc->lock, flags);
1129
                for (i = 0; i < adc->desc_count; i++)
1130
                        if (adc->desc[i].cnt > 0) {
1131
                                info.fragments++;
1132
                                info.bytes += adc->desc[i].cnt;
1133
                        }
1134
                spin_unlock_irqrestore(&adc->lock, flags);
1135
                info.fragstotal = adc->desc_count;
1136
                info.fragsize = H2_BLOCK_SIZE;
1137
 
1138
                return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0;
1139
        }
1140
 
1141
        case SNDCTL_DSP_NONBLOCK:
1142
                file->f_flags |= O_NONBLOCK;
1143
                return 0;
1144
 
1145
        case SNDCTL_DSP_GETBLKSIZE:
1146
                return put_user(H2_BLOCK_SIZE, (int *)arg);
1147
 
1148
        case SNDCTL_DSP_SETFRAGMENT:
1149
                return 0;
1150
 
1151
        case SOUND_PCM_READ_RATE:
1152
                val = -EINVAL;
1153
                if (file->f_mode & FMODE_READ)
1154
                        val = hal2->adc.sample_rate;
1155
                if (file->f_mode & FMODE_WRITE)
1156
                        val = hal2->dac.sample_rate;
1157
                return put_user(val, (int *)arg);
1158
 
1159
        case SOUND_PCM_READ_CHANNELS:
1160
                val = -EINVAL;
1161
                if (file->f_mode & FMODE_READ)
1162
                        val = hal2->adc.voices;
1163
                if (file->f_mode & FMODE_WRITE)
1164
                        val = hal2->dac.voices;
1165
                return put_user(val, (int *)arg);
1166
 
1167
        case SOUND_PCM_READ_BITS:
1168
                return put_user(16, (int *)arg);
1169
        }
1170
 
1171
        return hal2_mixer_ioctl(hal2, cmd, arg);
1172
}
1173
 
1174
static ssize_t hal2_read(struct file *file, char *buffer,
1175
                         size_t count, loff_t *ppos)
1176
{
1177
        ssize_t err;
1178
        struct hal2_card *hal2 = (struct hal2_card *) file->private_data;
1179
        struct hal2_codec *adc = &hal2->adc;
1180
 
1181
        if (!count)
1182
                return 0;
1183
        if (mutex_lock_interruptible(&adc->sem))
1184
                return -EINTR;
1185
        if (file->f_flags & O_NONBLOCK) {
1186
                err = hal2_get_buffer(hal2, buffer, count);
1187
                err = err == 0 ? -EAGAIN : err;
1188
        } else {
1189
                do {
1190
                        /* ~10% longer */
1191
                        signed long timeout = 1000 * H2_BLOCK_SIZE *
1192
                                2 * adc->voices * HZ / adc->sample_rate / 900;
1193
                        unsigned long flags;
1194
                        DECLARE_WAITQUEUE(wait, current);
1195
                        ssize_t cnt = 0;
1196
 
1197
                        err = hal2_get_buffer(hal2, buffer, count);
1198
                        if (err > 0) {
1199
                                count -= err;
1200
                                cnt += err;
1201
                                buffer += err;
1202
                                err = cnt;
1203
                        }
1204
                        if (count > 0 && err >= 0) {
1205
                                add_wait_queue(&adc->dma_wait, &wait);
1206
                                set_current_state(TASK_INTERRUPTIBLE);
1207
                                schedule_timeout(timeout);
1208
                                spin_lock_irqsave(&adc->lock, flags);
1209
                                if (!adc->desc[adc->tail].cnt)
1210
                                        err = -EAGAIN;
1211
                                spin_unlock_irqrestore(&adc->lock, flags);
1212
                                if (signal_pending(current))
1213
                                        err = -ERESTARTSYS;
1214
                                remove_wait_queue(&adc->dma_wait, &wait);
1215
                                if (err < 0) {
1216
                                        hal2_stop_adc(hal2);
1217
                                        hal2_reset_adc_pointer(hal2);
1218
                                }
1219
                        }
1220
                } while (count > 0 && err >= 0);
1221
        }
1222
        mutex_unlock(&adc->sem);
1223
 
1224
        return err;
1225
}
1226
 
1227
static ssize_t hal2_write(struct file *file, const char *buffer,
1228
                          size_t count, loff_t *ppos)
1229
{
1230
        ssize_t err;
1231
        char *buf = (char*) buffer;
1232
        struct hal2_card *hal2 = (struct hal2_card *) file->private_data;
1233
        struct hal2_codec *dac = &hal2->dac;
1234
 
1235
        if (!count)
1236
                return 0;
1237
        if (mutex_lock_interruptible(&dac->sem))
1238
                return -EINTR;
1239
        if (file->f_flags & O_NONBLOCK) {
1240
                err = hal2_add_buffer(hal2, buf, count);
1241
                err = err == 0 ? -EAGAIN : err;
1242
        } else {
1243
                do {
1244
                        /* ~10% longer */
1245
                        signed long timeout = 1000 * H2_BLOCK_SIZE *
1246
                                2 * dac->voices * HZ / dac->sample_rate / 900;
1247
                        unsigned long flags;
1248
                        DECLARE_WAITQUEUE(wait, current);
1249
                        ssize_t cnt = 0;
1250
 
1251
                        err = hal2_add_buffer(hal2, buf, count);
1252
                        if (err > 0) {
1253
                                count -= err;
1254
                                cnt += err;
1255
                                buf += err;
1256
                                err = cnt;
1257
                        }
1258
                        if (count > 0 && err >= 0) {
1259
                                add_wait_queue(&dac->dma_wait, &wait);
1260
                                set_current_state(TASK_INTERRUPTIBLE);
1261
                                schedule_timeout(timeout);
1262
                                spin_lock_irqsave(&dac->lock, flags);
1263
                                if (dac->desc[dac->head].cnt)
1264
                                        err = -EAGAIN;
1265
                                spin_unlock_irqrestore(&dac->lock, flags);
1266
                                if (signal_pending(current))
1267
                                        err = -ERESTARTSYS;
1268
                                remove_wait_queue(&dac->dma_wait, &wait);
1269
                                if (err < 0) {
1270
                                        hal2_stop_dac(hal2);
1271
                                        hal2_reset_dac_pointer(hal2);
1272
                                }
1273
                        }
1274
                } while (count > 0 && err >= 0);
1275
        }
1276
        mutex_unlock(&dac->sem);
1277
 
1278
        return err;
1279
}
1280
 
1281
static unsigned int hal2_poll(struct file *file, struct poll_table_struct *wait)
1282
{
1283
        unsigned long flags;
1284
        unsigned int mask = 0;
1285
        struct hal2_card *hal2 = (struct hal2_card *) file->private_data;
1286
 
1287
        if (file->f_mode & FMODE_READ) {
1288
                struct hal2_codec *adc = &hal2->adc;
1289
 
1290
                poll_wait(file, &adc->dma_wait, wait);
1291
                spin_lock_irqsave(&adc->lock, flags);
1292
                if (adc->desc[adc->tail].cnt > 0)
1293
                        mask |= POLLIN;
1294
                spin_unlock_irqrestore(&adc->lock, flags);
1295
        }
1296
 
1297
        if (file->f_mode & FMODE_WRITE) {
1298
                struct hal2_codec *dac = &hal2->dac;
1299
 
1300
                poll_wait(file, &dac->dma_wait, wait);
1301
                spin_lock_irqsave(&dac->lock, flags);
1302
                if (dac->desc[dac->head].cnt == 0)
1303
                        mask |= POLLOUT;
1304
                spin_unlock_irqrestore(&dac->lock, flags);
1305
        }
1306
 
1307
        return mask;
1308
}
1309
 
1310
static int hal2_open(struct inode *inode, struct file *file)
1311
{
1312
        int err;
1313
        struct hal2_card *hal2 = hal2_dsp_find_card(iminor(inode));
1314
 
1315
        if (!hal2)
1316
                return -ENODEV;
1317
        file->private_data = hal2;
1318
        if (file->f_mode & FMODE_READ) {
1319
                struct hal2_codec *adc = &hal2->adc;
1320
 
1321
                if (adc->usecount)
1322
                        return -EBUSY;
1323
                /* OSS spec wanted us to use 8 bit, 8 kHz mono by default,
1324
                 * but HAL2 can't do 8bit audio */
1325
                adc->format = AFMT_S16_BE;
1326
                adc->voices = 1;
1327
                adc->sample_rate = hal2_compute_rate(adc, 8000);
1328
                hal2_set_adc_rate(hal2);
1329
                err = hal2_alloc_adc_dmabuf(adc);
1330
                if (err)
1331
                        return err;
1332
                hal2_setup_adc(hal2);
1333
                adc->usecount++;
1334
        }
1335
        if (file->f_mode & FMODE_WRITE) {
1336
                struct hal2_codec *dac = &hal2->dac;
1337
 
1338
                if (dac->usecount)
1339
                        return -EBUSY;
1340
                dac->format = AFMT_S16_BE;
1341
                dac->voices = 1;
1342
                dac->sample_rate = hal2_compute_rate(dac, 8000);
1343
                hal2_set_dac_rate(hal2);
1344
                err = hal2_alloc_dac_dmabuf(dac);
1345
                if (err)
1346
                        return err;
1347
                hal2_setup_dac(hal2);
1348
                dac->usecount++;
1349
        }
1350
 
1351
        return nonseekable_open(inode, file);
1352
}
1353
 
1354
static int hal2_release(struct inode *inode, struct file *file)
1355
{
1356
        struct hal2_card *hal2 = (struct hal2_card *) file->private_data;
1357
 
1358
        if (file->f_mode & FMODE_READ) {
1359
                struct hal2_codec *adc = &hal2->adc;
1360
 
1361
                mutex_lock(&adc->sem);
1362
                hal2_stop_adc(hal2);
1363
                hal2_free_adc_dmabuf(adc);
1364
                adc->usecount--;
1365
                mutex_unlock(&adc->sem);
1366
        }
1367
        if (file->f_mode & FMODE_WRITE) {
1368
                struct hal2_codec *dac = &hal2->dac;
1369
 
1370
                mutex_lock(&dac->sem);
1371
                hal2_sync_dac(hal2);
1372
                hal2_free_dac_dmabuf(dac);
1373
                dac->usecount--;
1374
                mutex_unlock(&dac->sem);
1375
        }
1376
 
1377
        return 0;
1378
}
1379
 
1380
static const struct file_operations hal2_audio_fops = {
1381
        .owner          = THIS_MODULE,
1382
        .llseek         = no_llseek,
1383
        .read           = hal2_read,
1384
        .write          = hal2_write,
1385
        .poll           = hal2_poll,
1386
        .ioctl          = hal2_ioctl,
1387
        .open           = hal2_open,
1388
        .release        = hal2_release,
1389
};
1390
 
1391
static const struct file_operations hal2_mixer_fops = {
1392
        .owner          = THIS_MODULE,
1393
        .llseek         = no_llseek,
1394
        .ioctl          = hal2_ioctl_mixdev,
1395
        .open           = hal2_open_mixdev,
1396
        .release        = hal2_release_mixdev,
1397
};
1398
 
1399
static void hal2_init_codec(struct hal2_codec *codec, struct hpc3_regs *hpc3,
1400
                            int index)
1401
{
1402
        codec->pbus.pbusnr = index;
1403
        codec->pbus.pbus = &hpc3->pbdma[index];
1404
        init_waitqueue_head(&codec->dma_wait);
1405
        mutex_init(&codec->sem);
1406
        spin_lock_init(&codec->lock);
1407
}
1408
 
1409
static int hal2_detect(struct hal2_card *hal2)
1410
{
1411
        unsigned short board, major, minor;
1412
        unsigned short rev;
1413
 
1414
        /* reset HAL2 */
1415
        hal2_isr_write(hal2, 0);
1416
        /* release reset */
1417
        hal2_isr_write(hal2, H2_ISR_GLOBAL_RESET_N | H2_ISR_CODEC_RESET_N);
1418
 
1419
        hal2_i_write16(hal2, H2I_RELAY_C, H2I_RELAY_C_STATE);
1420
        if ((rev = hal2_rev_look(hal2)) & H2_REV_AUDIO_PRESENT)
1421
                return -ENODEV;
1422
 
1423
        board = (rev & H2_REV_BOARD_M) >> 12;
1424
        major = (rev & H2_REV_MAJOR_CHIP_M) >> 4;
1425
        minor = (rev & H2_REV_MINOR_CHIP_M);
1426
 
1427
        printk(KERN_INFO "SGI HAL2 revision %i.%i.%i\n",
1428
               board, major, minor);
1429
 
1430
        return 0;
1431
}
1432
 
1433
static int hal2_init_card(struct hal2_card **phal2, struct hpc3_regs *hpc3)
1434
{
1435
        int ret = 0;
1436
        struct hal2_card *hal2;
1437
 
1438
        hal2 = kzalloc(sizeof(struct hal2_card), GFP_KERNEL);
1439
        if (!hal2)
1440
                return -ENOMEM;
1441
 
1442
        hal2->ctl_regs = (struct hal2_ctl_regs *)hpc3->pbus_extregs[0];
1443
        hal2->aes_regs = (struct hal2_aes_regs *)hpc3->pbus_extregs[1];
1444
        hal2->vol_regs = (struct hal2_vol_regs *)hpc3->pbus_extregs[2];
1445
        hal2->syn_regs = (struct hal2_syn_regs *)hpc3->pbus_extregs[3];
1446
 
1447
        if (hal2_detect(hal2) < 0) {
1448
                ret = -ENODEV;
1449
                goto free_card;
1450
        }
1451
 
1452
        hal2_init_codec(&hal2->dac, hpc3, 0);
1453
        hal2_init_codec(&hal2->adc, hpc3, 1);
1454
 
1455
        /*
1456
         * All DMA channel interfaces in HAL2 are designed to operate with
1457
         * PBUS programmed for 2 cycles in D3, 2 cycles in D4 and 2 cycles
1458
         * in D5. HAL2 is a 16-bit device which can accept both big and little
1459
         * endian format. It assumes that even address bytes are on high
1460
         * portion of PBUS (15:8) and assumes that HPC3 is programmed to
1461
         * accept a live (unsynchronized) version of P_DREQ_N from HAL2.
1462
         */
1463
#define HAL2_PBUS_DMACFG ((0 << HPC3_DMACFG_D3R_SHIFT) | \
1464
                          (2 << HPC3_DMACFG_D4R_SHIFT) | \
1465
                          (2 << HPC3_DMACFG_D5R_SHIFT) | \
1466
                          (0 << HPC3_DMACFG_D3W_SHIFT) | \
1467
                          (2 << HPC3_DMACFG_D4W_SHIFT) | \
1468
                          (2 << HPC3_DMACFG_D5W_SHIFT) | \
1469
                                HPC3_DMACFG_DS16 | \
1470
                                HPC3_DMACFG_EVENHI | \
1471
                                HPC3_DMACFG_RTIME | \
1472
                          (8 << HPC3_DMACFG_BURST_SHIFT) | \
1473
                                HPC3_DMACFG_DRQLIVE)
1474
        /*
1475
         * Ignore what's mentioned in the specification and write value which
1476
         * works in The Real World (TM)
1477
         */
1478
        hpc3->pbus_dmacfg[hal2->dac.pbus.pbusnr][0] = 0x8208844;
1479
        hpc3->pbus_dmacfg[hal2->adc.pbus.pbusnr][0] = 0x8208844;
1480
 
1481
        if (request_irq(SGI_HPCDMA_IRQ, hal2_interrupt, IRQF_SHARED,
1482
                        hal2str, hal2)) {
1483
                printk(KERN_ERR "HAL2: Can't get irq %d\n", SGI_HPCDMA_IRQ);
1484
                ret = -EAGAIN;
1485
                goto free_card;
1486
        }
1487
 
1488
        hal2->dev_dsp = register_sound_dsp(&hal2_audio_fops, -1);
1489
        if (hal2->dev_dsp < 0) {
1490
                ret = hal2->dev_dsp;
1491
                goto free_irq;
1492
        }
1493
 
1494
        hal2->dev_mixer = register_sound_mixer(&hal2_mixer_fops, -1);
1495
        if (hal2->dev_mixer < 0) {
1496
                ret = hal2->dev_mixer;
1497
                goto unregister_dsp;
1498
        }
1499
 
1500
        hal2_init_mixer(hal2);
1501
 
1502
        *phal2 = hal2;
1503
        return 0;
1504
unregister_dsp:
1505
        unregister_sound_dsp(hal2->dev_dsp);
1506
free_irq:
1507
        free_irq(SGI_HPCDMA_IRQ, hal2);
1508
free_card:
1509
        kfree(hal2);
1510
 
1511
        return ret;
1512
}
1513
 
1514
extern void (*indy_volume_button)(int);
1515
 
1516
/*
1517
 * Assuming only one HAL2 card. Mail me if you ever meet machine with
1518
 * more than one.
1519
 */
1520
static int __init init_hal2(void)
1521
{
1522
        int i, error;
1523
 
1524
        for (i = 0; i < MAXCARDS; i++)
1525
                hal2_card[i] = NULL;
1526
 
1527
        error = hal2_init_card(&hal2_card[0], hpc3c0);
1528
 
1529
        /* let Indy's volume buttons work */
1530
        if (!error && !ip22_is_fullhouse())
1531
                indy_volume_button = hal2_volume_control;
1532
 
1533
        return error;
1534
 
1535
}
1536
 
1537
static void __exit exit_hal2(void)
1538
{
1539
        int i;
1540
 
1541
        /* unregister volume butons callback function */
1542
        indy_volume_button = NULL;
1543
 
1544
        for (i = 0; i < MAXCARDS; i++)
1545
                if (hal2_card[i]) {
1546
                        free_irq(SGI_HPCDMA_IRQ, hal2_card[i]);
1547
                        unregister_sound_dsp(hal2_card[i]->dev_dsp);
1548
                        unregister_sound_mixer(hal2_card[i]->dev_mixer);
1549
                        kfree(hal2_card[i]);
1550
        }
1551
}
1552
 
1553
module_init(init_hal2);
1554
module_exit(exit_hal2);
1555
 
1556
MODULE_DESCRIPTION("OSS compatible driver for SGI HAL2 audio");
1557
MODULE_AUTHOR("Ladislav Michl");
1558
MODULE_LICENSE("GPL");

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