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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [linux-2.6/] [linux-2.6.24/] [sound/] [pci/] [rme32.c] - Blame information for rev 17

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1 3 xianfeng 
/*
2 
 *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
3 
 *
4 
 *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
5 
 *                              Pilo Chambert <pilo.c@wanadoo.fr>
6 
 *
7 
 *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
8 
 *                         Henk Hesselink <henk@anda.nl>
9 
 *                         for writing the digi96-driver
10 
 *                         and RME for all informations.
11 
 *
12 
 *   This program is free software; you can redistribute it and/or modify
13 
 *   it under the terms of the GNU General Public License as published by
14 
 *   the Free Software Foundation; either version 2 of the License, or
15 
 *   (at your option) any later version.
16 
 *
17 
 *   This program is distributed in the hope that it will be useful,
18 
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
19 
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 
 *   GNU General Public License for more details.
21 
 *
22 
 *   You should have received a copy of the GNU General Public License
23 
 *   along with this program; if not, write to the Free Software
24 
 *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 
 *
26 
 *
27 
 * ****************************************************************************
28 
 *
29 
 * Note #1 "Sek'd models" ................................... martin 2002-12-07
30 
 *
31 
 * Identical soundcards by Sek'd were labeled:
32 
 * RME Digi 32     = Sek'd Prodif 32
33 
 * RME Digi 32 Pro = Sek'd Prodif 96
34 
 * RME Digi 32/8   = Sek'd Prodif Gold
35 
 *
36 
 * ****************************************************************************
37 
 *
38 
 * Note #2 "full duplex mode" ............................... martin 2002-12-07
39 
 *
40 
 * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
41 
 * in this mode. Rec data and play data are using the same buffer therefore. At
42 
 * first you have got the playing bits in the buffer and then (after playing
43 
 * them) they were overwitten by the captured sound of the CS8412/14. Both
44 
 * modes (play/record) are running harmonically hand in hand in the same buffer
45 
 * and you have only one start bit plus one interrupt bit to control this
46 
 * paired action.
47 
 * This is opposite to the latter rme96 where playing and capturing is totally
48 
 * separated and so their full duplex mode is supported by alsa (using two
49 
 * start bits and two interrupts for two different buffers).
50 
 * But due to the wrong sequence of playing and capturing ALSA shows no solved
51 
 * full duplex support for the rme32 at the moment. That's bad, but I'm not
52 
 * able to solve it. Are you motivated enough to solve this problem now? Your
53 
 * patch would be welcome!
54 
 *
55 
 * ****************************************************************************
56 
 *
57 
 * "The story after the long seeking" -- tiwai
58 
 *
59 
 * Ok, the situation regarding the full duplex is now improved a bit.
60 
 * In the fullduplex mode (given by the module parameter), the hardware buffer
61 
 * is split to halves for read and write directions at the DMA pointer.
62 
 * That is, the half above the current DMA pointer is used for write, and
63 
 * the half below is used for read.  To mangle this strange behavior, an
64 
 * software intermediate buffer is introduced.  This is, of course, not good
65 
 * from the viewpoint of the data transfer efficiency.  However, this allows
66 
 * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
67 
 *
68 
 * ****************************************************************************
69 
 */
70 
 
71 
 
72 
#include <sound/driver.h>
73 
#include <linux/delay.h>
74 
#include <linux/init.h>
75 
#include <linux/interrupt.h>
76 
#include <linux/pci.h>
77 
#include <linux/slab.h>
78 
#include <linux/moduleparam.h>
79 
 
80 
#include <sound/core.h>
81 
#include <sound/info.h>
82 
#include <sound/control.h>
83 
#include <sound/pcm.h>
84 
#include <sound/pcm_params.h>
85 
#include <sound/pcm-indirect.h>
86 
#include <sound/asoundef.h>
87 
#include <sound/initval.h>
88 
 
89 
#include <asm/io.h>
90 
 
91 
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
92 
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
93 
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
94 
static int fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
95 
 
96 
module_param_array(index, int, NULL, 0444);
97 
MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
98 
module_param_array(id, charp, NULL, 0444);
99 
MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
100 
module_param_array(enable, bool, NULL, 0444);
101 
MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
102 
module_param_array(fullduplex, bool, NULL, 0444);
103 
MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
104 
MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
105 
MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
106 
MODULE_LICENSE("GPL");
107 
MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
108 
 
109 
/* Defines for RME Digi32 series */
110 
#define RME32_SPDIF_NCHANNELS 2
111 
 
112 
/* Playback and capture buffer size */
113 
#define RME32_BUFFER_SIZE 0x20000
114 
 
115 
/* IO area size */
116 
#define RME32_IO_SIZE 0x30000
117 
 
118 
/* IO area offsets */
119 
#define RME32_IO_DATA_BUFFER        0x0
120 
#define RME32_IO_CONTROL_REGISTER   0x20000
121 
#define RME32_IO_GET_POS            0x20000
122 
#define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
123 
#define RME32_IO_RESET_POS          0x20100
124 
 
125 
/* Write control register bits */
126 
#define RME32_WCR_START     (1 << 0)    /* startbit */
127 
#define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
128 
                                           Setting the whole card to mono
129 
                                           doesn't seem to be very useful.
130 
                                           A software-solution can handle
131 
                                           full-duplex with one direction in
132 
                                           stereo and the other way in mono.
133 
                                           So, the hardware should work all
134 
                                           the time in stereo! */
135 
#define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
136 
#define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
137 
#define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
138 
#define RME32_WCR_FREQ_1    (1 << 5)
139 
#define RME32_WCR_INP_0     (1 << 6)    /* input switch */
140 
#define RME32_WCR_INP_1     (1 << 7)
141 
#define RME32_WCR_RESET     (1 << 8)    /* Reset address */
142 
#define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
143 
#define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
144 
#define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
145 
#define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
146 
#define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
147 
#define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
148 
#define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
149 
 
150 
#define RME32_WCR_BITPOS_FREQ_0 4
151 
#define RME32_WCR_BITPOS_FREQ_1 5
152 
#define RME32_WCR_BITPOS_INP_0 6
153 
#define RME32_WCR_BITPOS_INP_1 7
154 
 
155 
/* Read control register bits */
156 
#define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
157 
#define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
158 
#define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
159 
#define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
160 
#define RME32_RCR_FREQ_1    (1 << 28)
161 
#define RME32_RCR_FREQ_2    (1 << 29)
162 
#define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
163 
#define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
164 
 
165 
#define RME32_RCR_BITPOS_F0 27
166 
#define RME32_RCR_BITPOS_F1 28
167 
#define RME32_RCR_BITPOS_F2 29
168 
 
169 
/* Input types */
170 
#define RME32_INPUT_OPTICAL 0
171 
#define RME32_INPUT_COAXIAL 1
172 
#define RME32_INPUT_INTERNAL 2
173 
#define RME32_INPUT_XLR 3
174 
 
175 
/* Clock modes */
176 
#define RME32_CLOCKMODE_SLAVE 0
177 
#define RME32_CLOCKMODE_MASTER_32 1
178 
#define RME32_CLOCKMODE_MASTER_44 2
179 
#define RME32_CLOCKMODE_MASTER_48 3
180 
 
181 
/* Block sizes in bytes */
182 
#define RME32_BLOCK_SIZE 8192
183 
 
184 
/* Software intermediate buffer (max) size */
185 
#define RME32_MID_BUFFER_SIZE (1024*1024)
186 
 
187 
/* Hardware revisions */
188 
#define RME32_32_REVISION 192
189 
#define RME32_328_REVISION_OLD 100
190 
#define RME32_328_REVISION_NEW 101
191 
#define RME32_PRO_REVISION_WITH_8412 192
192 
#define RME32_PRO_REVISION_WITH_8414 150
193 
 
194 
 
195 
struct rme32 {
196 
        spinlock_t lock;
197 
        int irq;
198 
        unsigned long port;
199 
        void __iomem *iobase;
200 
 
201 
        u32 wcreg;              /* cached write control register value */
202 
        u32 wcreg_spdif;        /* S/PDIF setup */
203 
        u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
204 
        u32 rcreg;              /* cached read control register value */
205 
 
206 
        u8 rev;                 /* card revision number */
207 
 
208 
        struct snd_pcm_substream *playback_substream;
209 
        struct snd_pcm_substream *capture_substream;
210 
 
211 
        int playback_frlog;     /* log2 of framesize */
212 
        int capture_frlog;
213 
 
214 
        size_t playback_periodsize;     /* in bytes, zero if not used */
215 
        size_t capture_periodsize;      /* in bytes, zero if not used */
216 
 
217 
        unsigned int fullduplex_mode;
218 
        int running;
219 
 
220 
        struct snd_pcm_indirect playback_pcm;
221 
        struct snd_pcm_indirect capture_pcm;
222 
 
223 
        struct snd_card *card;
224 
        struct snd_pcm *spdif_pcm;
225 
        struct snd_pcm *adat_pcm;
226 
        struct pci_dev *pci;
227 
        struct snd_kcontrol *spdif_ctl;
228 
};
229 
 
230 
static struct pci_device_id snd_rme32_ids[] = {
231 
        {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32,
232 
         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
233 
        {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8,
234 
         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
235 
        {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO,
236 
         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
237 
        {0,}
238 
};
239 
 
240 
MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
241 
 
242 
#define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
243 
#define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
244 
 
245 
static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
246 
 
247 
static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
248 
 
249 
static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
250 
 
251 
static void snd_rme32_proc_init(struct rme32 * rme32);
252 
 
253 
static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
254 
 
255 
static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
256 
{
257 
        return (readl(rme32->iobase + RME32_IO_GET_POS)
258 
                & RME32_RCR_AUDIO_ADDR_MASK);
259 
}
260 
 
261 
/* silence callback for halfduplex mode */
262 
static int snd_rme32_playback_silence(struct snd_pcm_substream *substream, int channel, /* not used (interleaved data) */
263 
                                      snd_pcm_uframes_t pos,
264 
                                      snd_pcm_uframes_t count)
265 
{
266 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
267 
        count <<= rme32->playback_frlog;
268 
        pos <<= rme32->playback_frlog;
269 
        memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
270 
        return 0;
271 
}
272 
 
273 
/* copy callback for halfduplex mode */
274 
static int snd_rme32_playback_copy(struct snd_pcm_substream *substream, int channel,    /* not used (interleaved data) */
275 
                                   snd_pcm_uframes_t pos,
276 
                                   void __user *src, snd_pcm_uframes_t count)
277 
{
278 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
279 
        count <<= rme32->playback_frlog;
280 
        pos <<= rme32->playback_frlog;
281 
        if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
282 
                            src, count))
283 
                return -EFAULT;
284 
        return 0;
285 
}
286 
 
287 
/* copy callback for halfduplex mode */
288 
static int snd_rme32_capture_copy(struct snd_pcm_substream *substream, int channel,     /* not used (interleaved data) */
289 
                                  snd_pcm_uframes_t pos,
290 
                                  void __user *dst, snd_pcm_uframes_t count)
291 
{
292 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
293 
        count <<= rme32->capture_frlog;
294 
        pos <<= rme32->capture_frlog;
295 
        if (copy_to_user_fromio(dst,
296 
                            rme32->iobase + RME32_IO_DATA_BUFFER + pos,
297 
                            count))
298 
                return -EFAULT;
299 
        return 0;
300 
}
301 
 
302 
/*
303 
 * SPDIF I/O capabilities (half-duplex mode)
304 
 */
305 
static struct snd_pcm_hardware snd_rme32_spdif_info = {
306 
        .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
307 
                         SNDRV_PCM_INFO_MMAP_VALID |
308 
                         SNDRV_PCM_INFO_INTERLEAVED |
309 
                         SNDRV_PCM_INFO_PAUSE |
310 
                         SNDRV_PCM_INFO_SYNC_START),
311 
        .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
312 
                         SNDRV_PCM_FMTBIT_S32_LE),
313 
        .rates =        (SNDRV_PCM_RATE_32000 |
314 
                         SNDRV_PCM_RATE_44100 |
315 
                         SNDRV_PCM_RATE_48000),
316 
        .rate_min =     32000,
317 
        .rate_max =     48000,
318 
        .channels_min = 2,
319 
        .channels_max = 2,
320 
        .buffer_bytes_max = RME32_BUFFER_SIZE,
321 
        .period_bytes_min = RME32_BLOCK_SIZE,
322 
        .period_bytes_max = RME32_BLOCK_SIZE,
323 
        .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
324 
        .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
325 
        .fifo_size =    0,
326 
};
327 
 
328 
/*
329 
 * ADAT I/O capabilities (half-duplex mode)
330 
 */
331 
static struct snd_pcm_hardware snd_rme32_adat_info =
332 
{
333 
        .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
334 
                              SNDRV_PCM_INFO_MMAP_VALID |
335 
                              SNDRV_PCM_INFO_INTERLEAVED |
336 
                              SNDRV_PCM_INFO_PAUSE |
337 
                              SNDRV_PCM_INFO_SYNC_START),
338 
        .formats=            SNDRV_PCM_FMTBIT_S16_LE,
339 
        .rates =             (SNDRV_PCM_RATE_44100 |
340 
                              SNDRV_PCM_RATE_48000),
341 
        .rate_min =          44100,
342 
        .rate_max =          48000,
343 
        .channels_min =      8,
344 
        .channels_max =      8,
345 
        .buffer_bytes_max =  RME32_BUFFER_SIZE,
346 
        .period_bytes_min =  RME32_BLOCK_SIZE,
347 
        .period_bytes_max =  RME32_BLOCK_SIZE,
348 
        .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
349 
        .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
350 
        .fifo_size =        0,
351 
};
352 
 
353 
/*
354 
 * SPDIF I/O capabilities (full-duplex mode)
355 
 */
356 
static struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
357 
        .info =         (SNDRV_PCM_INFO_MMAP |
358 
                         SNDRV_PCM_INFO_MMAP_VALID |
359 
                         SNDRV_PCM_INFO_INTERLEAVED |
360 
                         SNDRV_PCM_INFO_PAUSE |
361 
                         SNDRV_PCM_INFO_SYNC_START),
362 
        .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
363 
                         SNDRV_PCM_FMTBIT_S32_LE),
364 
        .rates =        (SNDRV_PCM_RATE_32000 |
365 
                         SNDRV_PCM_RATE_44100 |
366 
                         SNDRV_PCM_RATE_48000),
367 
        .rate_min =     32000,
368 
        .rate_max =     48000,
369 
        .channels_min = 2,
370 
        .channels_max = 2,
371 
        .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
372 
        .period_bytes_min = RME32_BLOCK_SIZE,
373 
        .period_bytes_max = RME32_BLOCK_SIZE,
374 
        .periods_min =  2,
375 
        .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
376 
        .fifo_size =    0,
377 
};
378 
 
379 
/*
380 
 * ADAT I/O capabilities (full-duplex mode)
381 
 */
382 
static struct snd_pcm_hardware snd_rme32_adat_fd_info =
383 
{
384 
        .info =              (SNDRV_PCM_INFO_MMAP |
385 
                              SNDRV_PCM_INFO_MMAP_VALID |
386 
                              SNDRV_PCM_INFO_INTERLEAVED |
387 
                              SNDRV_PCM_INFO_PAUSE |
388 
                              SNDRV_PCM_INFO_SYNC_START),
389 
        .formats=            SNDRV_PCM_FMTBIT_S16_LE,
390 
        .rates =             (SNDRV_PCM_RATE_44100 |
391 
                              SNDRV_PCM_RATE_48000),
392 
        .rate_min =          44100,
393 
        .rate_max =          48000,
394 
        .channels_min =      8,
395 
        .channels_max =      8,
396 
        .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
397 
        .period_bytes_min =  RME32_BLOCK_SIZE,
398 
        .period_bytes_max =  RME32_BLOCK_SIZE,
399 
        .periods_min =      2,
400 
        .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
401 
        .fifo_size =        0,
402 
};
403 
 
404 
static void snd_rme32_reset_dac(struct rme32 *rme32)
405 
{
406 
        writel(rme32->wcreg | RME32_WCR_PD,
407 
               rme32->iobase + RME32_IO_CONTROL_REGISTER);
408 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
409 
}
410 
 
411 
static int snd_rme32_playback_getrate(struct rme32 * rme32)
412 
{
413 
        int rate;
414 
 
415 
        rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
416 
               (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
417 
        switch (rate) {
418 
        case 1:
419 
                rate = 32000;
420 
                break;
421 
        case 2:
422 
                rate = 44100;
423 
                break;
424 
        case 3:
425 
                rate = 48000;
426 
                break;
427 
        default:
428 
                return -1;
429 
        }
430 
        return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
431 
}
432 
 
433 
static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
434 
{
435 
        int n;
436 
 
437 
        *is_adat = 0;
438 
        if (rme32->rcreg & RME32_RCR_LOCK) {
439 
                /* ADAT rate */
440 
                *is_adat = 1;
441 
        }
442 
        if (rme32->rcreg & RME32_RCR_ERF) {
443 
                return -1;
444 
        }
445 
 
446 
        /* S/PDIF rate */
447 
        n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
448 
                (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
449 
                (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
450 
 
451 
        if (RME32_PRO_WITH_8414(rme32))
452 
                switch (n) {    /* supporting the CS8414 */
453 
                case 0:
454 
                case 1:
455 
                case 2:
456 
                        return -1;
457 
                case 3:
458 
                        return 96000;
459 
                case 4:
460 
                        return 88200;
461 
                case 5:
462 
                        return 48000;
463 
                case 6:
464 
                        return 44100;
465 
                case 7:
466 
                        return 32000;
467 
                default:
468 
                        return -1;
469 
                        break;
470 
                }
471 
        else
472 
                switch (n) {    /* supporting the CS8412 */
473 
                case 0:
474 
                        return -1;
475 
                case 1:
476 
                        return 48000;
477 
                case 2:
478 
                        return 44100;
479 
                case 3:
480 
                        return 32000;
481 
                case 4:
482 
                        return 48000;
483 
                case 5:
484 
                        return 44100;
485 
                case 6:
486 
                        return 44056;
487 
                case 7:
488 
                        return 32000;
489 
                default:
490 
                        break;
491 
                }
492 
        return -1;
493 
}
494 
 
495 
static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
496 
{
497 
        int ds;
498 
 
499 
        ds = rme32->wcreg & RME32_WCR_DS_BM;
500 
        switch (rate) {
501 
        case 32000:
502 
                rme32->wcreg &= ~RME32_WCR_DS_BM;
503 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
504 
                        ~RME32_WCR_FREQ_1;
505 
                break;
506 
        case 44100:
507 
                rme32->wcreg &= ~RME32_WCR_DS_BM;
508 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
509 
                        ~RME32_WCR_FREQ_0;
510 
                break;
511 
        case 48000:
512 
                rme32->wcreg &= ~RME32_WCR_DS_BM;
513 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
514 
                        RME32_WCR_FREQ_1;
515 
                break;
516 
        case 64000:
517 
                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
518 
                        return -EINVAL;
519 
                rme32->wcreg |= RME32_WCR_DS_BM;
520 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
521 
                        ~RME32_WCR_FREQ_1;
522 
                break;
523 
        case 88200:
524 
                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
525 
                        return -EINVAL;
526 
                rme32->wcreg |= RME32_WCR_DS_BM;
527 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
528 
                        ~RME32_WCR_FREQ_0;
529 
                break;
530 
        case 96000:
531 
                if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
532 
                        return -EINVAL;
533 
                rme32->wcreg |= RME32_WCR_DS_BM;
534 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
535 
                        RME32_WCR_FREQ_1;
536 
                break;
537 
        default:
538 
                return -EINVAL;
539 
        }
540 
        if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
541 
            (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
542 
        {
543 
                /* change to/from double-speed: reset the DAC (if available) */
544 
                snd_rme32_reset_dac(rme32);
545 
        } else {
546 
                writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
547 
        }
548 
        return 0;
549 
}
550 
 
551 
static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
552 
{
553 
        switch (mode) {
554 
        case RME32_CLOCKMODE_SLAVE:
555 
                /* AutoSync */
556 
                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
557 
                        ~RME32_WCR_FREQ_1;
558 
                break;
559 
        case RME32_CLOCKMODE_MASTER_32:
560 
                /* Internal 32.0kHz */
561 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
562 
                        ~RME32_WCR_FREQ_1;
563 
                break;
564 
        case RME32_CLOCKMODE_MASTER_44:
565 
                /* Internal 44.1kHz */
566 
                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
567 
                        RME32_WCR_FREQ_1;
568 
                break;
569 
        case RME32_CLOCKMODE_MASTER_48:
570 
                /* Internal 48.0kHz */
571 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
572 
                        RME32_WCR_FREQ_1;
573 
                break;
574 
        default:
575 
                return -EINVAL;
576 
        }
577 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
578 
        return 0;
579 
}
580 
 
581 
static int snd_rme32_getclockmode(struct rme32 * rme32)
582 
{
583 
        return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
584 
            (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
585 
}
586 
 
587 
static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
588 
{
589 
        switch (type) {
590 
        case RME32_INPUT_OPTICAL:
591 
                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
592 
                        ~RME32_WCR_INP_1;
593 
                break;
594 
        case RME32_INPUT_COAXIAL:
595 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
596 
                        ~RME32_WCR_INP_1;
597 
                break;
598 
        case RME32_INPUT_INTERNAL:
599 
                rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
600 
                        RME32_WCR_INP_1;
601 
                break;
602 
        case RME32_INPUT_XLR:
603 
                rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
604 
                        RME32_WCR_INP_1;
605 
                break;
606 
        default:
607 
                return -EINVAL;
608 
        }
609 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
610 
        return 0;
611 
}
612 
 
613 
static int snd_rme32_getinputtype(struct rme32 * rme32)
614 
{
615 
        return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
616 
            (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
617 
}
618 
 
619 
static void
620 
snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
621 
{
622 
        int frlog;
623 
 
624 
        if (n_channels == 2) {
625 
                frlog = 1;
626 
        } else {
627 
                /* assume 8 channels */
628 
                frlog = 3;
629 
        }
630 
        if (is_playback) {
631 
                frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
632 
                rme32->playback_frlog = frlog;
633 
        } else {
634 
                frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
635 
                rme32->capture_frlog = frlog;
636 
        }
637 
}
638 
 
639 
static int snd_rme32_setformat(struct rme32 * rme32, int format)
640 
{
641 
        switch (format) {
642 
        case SNDRV_PCM_FORMAT_S16_LE:
643 
                rme32->wcreg &= ~RME32_WCR_MODE24;
644 
                break;
645 
        case SNDRV_PCM_FORMAT_S32_LE:
646 
                rme32->wcreg |= RME32_WCR_MODE24;
647 
                break;
648 
        default:
649 
                return -EINVAL;
650 
        }
651 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
652 
        return 0;
653 
}
654 
 
655 
static int
656 
snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
657 
                             struct snd_pcm_hw_params *params)
658 
{
659 
        int err, rate, dummy;
660 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
661 
        struct snd_pcm_runtime *runtime = substream->runtime;
662 
 
663 
        if (rme32->fullduplex_mode) {
664 
                err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
665 
                if (err < 0)
666 
                        return err;
667 
        } else {
668 
                runtime->dma_area = (void __force *)(rme32->iobase +
669 
                                                     RME32_IO_DATA_BUFFER);
670 
                runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
671 
                runtime->dma_bytes = RME32_BUFFER_SIZE;
672 
        }
673 
 
674 
        spin_lock_irq(&rme32->lock);
675 
        if ((rme32->rcreg & RME32_RCR_KMODE) &&
676 
            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
677 
                /* AutoSync */
678 
                if ((int)params_rate(params) != rate) {
679 
                        spin_unlock_irq(&rme32->lock);
680 
                        return -EIO;
681 
                }
682 
        } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
683 
                spin_unlock_irq(&rme32->lock);
684 
                return err;
685 
        }
686 
        if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
687 
                spin_unlock_irq(&rme32->lock);
688 
                return err;
689 
        }
690 
 
691 
        snd_rme32_setframelog(rme32, params_channels(params), 1);
692 
        if (rme32->capture_periodsize != 0) {
693 
                if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
694 
                        spin_unlock_irq(&rme32->lock);
695 
                        return -EBUSY;
696 
                }
697 
        }
698 
        rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
699 
        /* S/PDIF setup */
700 
        if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
701 
                rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
702 
                rme32->wcreg |= rme32->wcreg_spdif_stream;
703 
                writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
704 
        }
705 
        spin_unlock_irq(&rme32->lock);
706 
 
707 
        return 0;
708 
}
709 
 
710 
static int
711 
snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
712 
                            struct snd_pcm_hw_params *params)
713 
{
714 
        int err, isadat, rate;
715 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
716 
        struct snd_pcm_runtime *runtime = substream->runtime;
717 
 
718 
        if (rme32->fullduplex_mode) {
719 
                err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
720 
                if (err < 0)
721 
                        return err;
722 
        } else {
723 
                runtime->dma_area = (void __force *)rme32->iobase +
724 
                                        RME32_IO_DATA_BUFFER;
725 
                runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
726 
                runtime->dma_bytes = RME32_BUFFER_SIZE;
727 
        }
728 
 
729 
        spin_lock_irq(&rme32->lock);
730 
        /* enable AutoSync for record-preparing */
731 
        rme32->wcreg |= RME32_WCR_AUTOSYNC;
732 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
733 
 
734 
        if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
735 
                spin_unlock_irq(&rme32->lock);
736 
                return err;
737 
        }
738 
        if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
739 
                spin_unlock_irq(&rme32->lock);
740 
                return err;
741 
        }
742 
        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
743 
                if ((int)params_rate(params) != rate) {
744 
                        spin_unlock_irq(&rme32->lock);
745 
                        return -EIO;
746 
                }
747 
                if ((isadat && runtime->hw.channels_min == 2) ||
748 
                    (!isadat && runtime->hw.channels_min == 8)) {
749 
                        spin_unlock_irq(&rme32->lock);
750 
                        return -EIO;
751 
                }
752 
        }
753 
        /* AutoSync off for recording */
754 
        rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
755 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
756 
 
757 
        snd_rme32_setframelog(rme32, params_channels(params), 0);
758 
        if (rme32->playback_periodsize != 0) {
759 
                if (params_period_size(params) << rme32->capture_frlog !=
760 
                    rme32->playback_periodsize) {
761 
                        spin_unlock_irq(&rme32->lock);
762 
                        return -EBUSY;
763 
                }
764 
        }
765 
        rme32->capture_periodsize =
766 
            params_period_size(params) << rme32->capture_frlog;
767 
        spin_unlock_irq(&rme32->lock);
768 
 
769 
        return 0;
770 
}
771 
 
772 
static int snd_rme32_pcm_hw_free(struct snd_pcm_substream *substream)
773 
{
774 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
775 
        if (! rme32->fullduplex_mode)
776 
                return 0;
777 
        return snd_pcm_lib_free_pages(substream);
778 
}
779 
 
780 
static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
781 
{
782 
        if (!from_pause) {
783 
                writel(0, rme32->iobase + RME32_IO_RESET_POS);
784 
        }
785 
 
786 
        rme32->wcreg |= RME32_WCR_START;
787 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
788 
}
789 
 
790 
static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
791 
{
792 
        /*
793 
         * Check if there is an unconfirmed IRQ, if so confirm it, or else
794 
         * the hardware will not stop generating interrupts
795 
         */
796 
        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
797 
        if (rme32->rcreg & RME32_RCR_IRQ) {
798 
                writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
799 
        }
800 
        rme32->wcreg &= ~RME32_WCR_START;
801 
        if (rme32->wcreg & RME32_WCR_SEL)
802 
                rme32->wcreg |= RME32_WCR_MUTE;
803 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
804 
        if (! to_pause)
805 
                writel(0, rme32->iobase + RME32_IO_RESET_POS);
806 
}
807 
 
808 
static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
809 
{
810 
        struct rme32 *rme32 = (struct rme32 *) dev_id;
811 
 
812 
        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
813 
        if (!(rme32->rcreg & RME32_RCR_IRQ)) {
814 
                return IRQ_NONE;
815 
        } else {
816 
                if (rme32->capture_substream) {
817 
                        snd_pcm_period_elapsed(rme32->capture_substream);
818 
                }
819 
                if (rme32->playback_substream) {
820 
                        snd_pcm_period_elapsed(rme32->playback_substream);
821 
                }
822 
                writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
823 
        }
824 
        return IRQ_HANDLED;
825 
}
826 
 
827 
static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
828 
 
829 
 
830 
static struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
831 
        .count = ARRAY_SIZE(period_bytes),
832 
        .list = period_bytes,
833 
        .mask = 0
834 
};
835 
 
836 
static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
837 
{
838 
        if (! rme32->fullduplex_mode) {
839 
                snd_pcm_hw_constraint_minmax(runtime,
840 
                                             SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
841 
                                             RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
842 
                snd_pcm_hw_constraint_list(runtime, 0,
843 
                                           SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
844 
                                           &hw_constraints_period_bytes);
845 
        }
846 
}
847 
 
848 
static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
849 
{
850 
        int rate, dummy;
851 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
852 
        struct snd_pcm_runtime *runtime = substream->runtime;
853 
 
854 
        snd_pcm_set_sync(substream);
855 
 
856 
        spin_lock_irq(&rme32->lock);
857 
        if (rme32->playback_substream != NULL) {
858 
                spin_unlock_irq(&rme32->lock);
859 
                return -EBUSY;
860 
        }
861 
        rme32->wcreg &= ~RME32_WCR_ADAT;
862 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
863 
        rme32->playback_substream = substream;
864 
        spin_unlock_irq(&rme32->lock);
865 
 
866 
        if (rme32->fullduplex_mode)
867 
                runtime->hw = snd_rme32_spdif_fd_info;
868 
        else
869 
                runtime->hw = snd_rme32_spdif_info;
870 
        if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
871 
                runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
872 
                runtime->hw.rate_max = 96000;
873 
        }
874 
        if ((rme32->rcreg & RME32_RCR_KMODE) &&
875 
            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
876 
                /* AutoSync */
877 
                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
878 
                runtime->hw.rate_min = rate;
879 
                runtime->hw.rate_max = rate;
880 
        }
881 
 
882 
        snd_rme32_set_buffer_constraint(rme32, runtime);
883 
 
884 
        rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
885 
        rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
886 
        snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
887 
                       SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
888 
        return 0;
889 
}
890 
 
891 
static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
892 
{
893 
        int isadat, rate;
894 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
895 
        struct snd_pcm_runtime *runtime = substream->runtime;
896 
 
897 
        snd_pcm_set_sync(substream);
898 
 
899 
        spin_lock_irq(&rme32->lock);
900 
        if (rme32->capture_substream != NULL) {
901 
                spin_unlock_irq(&rme32->lock);
902 
                return -EBUSY;
903 
        }
904 
        rme32->capture_substream = substream;
905 
        spin_unlock_irq(&rme32->lock);
906 
 
907 
        if (rme32->fullduplex_mode)
908 
                runtime->hw = snd_rme32_spdif_fd_info;
909 
        else
910 
                runtime->hw = snd_rme32_spdif_info;
911 
        if (RME32_PRO_WITH_8414(rme32)) {
912 
                runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
913 
                runtime->hw.rate_max = 96000;
914 
        }
915 
        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
916 
                if (isadat) {
917 
                        return -EIO;
918 
                }
919 
                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
920 
                runtime->hw.rate_min = rate;
921 
                runtime->hw.rate_max = rate;
922 
        }
923 
 
924 
        snd_rme32_set_buffer_constraint(rme32, runtime);
925 
 
926 
        return 0;
927 
}
928 
 
929 
static int
930 
snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
931 
{
932 
        int rate, dummy;
933 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
934 
        struct snd_pcm_runtime *runtime = substream->runtime;
935 
 
936 
        snd_pcm_set_sync(substream);
937 
 
938 
        spin_lock_irq(&rme32->lock);
939 
        if (rme32->playback_substream != NULL) {
940 
                spin_unlock_irq(&rme32->lock);
941 
                return -EBUSY;
942 
        }
943 
        rme32->wcreg |= RME32_WCR_ADAT;
944 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
945 
        rme32->playback_substream = substream;
946 
        spin_unlock_irq(&rme32->lock);
947 
 
948 
        if (rme32->fullduplex_mode)
949 
                runtime->hw = snd_rme32_adat_fd_info;
950 
        else
951 
                runtime->hw = snd_rme32_adat_info;
952 
        if ((rme32->rcreg & RME32_RCR_KMODE) &&
953 
            (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
954 
                /* AutoSync */
955 
                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
956 
                runtime->hw.rate_min = rate;
957 
                runtime->hw.rate_max = rate;
958 
        }
959 
 
960 
        snd_rme32_set_buffer_constraint(rme32, runtime);
961 
        return 0;
962 
}
963 
 
964 
static int
965 
snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
966 
{
967 
        int isadat, rate;
968 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
969 
        struct snd_pcm_runtime *runtime = substream->runtime;
970 
 
971 
        if (rme32->fullduplex_mode)
972 
                runtime->hw = snd_rme32_adat_fd_info;
973 
        else
974 
                runtime->hw = snd_rme32_adat_info;
975 
        if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
976 
                if (!isadat) {
977 
                        return -EIO;
978 
                }
979 
                runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
980 
                runtime->hw.rate_min = rate;
981 
                runtime->hw.rate_max = rate;
982 
        }
983 
 
984 
        snd_pcm_set_sync(substream);
985 
 
986 
        spin_lock_irq(&rme32->lock);
987 
        if (rme32->capture_substream != NULL) {
988 
                spin_unlock_irq(&rme32->lock);
989 
                return -EBUSY;
990 
        }
991 
        rme32->capture_substream = substream;
992 
        spin_unlock_irq(&rme32->lock);
993 
 
994 
        snd_rme32_set_buffer_constraint(rme32, runtime);
995 
        return 0;
996 
}
997 
 
998 
static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
999 
{
1000 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1001 
        int spdif = 0;
1002 
 
1003 
        spin_lock_irq(&rme32->lock);
1004 
        rme32->playback_substream = NULL;
1005 
        rme32->playback_periodsize = 0;
1006 
        spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1007 
        spin_unlock_irq(&rme32->lock);
1008 
        if (spdif) {
1009 
                rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1010 
                snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1011 
                               SNDRV_CTL_EVENT_MASK_INFO,
1012 
                               &rme32->spdif_ctl->id);
1013 
        }
1014 
        return 0;
1015 
}
1016 
 
1017 
static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1018 
{
1019 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1020 
 
1021 
        spin_lock_irq(&rme32->lock);
1022 
        rme32->capture_substream = NULL;
1023 
        rme32->capture_periodsize = 0;
1024 
        spin_unlock(&rme32->lock);
1025 
        return 0;
1026 
}
1027 
 
1028 
static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1029 
{
1030 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1031 
 
1032 
        spin_lock_irq(&rme32->lock);
1033 
        if (rme32->fullduplex_mode) {
1034 
                memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1035 
                rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1036 
                rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1037 
        } else {
1038 
                writel(0, rme32->iobase + RME32_IO_RESET_POS);
1039 
        }
1040 
        if (rme32->wcreg & RME32_WCR_SEL)
1041 
                rme32->wcreg &= ~RME32_WCR_MUTE;
1042 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1043 
        spin_unlock_irq(&rme32->lock);
1044 
        return 0;
1045 
}
1046 
 
1047 
static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1048 
{
1049 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1050 
 
1051 
        spin_lock_irq(&rme32->lock);
1052 
        if (rme32->fullduplex_mode) {
1053 
                memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1054 
                rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1055 
                rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1056 
                rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1057 
        } else {
1058 
                writel(0, rme32->iobase + RME32_IO_RESET_POS);
1059 
        }
1060 
        spin_unlock_irq(&rme32->lock);
1061 
        return 0;
1062 
}
1063 
 
1064 
static int
1065 
snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1066 
{
1067 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1068 
        struct snd_pcm_substream *s;
1069 
 
1070 
        spin_lock(&rme32->lock);
1071 
        snd_pcm_group_for_each_entry(s, substream) {
1072 
                if (s != rme32->playback_substream &&
1073 
                    s != rme32->capture_substream)
1074 
                        continue;
1075 
                switch (cmd) {
1076 
                case SNDRV_PCM_TRIGGER_START:
1077 
                        rme32->running |= (1 << s->stream);
1078 
                        if (rme32->fullduplex_mode) {
1079 
                                /* remember the current DMA position */
1080 
                                if (s == rme32->playback_substream) {
1081 
                                        rme32->playback_pcm.hw_io =
1082 
                                        rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1083 
                                } else {
1084 
                                        rme32->capture_pcm.hw_io =
1085 
                                        rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1086 
                                }
1087 
                        }
1088 
                        break;
1089 
                case SNDRV_PCM_TRIGGER_STOP:
1090 
                        rme32->running &= ~(1 << s->stream);
1091 
                        break;
1092 
                }
1093 
                snd_pcm_trigger_done(s, substream);
1094 
        }
1095 
 
1096 
        /* prefill playback buffer */
1097 
        if (cmd == SNDRV_PCM_TRIGGER_START && rme32->fullduplex_mode) {
1098 
                snd_pcm_group_for_each_entry(s, substream) {
1099 
                        if (s == rme32->playback_substream) {
1100 
                                s->ops->ack(s);
1101 
                                break;
1102 
                        }
1103 
                }
1104 
        }
1105 
 
1106 
        switch (cmd) {
1107 
        case SNDRV_PCM_TRIGGER_START:
1108 
                if (rme32->running && ! RME32_ISWORKING(rme32))
1109 
                        snd_rme32_pcm_start(rme32, 0);
1110 
                break;
1111 
        case SNDRV_PCM_TRIGGER_STOP:
1112 
                if (! rme32->running && RME32_ISWORKING(rme32))
1113 
                        snd_rme32_pcm_stop(rme32, 0);
1114 
                break;
1115 
        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1116 
                if (rme32->running && RME32_ISWORKING(rme32))
1117 
                        snd_rme32_pcm_stop(rme32, 1);
1118 
                break;
1119 
        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1120 
                if (rme32->running && ! RME32_ISWORKING(rme32))
1121 
                        snd_rme32_pcm_start(rme32, 1);
1122 
                break;
1123 
        }
1124 
        spin_unlock(&rme32->lock);
1125 
        return 0;
1126 
}
1127 
 
1128 
/* pointer callback for halfduplex mode */
1129 
static snd_pcm_uframes_t
1130 
snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1131 
{
1132 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1133 
        return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1134 
}
1135 
 
1136 
static snd_pcm_uframes_t
1137 
snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1138 
{
1139 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1140 
        return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1141 
}
1142 
 
1143 
 
1144 
/* ack and pointer callbacks for fullduplex mode */
1145 
static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1146 
                                    struct snd_pcm_indirect *rec, size_t bytes)
1147 
{
1148 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1149 
        memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1150 
                    substream->runtime->dma_area + rec->sw_data, bytes);
1151 
}
1152 
 
1153 
static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1154 
{
1155 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1156 
        struct snd_pcm_indirect *rec, *cprec;
1157 
 
1158 
        rec = &rme32->playback_pcm;
1159 
        cprec = &rme32->capture_pcm;
1160 
        spin_lock(&rme32->lock);
1161 
        rec->hw_queue_size = RME32_BUFFER_SIZE;
1162 
        if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1163 
                rec->hw_queue_size -= cprec->hw_ready;
1164 
        spin_unlock(&rme32->lock);
1165 
        snd_pcm_indirect_playback_transfer(substream, rec,
1166 
                                           snd_rme32_pb_trans_copy);
1167 
        return 0;
1168 
}
1169 
 
1170 
static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1171 
                                    struct snd_pcm_indirect *rec, size_t bytes)
1172 
{
1173 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1174 
        memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1175 
                      rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1176 
                      bytes);
1177 
}
1178 
 
1179 
static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1180 
{
1181 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1182 
        snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1183 
                                          snd_rme32_cp_trans_copy);
1184 
        return 0;
1185 
}
1186 
 
1187 
static snd_pcm_uframes_t
1188 
snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1189 
{
1190 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1191 
        return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1192 
                                                 snd_rme32_pcm_byteptr(rme32));
1193 
}
1194 
 
1195 
static snd_pcm_uframes_t
1196 
snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1197 
{
1198 
        struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1199 
        return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1200 
                                                snd_rme32_pcm_byteptr(rme32));
1201 
}
1202 
 
1203 
/* for halfduplex mode */
1204 
static struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1205 
        .open =         snd_rme32_playback_spdif_open,
1206 
        .close =        snd_rme32_playback_close,
1207 
        .ioctl =        snd_pcm_lib_ioctl,
1208 
        .hw_params =    snd_rme32_playback_hw_params,
1209 
        .hw_free =      snd_rme32_pcm_hw_free,
1210 
        .prepare =      snd_rme32_playback_prepare,
1211 
        .trigger =      snd_rme32_pcm_trigger,
1212 
        .pointer =      snd_rme32_playback_pointer,
1213 
        .copy =         snd_rme32_playback_copy,
1214 
        .silence =      snd_rme32_playback_silence,
1215 
        .mmap =         snd_pcm_lib_mmap_iomem,
1216 
};
1217 
 
1218 
static struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1219 
        .open =         snd_rme32_capture_spdif_open,
1220 
        .close =        snd_rme32_capture_close,
1221 
        .ioctl =        snd_pcm_lib_ioctl,
1222 
        .hw_params =    snd_rme32_capture_hw_params,
1223 
        .hw_free =      snd_rme32_pcm_hw_free,
1224 
        .prepare =      snd_rme32_capture_prepare,
1225 
        .trigger =      snd_rme32_pcm_trigger,
1226 
        .pointer =      snd_rme32_capture_pointer,
1227 
        .copy =         snd_rme32_capture_copy,
1228 
        .mmap =         snd_pcm_lib_mmap_iomem,
1229 
};
1230 
 
1231 
static struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1232 
        .open =         snd_rme32_playback_adat_open,
1233 
        .close =        snd_rme32_playback_close,
1234 
        .ioctl =        snd_pcm_lib_ioctl,
1235 
        .hw_params =    snd_rme32_playback_hw_params,
1236 
        .prepare =      snd_rme32_playback_prepare,
1237 
        .trigger =      snd_rme32_pcm_trigger,
1238 
        .pointer =      snd_rme32_playback_pointer,
1239 
        .copy =         snd_rme32_playback_copy,
1240 
        .silence =      snd_rme32_playback_silence,
1241 
        .mmap =         snd_pcm_lib_mmap_iomem,
1242 
};
1243 
 
1244 
static struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1245 
        .open =         snd_rme32_capture_adat_open,
1246 
        .close =        snd_rme32_capture_close,
1247 
        .ioctl =        snd_pcm_lib_ioctl,
1248 
        .hw_params =    snd_rme32_capture_hw_params,
1249 
        .prepare =      snd_rme32_capture_prepare,
1250 
        .trigger =      snd_rme32_pcm_trigger,
1251 
        .pointer =      snd_rme32_capture_pointer,
1252 
        .copy =         snd_rme32_capture_copy,
1253 
        .mmap =         snd_pcm_lib_mmap_iomem,
1254 
};
1255 
 
1256 
/* for fullduplex mode */
1257 
static struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1258 
        .open =         snd_rme32_playback_spdif_open,
1259 
        .close =        snd_rme32_playback_close,
1260 
        .ioctl =        snd_pcm_lib_ioctl,
1261 
        .hw_params =    snd_rme32_playback_hw_params,
1262 
        .hw_free =      snd_rme32_pcm_hw_free,
1263 
        .prepare =      snd_rme32_playback_prepare,
1264 
        .trigger =      snd_rme32_pcm_trigger,
1265 
        .pointer =      snd_rme32_playback_fd_pointer,
1266 
        .ack =          snd_rme32_playback_fd_ack,
1267 
};
1268 
 
1269 
static struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1270 
        .open =         snd_rme32_capture_spdif_open,
1271 
        .close =        snd_rme32_capture_close,
1272 
        .ioctl =        snd_pcm_lib_ioctl,
1273 
        .hw_params =    snd_rme32_capture_hw_params,
1274 
        .hw_free =      snd_rme32_pcm_hw_free,
1275 
        .prepare =      snd_rme32_capture_prepare,
1276 
        .trigger =      snd_rme32_pcm_trigger,
1277 
        .pointer =      snd_rme32_capture_fd_pointer,
1278 
        .ack =          snd_rme32_capture_fd_ack,
1279 
};
1280 
 
1281 
static struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1282 
        .open =         snd_rme32_playback_adat_open,
1283 
        .close =        snd_rme32_playback_close,
1284 
        .ioctl =        snd_pcm_lib_ioctl,
1285 
        .hw_params =    snd_rme32_playback_hw_params,
1286 
        .prepare =      snd_rme32_playback_prepare,
1287 
        .trigger =      snd_rme32_pcm_trigger,
1288 
        .pointer =      snd_rme32_playback_fd_pointer,
1289 
        .ack =          snd_rme32_playback_fd_ack,
1290 
};
1291 
 
1292 
static struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1293 
        .open =         snd_rme32_capture_adat_open,
1294 
        .close =        snd_rme32_capture_close,
1295 
        .ioctl =        snd_pcm_lib_ioctl,
1296 
        .hw_params =    snd_rme32_capture_hw_params,
1297 
        .prepare =      snd_rme32_capture_prepare,
1298 
        .trigger =      snd_rme32_pcm_trigger,
1299 
        .pointer =      snd_rme32_capture_fd_pointer,
1300 
        .ack =          snd_rme32_capture_fd_ack,
1301 
};
1302 
 
1303 
static void snd_rme32_free(void *private_data)
1304 
{
1305 
        struct rme32 *rme32 = (struct rme32 *) private_data;
1306 
 
1307 
        if (rme32 == NULL) {
1308 
                return;
1309 
        }
1310 
        if (rme32->irq >= 0) {
1311 
                snd_rme32_pcm_stop(rme32, 0);
1312 
                free_irq(rme32->irq, (void *) rme32);
1313 
                rme32->irq = -1;
1314 
        }
1315 
        if (rme32->iobase) {
1316 
                iounmap(rme32->iobase);
1317 
                rme32->iobase = NULL;
1318 
        }
1319 
        if (rme32->port) {
1320 
                pci_release_regions(rme32->pci);
1321 
                rme32->port = 0;
1322 
        }
1323 
        pci_disable_device(rme32->pci);
1324 
}
1325 
 
1326 
static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1327 
{
1328 
        struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1329 
        rme32->spdif_pcm = NULL;
1330 
}
1331 
 
1332 
static void
1333 
snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1334 
{
1335 
        struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1336 
        rme32->adat_pcm = NULL;
1337 
}
1338 
 
1339 
static int __devinit snd_rme32_create(struct rme32 * rme32)
1340 
{
1341 
        struct pci_dev *pci = rme32->pci;
1342 
        int err;
1343 
 
1344 
        rme32->irq = -1;
1345 
        spin_lock_init(&rme32->lock);
1346 
 
1347 
        if ((err = pci_enable_device(pci)) < 0)
1348 
                return err;
1349 
 
1350 
        if ((err = pci_request_regions(pci, "RME32")) < 0)
1351 
                return err;
1352 
        rme32->port = pci_resource_start(rme32->pci, 0);
1353 
 
1354 
        if ((rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE)) == 0) {
1355 
                snd_printk(KERN_ERR "unable to remap memory region 0x%lx-0x%lx\n",
1356 
                           rme32->port, rme32->port + RME32_IO_SIZE - 1);
1357 
                return -ENOMEM;
1358 
        }
1359 
 
1360 
        if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1361 
                        "RME32", rme32)) {
1362 
                snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1363 
                return -EBUSY;
1364 
        }
1365 
        rme32->irq = pci->irq;
1366 
 
1367 
        /* read the card's revision number */
1368 
        pci_read_config_byte(pci, 8, &rme32->rev);
1369 
 
1370 
        /* set up ALSA pcm device for S/PDIF */
1371 
        if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1372 
                return err;
1373 
        }
1374 
        rme32->spdif_pcm->private_data = rme32;
1375 
        rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1376 
        strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1377 
        if (rme32->fullduplex_mode) {
1378 
                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1379 
                                &snd_rme32_playback_spdif_fd_ops);
1380 
                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1381 
                                &snd_rme32_capture_spdif_fd_ops);
1382 
                snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1383 
                                                      snd_dma_continuous_data(GFP_KERNEL),
1384 
                                                      0, RME32_MID_BUFFER_SIZE);
1385 
                rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1386 
        } else {
1387 
                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1388 
                                &snd_rme32_playback_spdif_ops);
1389 
                snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1390 
                                &snd_rme32_capture_spdif_ops);
1391 
                rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1392 
        }
1393 
 
1394 
        /* set up ALSA pcm device for ADAT */
1395 
        if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1396 
            (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1397 
                /* ADAT is not available on DIGI32 and DIGI32 Pro */
1398 
                rme32->adat_pcm = NULL;
1399 
        }
1400 
        else {
1401 
                if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1402 
                                       1, 1, &rme32->adat_pcm)) < 0)
1403 
                {
1404 
                        return err;
1405 
                }
1406 
                rme32->adat_pcm->private_data = rme32;
1407 
                rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1408 
                strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1409 
                if (rme32->fullduplex_mode) {
1410 
                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1411 
                                        &snd_rme32_playback_adat_fd_ops);
1412 
                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1413 
                                        &snd_rme32_capture_adat_fd_ops);
1414 
                        snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1415 
                                                              snd_dma_continuous_data(GFP_KERNEL),
1416 
                                                              0, RME32_MID_BUFFER_SIZE);
1417 
                        rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1418 
                } else {
1419 
                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1420 
                                        &snd_rme32_playback_adat_ops);
1421 
                        snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1422 
                                        &snd_rme32_capture_adat_ops);
1423 
                        rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1424 
                }
1425 
        }
1426 
 
1427 
 
1428 
        rme32->playback_periodsize = 0;
1429 
        rme32->capture_periodsize = 0;
1430 
 
1431 
        /* make sure playback/capture is stopped, if by some reason active */
1432 
        snd_rme32_pcm_stop(rme32, 0);
1433 
 
1434 
        /* reset DAC */
1435 
        snd_rme32_reset_dac(rme32);
1436 
 
1437 
        /* reset buffer pointer */
1438 
        writel(0, rme32->iobase + RME32_IO_RESET_POS);
1439 
 
1440 
        /* set default values in registers */
1441 
        rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1442 
                RME32_WCR_INP_0 | /* input select */
1443 
                RME32_WCR_MUTE;  /* muting on */
1444 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1445 
 
1446 
 
1447 
        /* init switch interface */
1448 
        if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1449 
                return err;
1450 
        }
1451 
 
1452 
        /* init proc interface */
1453 
        snd_rme32_proc_init(rme32);
1454 
 
1455 
        rme32->capture_substream = NULL;
1456 
        rme32->playback_substream = NULL;
1457 
 
1458 
        return 0;
1459 
}
1460 
 
1461 
/*
1462 
 * proc interface
1463 
 */
1464 
 
1465 
static void
1466 
snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1467 
{
1468 
        int n;
1469 
        struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1470 
 
1471 
        rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1472 
 
1473 
        snd_iprintf(buffer, rme32->card->longname);
1474 
        snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1475 
 
1476 
        snd_iprintf(buffer, "\nGeneral settings\n");
1477 
        if (rme32->fullduplex_mode)
1478 
                snd_iprintf(buffer, "  Full-duplex mode\n");
1479 
        else
1480 
                snd_iprintf(buffer, "  Half-duplex mode\n");
1481 
        if (RME32_PRO_WITH_8414(rme32)) {
1482 
                snd_iprintf(buffer, "  receiver: CS8414\n");
1483 
        } else {
1484 
                snd_iprintf(buffer, "  receiver: CS8412\n");
1485 
        }
1486 
        if (rme32->wcreg & RME32_WCR_MODE24) {
1487 
                snd_iprintf(buffer, "  format: 24 bit");
1488 
        } else {
1489 
                snd_iprintf(buffer, "  format: 16 bit");
1490 
        }
1491 
        if (rme32->wcreg & RME32_WCR_MONO) {
1492 
                snd_iprintf(buffer, ", Mono\n");
1493 
        } else {
1494 
                snd_iprintf(buffer, ", Stereo\n");
1495 
        }
1496 
 
1497 
        snd_iprintf(buffer, "\nInput settings\n");
1498 
        switch (snd_rme32_getinputtype(rme32)) {
1499 
        case RME32_INPUT_OPTICAL:
1500 
                snd_iprintf(buffer, "  input: optical");
1501 
                break;
1502 
        case RME32_INPUT_COAXIAL:
1503 
                snd_iprintf(buffer, "  input: coaxial");
1504 
                break;
1505 
        case RME32_INPUT_INTERNAL:
1506 
                snd_iprintf(buffer, "  input: internal");
1507 
                break;
1508 
        case RME32_INPUT_XLR:
1509 
                snd_iprintf(buffer, "  input: XLR");
1510 
                break;
1511 
        }
1512 
        if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1513 
                snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1514 
        } else {
1515 
                if (n) {
1516 
                        snd_iprintf(buffer, " (8 channels)\n");
1517 
                } else {
1518 
                        snd_iprintf(buffer, " (2 channels)\n");
1519 
                }
1520 
                snd_iprintf(buffer, "  sample rate: %d Hz\n",
1521 
                            snd_rme32_capture_getrate(rme32, &n));
1522 
        }
1523 
 
1524 
        snd_iprintf(buffer, "\nOutput settings\n");
1525 
        if (rme32->wcreg & RME32_WCR_SEL) {
1526 
                snd_iprintf(buffer, "  output signal: normal playback");
1527 
        } else {
1528 
                snd_iprintf(buffer, "  output signal: same as input");
1529 
        }
1530 
        if (rme32->wcreg & RME32_WCR_MUTE) {
1531 
                snd_iprintf(buffer, " (muted)\n");
1532 
        } else {
1533 
                snd_iprintf(buffer, "\n");
1534 
        }
1535 
 
1536 
        /* master output frequency */
1537 
        if (!
1538 
            ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1539 
             && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1540 
                snd_iprintf(buffer, "  sample rate: %d Hz\n",
1541 
                            snd_rme32_playback_getrate(rme32));
1542 
        }
1543 
        if (rme32->rcreg & RME32_RCR_KMODE) {
1544 
                snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1545 
        } else {
1546 
                snd_iprintf(buffer, "  sample clock source: Internal\n");
1547 
        }
1548 
        if (rme32->wcreg & RME32_WCR_PRO) {
1549 
                snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1550 
        } else {
1551 
                snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1552 
        }
1553 
        if (rme32->wcreg & RME32_WCR_EMP) {
1554 
                snd_iprintf(buffer, "  emphasis: on\n");
1555 
        } else {
1556 
                snd_iprintf(buffer, "  emphasis: off\n");
1557 
        }
1558 
}
1559 
 
1560 
static void __devinit snd_rme32_proc_init(struct rme32 * rme32)
1561 
{
1562 
        struct snd_info_entry *entry;
1563 
 
1564 
        if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1565 
                snd_info_set_text_ops(entry, rme32, snd_rme32_proc_read);
1566 
}
1567 
 
1568 
/*
1569 
 * control interface
1570 
 */
1571 
 
1572 
#define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1573 
 
1574 
static int
1575 
snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1576 
                               struct snd_ctl_elem_value *ucontrol)
1577 
{
1578 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1579 
 
1580 
        spin_lock_irq(&rme32->lock);
1581 
        ucontrol->value.integer.value[0] =
1582 
            rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1583 
        spin_unlock_irq(&rme32->lock);
1584 
        return 0;
1585 
}
1586 
static int
1587 
snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1588 
                               struct snd_ctl_elem_value *ucontrol)
1589 
{
1590 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1591 
        unsigned int val;
1592 
        int change;
1593 
 
1594 
        val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1595 
        spin_lock_irq(&rme32->lock);
1596 
        val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1597 
        change = val != rme32->wcreg;
1598 
        if (ucontrol->value.integer.value[0])
1599 
                val &= ~RME32_WCR_MUTE;
1600 
        else
1601 
                val |= RME32_WCR_MUTE;
1602 
        rme32->wcreg = val;
1603 
        writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1604 
        spin_unlock_irq(&rme32->lock);
1605 
        return change;
1606 
}
1607 
 
1608 
static int
1609 
snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1610 
                                 struct snd_ctl_elem_info *uinfo)
1611 
{
1612 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1613 
        static char *texts[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1614 
 
1615 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1616 
        uinfo->count = 1;
1617 
        switch (rme32->pci->device) {
1618 
        case PCI_DEVICE_ID_RME_DIGI32:
1619 
        case PCI_DEVICE_ID_RME_DIGI32_8:
1620 
                uinfo->value.enumerated.items = 3;
1621 
                break;
1622 
        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1623 
                uinfo->value.enumerated.items = 4;
1624 
                break;
1625 
        default:
1626 
                snd_BUG();
1627 
                break;
1628 
        }
1629 
        if (uinfo->value.enumerated.item >
1630 
            uinfo->value.enumerated.items - 1) {
1631 
                uinfo->value.enumerated.item =
1632 
                    uinfo->value.enumerated.items - 1;
1633 
        }
1634 
        strcpy(uinfo->value.enumerated.name,
1635 
               texts[uinfo->value.enumerated.item]);
1636 
        return 0;
1637 
}
1638 
static int
1639 
snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1640 
                                struct snd_ctl_elem_value *ucontrol)
1641 
{
1642 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1643 
        unsigned int items = 3;
1644 
 
1645 
        spin_lock_irq(&rme32->lock);
1646 
        ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1647 
 
1648 
        switch (rme32->pci->device) {
1649 
        case PCI_DEVICE_ID_RME_DIGI32:
1650 
        case PCI_DEVICE_ID_RME_DIGI32_8:
1651 
                items = 3;
1652 
                break;
1653 
        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1654 
                items = 4;
1655 
                break;
1656 
        default:
1657 
                snd_BUG();
1658 
                break;
1659 
        }
1660 
        if (ucontrol->value.enumerated.item[0] >= items) {
1661 
                ucontrol->value.enumerated.item[0] = items - 1;
1662 
        }
1663 
 
1664 
        spin_unlock_irq(&rme32->lock);
1665 
        return 0;
1666 
}
1667 
static int
1668 
snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1669 
                                struct snd_ctl_elem_value *ucontrol)
1670 
{
1671 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1672 
        unsigned int val;
1673 
        int change, items = 3;
1674 
 
1675 
        switch (rme32->pci->device) {
1676 
        case PCI_DEVICE_ID_RME_DIGI32:
1677 
        case PCI_DEVICE_ID_RME_DIGI32_8:
1678 
                items = 3;
1679 
                break;
1680 
        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1681 
                items = 4;
1682 
                break;
1683 
        default:
1684 
                snd_BUG();
1685 
                break;
1686 
        }
1687 
        val = ucontrol->value.enumerated.item[0] % items;
1688 
 
1689 
        spin_lock_irq(&rme32->lock);
1690 
        change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1691 
        snd_rme32_setinputtype(rme32, val);
1692 
        spin_unlock_irq(&rme32->lock);
1693 
        return change;
1694 
}
1695 
 
1696 
static int
1697 
snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1698 
                                 struct snd_ctl_elem_info *uinfo)
1699 
{
1700 
        static char *texts[4] = { "AutoSync",
1701 
                                  "Internal 32.0kHz",
1702 
                                  "Internal 44.1kHz",
1703 
                                  "Internal 48.0kHz" };
1704 
 
1705 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1706 
        uinfo->count = 1;
1707 
        uinfo->value.enumerated.items = 4;
1708 
        if (uinfo->value.enumerated.item > 3) {
1709 
                uinfo->value.enumerated.item = 3;
1710 
        }
1711 
        strcpy(uinfo->value.enumerated.name,
1712 
               texts[uinfo->value.enumerated.item]);
1713 
        return 0;
1714 
}
1715 
static int
1716 
snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1717 
                                struct snd_ctl_elem_value *ucontrol)
1718 
{
1719 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1720 
 
1721 
        spin_lock_irq(&rme32->lock);
1722 
        ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1723 
        spin_unlock_irq(&rme32->lock);
1724 
        return 0;
1725 
}
1726 
static int
1727 
snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1728 
                                struct snd_ctl_elem_value *ucontrol)
1729 
{
1730 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1731 
        unsigned int val;
1732 
        int change;
1733 
 
1734 
        val = ucontrol->value.enumerated.item[0] % 3;
1735 
        spin_lock_irq(&rme32->lock);
1736 
        change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1737 
        snd_rme32_setclockmode(rme32, val);
1738 
        spin_unlock_irq(&rme32->lock);
1739 
        return change;
1740 
}
1741 
 
1742 
static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1743 
{
1744 
        u32 val = 0;
1745 
        val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1746 
        if (val & RME32_WCR_PRO)
1747 
                val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1748 
        else
1749 
                val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1750 
        return val;
1751 
}
1752 
 
1753 
static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1754 
{
1755 
        aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1756 
        if (val & RME32_WCR_PRO)
1757 
                aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1758 
        else
1759 
                aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1760 
}
1761 
 
1762 
static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1763 
                                        struct snd_ctl_elem_info *uinfo)
1764 
{
1765 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1766 
        uinfo->count = 1;
1767 
        return 0;
1768 
}
1769 
 
1770 
static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1771 
                                       struct snd_ctl_elem_value *ucontrol)
1772 
{
1773 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1774 
 
1775 
        snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1776 
                                 rme32->wcreg_spdif);
1777 
        return 0;
1778 
}
1779 
 
1780 
static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1781 
                                       struct snd_ctl_elem_value *ucontrol)
1782 
{
1783 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1784 
        int change;
1785 
        u32 val;
1786 
 
1787 
        val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1788 
        spin_lock_irq(&rme32->lock);
1789 
        change = val != rme32->wcreg_spdif;
1790 
        rme32->wcreg_spdif = val;
1791 
        spin_unlock_irq(&rme32->lock);
1792 
        return change;
1793 
}
1794 
 
1795 
static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1796 
                                               struct snd_ctl_elem_info *uinfo)
1797 
{
1798 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1799 
        uinfo->count = 1;
1800 
        return 0;
1801 
}
1802 
 
1803 
static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1804 
                                              struct snd_ctl_elem_value *
1805 
                                              ucontrol)
1806 
{
1807 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1808 
 
1809 
        snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1810 
                                 rme32->wcreg_spdif_stream);
1811 
        return 0;
1812 
}
1813 
 
1814 
static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1815 
                                              struct snd_ctl_elem_value *
1816 
                                              ucontrol)
1817 
{
1818 
        struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1819 
        int change;
1820 
        u32 val;
1821 
 
1822 
        val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1823 
        spin_lock_irq(&rme32->lock);
1824 
        change = val != rme32->wcreg_spdif_stream;
1825 
        rme32->wcreg_spdif_stream = val;
1826 
        rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1827 
        rme32->wcreg |= val;
1828 
        writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1829 
        spin_unlock_irq(&rme32->lock);
1830 
        return change;
1831 
}
1832 
 
1833 
static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1834 
                                             struct snd_ctl_elem_info *uinfo)
1835 
{
1836 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1837 
        uinfo->count = 1;
1838 
        return 0;
1839 
}
1840 
 
1841 
static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1842 
                                            struct snd_ctl_elem_value *
1843 
                                            ucontrol)
1844 
{
1845 
        ucontrol->value.iec958.status[0] = kcontrol->private_value;
1846 
        return 0;
1847 
}
1848 
 
1849 
static struct snd_kcontrol_new snd_rme32_controls[] = {
1850 
        {
1851 
                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1852 
                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1853 
                .info = snd_rme32_control_spdif_info,
1854 
                .get =  snd_rme32_control_spdif_get,
1855 
                .put =  snd_rme32_control_spdif_put
1856 
        },
1857 
        {
1858 
                .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1859 
                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1860 
                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1861 
                .info = snd_rme32_control_spdif_stream_info,
1862 
                .get =  snd_rme32_control_spdif_stream_get,
1863 
                .put =  snd_rme32_control_spdif_stream_put
1864 
        },
1865 
        {
1866 
                .access = SNDRV_CTL_ELEM_ACCESS_READ,
1867 
                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1868 
                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1869 
                .info = snd_rme32_control_spdif_mask_info,
1870 
                .get =  snd_rme32_control_spdif_mask_get,
1871 
                .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1872 
        },
1873 
        {
1874 
                .access = SNDRV_CTL_ELEM_ACCESS_READ,
1875 
                .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1876 
                .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1877 
                .info = snd_rme32_control_spdif_mask_info,
1878 
                .get =  snd_rme32_control_spdif_mask_get,
1879 
                .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1880 
        },
1881 
        {
1882 
                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1883 
                .name = "Input Connector",
1884 
                .info = snd_rme32_info_inputtype_control,
1885 
                .get =  snd_rme32_get_inputtype_control,
1886 
                .put =  snd_rme32_put_inputtype_control
1887 
        },
1888 
        {
1889 
                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1890 
                .name = "Loopback Input",
1891 
                .info = snd_rme32_info_loopback_control,
1892 
                .get =  snd_rme32_get_loopback_control,
1893 
                .put =  snd_rme32_put_loopback_control
1894 
        },
1895 
        {
1896 
                .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1897 
                .name = "Sample Clock Source",
1898 
                .info = snd_rme32_info_clockmode_control,
1899 
                .get =  snd_rme32_get_clockmode_control,
1900 
                .put =  snd_rme32_put_clockmode_control
1901 
        }
1902 
};
1903 
 
1904 
static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1905 
{
1906 
        int idx, err;
1907 
        struct snd_kcontrol *kctl;
1908 
 
1909 
        for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1910 
                if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1911 
                        return err;
1912 
                if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1913 
                        rme32->spdif_ctl = kctl;
1914 
        }
1915 
 
1916 
        return 0;
1917 
}
1918 
 
1919 
/*
1920 
 * Card initialisation
1921 
 */
1922 
 
1923 
static void snd_rme32_card_free(struct snd_card *card)
1924 
{
1925 
        snd_rme32_free(card->private_data);
1926 
}
1927 
 
1928 
static int __devinit
1929 
snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1930 
{
1931 
        static int dev;
1932 
        struct rme32 *rme32;
1933 
        struct snd_card *card;
1934 
        int err;
1935 
 
1936 
        if (dev >= SNDRV_CARDS) {
1937 
                return -ENODEV;
1938 
        }
1939 
        if (!enable[dev]) {
1940 
                dev++;
1941 
                return -ENOENT;
1942 
        }
1943 
 
1944 
        if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1945 
                                 sizeof(struct rme32))) == NULL)
1946 
                return -ENOMEM;
1947 
        card->private_free = snd_rme32_card_free;
1948 
        rme32 = (struct rme32 *) card->private_data;
1949 
        rme32->card = card;
1950 
        rme32->pci = pci;
1951 
        snd_card_set_dev(card, &pci->dev);
1952 
        if (fullduplex[dev])
1953 
                rme32->fullduplex_mode = 1;
1954 
        if ((err = snd_rme32_create(rme32)) < 0) {
1955 
                snd_card_free(card);
1956 
                return err;
1957 
        }
1958 
 
1959 
        strcpy(card->driver, "Digi32");
1960 
        switch (rme32->pci->device) {
1961 
        case PCI_DEVICE_ID_RME_DIGI32:
1962 
                strcpy(card->shortname, "RME Digi32");
1963 
                break;
1964 
        case PCI_DEVICE_ID_RME_DIGI32_8:
1965 
                strcpy(card->shortname, "RME Digi32/8");
1966 
                break;
1967 
        case PCI_DEVICE_ID_RME_DIGI32_PRO:
1968 
                strcpy(card->shortname, "RME Digi32 PRO");
1969 
                break;
1970 
        }
1971 
        sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1972 
                card->shortname, rme32->rev, rme32->port, rme32->irq);
1973 
 
1974 
        if ((err = snd_card_register(card)) < 0) {
1975 
                snd_card_free(card);
1976 
                return err;
1977 
        }
1978 
        pci_set_drvdata(pci, card);
1979 
        dev++;
1980 
        return 0;
1981 
}
1982 
 
1983 
static void __devexit snd_rme32_remove(struct pci_dev *pci)
1984 
{
1985 
        snd_card_free(pci_get_drvdata(pci));
1986 
        pci_set_drvdata(pci, NULL);
1987 
}
1988 
 
1989 
static struct pci_driver driver = {
1990 
        .name =         "RME Digi32",
1991 
        .id_table =     snd_rme32_ids,
1992 
        .probe =        snd_rme32_probe,
1993 
        .remove =       __devexit_p(snd_rme32_remove),
1994 
};
1995 
 
1996 
static int __init alsa_card_rme32_init(void)
1997 
{
1998 
        return pci_register_driver(&driver);
1999 
}
2000 
 
2001 
static void __exit alsa_card_rme32_exit(void)
2002 
{
2003 
        pci_unregister_driver(&driver);
2004 
}
2005 
 
2006 
module_init(alsa_card_rme32_init)
2007 
module_exit(alsa_card_rme32_exit)

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