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[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [bench/] [models/] [28f016s3/] [dp016s3.v] - Blame information for rev 12

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1 12 xianfeng
/*
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AND AGREED TO THE FOLLOWING TERMS AND CONDITIONS.  IF YOU DO NOT AGREE
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TO THE TERMS OF THIS AGREEMENT, PROMPTLY RETURN THE SOFTWARE PACKAGE AND
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ANY ACCOMPANYING ITEMS.
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IF YOU USE THIS SOFTWARE, YOU WILL BE BOUND BY THE TERMS OF THIS
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AGREEMENT
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LICENSE: Intel Corporation ("Intel") grants you the non-exclusive right
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to use the enclosed software program ("Software").  You will not use,
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copy, modify, rent, sell or transfer the Software or any portion
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thereof, except as provided in this Agreement.
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System OEM Developers may:
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1.      Copy the Software for support, backup or archival purposes;
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2.      Install, use, or distribute Intel owned Software in object code
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        derivatives ("Derivatives") of Intel owned Software under the
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        terms and conditions in this Agreement, ONLY if you are a System
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        OEM Developer and NOT an end-user.
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RESTRICTIONS:
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YOU WILL NOT:
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        code format;
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        unless approved by Intel in a prior writing.
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copyright laws.  You will not remove the copyright notice from the
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code.  OEM Developers shall be authorized to use, market, sell, and/or
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U.S. GOVERNMENT RESTRICTED RIGHTS: The Software and documentation were
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EXPORT LAWS: You agree that the distribution and export/re-export of the
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*/
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//************************************************************************
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// This file contains the paramenters which define the part for the
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// Byte-Wide Smart 3 FlashFile(tm) memory model (bwsvff.v).  The '3.3V 
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// Vcc Timing' parameters are representative of
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// the 3.3V Vcc 28F016S3-120.  These parameters need to be changed if the
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// 3.3V Vcc 28F016S3-150 is to be modeled.  The '2.7V Vcc Timing' parameters
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// are representative of the 2.7V Vcc 28F016S3-150.  These parameters need
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// to be changed if the 2.7V Vcc 28F016S3-170 is to be modeled.  The
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// parameters were taken from the Byte-Wide SmartVoltage FlashFile Memory
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// Family datasheet (Order Number 290598).
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// This file must be loaded before the main model, as it contains
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// definitions required by the model.
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//28F016S3
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`define BlockFileBegin  "../../bench/models/28f016s3/28f016s3.bkb"   //starting addresses of each block
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`define BlockFileEnd    "../../bench/models/28f016s3/28f016s3.bke"   //ending addresses of each block
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//Available Vcc supported by the device.
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`define VccLevels       1       //Bit 0 - 5V, Bit 1 = 3.3V, Bit 2 = 2.7V
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`define AddrSize        21          //number of address pins
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`define MaxAddr         `AddrSize'h1FFFFF    // device ending address
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`define MainArraySize   0:`MaxAddr  //array definition in bytes
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                                    //include A-1 for 8 bit mode)
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`define MaxOutputs      8           //number of output pins
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`define NumberOfBlocks  32          //number of blocks in the array
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`define ID_DeviceCodeB      'hAA    //016 S3
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`define ID_ManufacturerB    'h89
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// Timing parameters.  See the data sheet for definition
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// of the parameter.
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//5V Vcc Timing
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`define TAVAV_50             95
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`define TAVQV_50             95
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`define TELQV_50             95
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`define TPHQV_50            400
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`define TGLQV_50             40
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`define TGLQX_50              0   //TELQX also
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`define TGHQZ_50             10
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`define TEHQZ_50             55
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`define TOH_50                0
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`define TPHHWH_50           100
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`define TAVWH_50             40
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`define TDVWH_50             40
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`define TPHWL_50              1
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`define TWPH_50              25  //TWHWL, TEHEL, TWHEL, TEHWL
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`define TWP_50               50  //TWLWH, TELEH, TWLEH, TELWH
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`define TWHDX_50              5
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`define TWHAX_50              5
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//3.3V Vcc Timing
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`define TAVAV_33            120
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`define TAVQV_33            120
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`define TELQV_33            120
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`define TPHQV_33            600
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`define TGLQV_33             50
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`define TGLQX_33              0   //TELQX also
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`define TGHQZ_33             15
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`define TEHQZ_33             55
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`define TOH_33                0
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`define TPHHWH_33           100
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`define TAVWH_33             50
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`define TDVWH_33             50
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`define TPHWL_33              1
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`define TWPH_33              25  //TWHWL, TEHEL, TWHEL, TEHWL
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`define TWP_33               70  //TWLWH, TELEH, TWLEH, TELWH
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`define TWHDX_33              5
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`define TWHAX_33              5
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//2.7V Vcc Timing
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`define TAVAV_27            150
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`define TAVQV_27            150
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`define TELQV_27            150
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`define TPHQV_27            600
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`define TGLQV_27             55
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`define TGLQX_27              0   //TELQX also
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`define TGHQZ_27             20
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`define TEHQZ_27             55
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`define TOH_27                0
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`define TPHHWH_27           100
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`define TAVWH_27             50
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`define TDVWH_27             50
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`define TPHWL_27              1
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`define TWPH_27              25  //TWHWL, TEHEL, TWHEL, TEHWL
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`define TWP_27               70  //TWLWH, TELEH, TWLEH, TELWH
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`define TWHDX_27              5
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`define TWHAX_27              5
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//The following constants control how long it take an algorithm to run
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// To scale all times together (for making simulation run faster)
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// change the constant later listed as TimerPeriod.  The actual delays
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// are TimerPeriod*xxx_Time, except for suspend latency times.
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`define TimerPeriod_        1000    //1 usec = 1000ns  requires for
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                                    //following times to be accurate
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//reducing the following will reduce simulation time
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//the times used below are the maximum (or typical if no maximum
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//time is given) values from the data sheet
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//5V Vcc, 12V Vpp
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`define AC_ProgramTime_Byte_50_12      6       //usecs
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`define AC_EraseTime_Block_50_12       1000000 //1 sec
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`define AC_Set_LockBit_50_12           10      //usecs
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`define AC_Clear_LockBit_50_12         1000000 //1 sec
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 //Latency times are NOT multiplied by TimerPeriod_
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`define AC_Program_Suspend_50_12       5000    //usecs
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`define AC_Erase_Suspend_50_12         12000   //usecs
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//3.3V Vcc, 12V Vpp
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`define AC_ProgramTime_Byte_33_12      8       //usecs 7.6us
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`define AC_EraseTime_Block_33_12       1100000 //1.1secs
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`define AC_Set_LockBit_33_12           12      //usecs 11.6us
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`define AC_Clear_LockBit_33_12         1100000 //1.1 sec
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 //Latency times are NOT multiplied by TimerPeriod_
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`define AC_Program_Suspend_33_12       6000    //usecs
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`define AC_Erase_Suspend_33_12         12000   //usecs
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//5V Vcc, 5V Vpp
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`define AC_ProgramTime_Byte_50_5       8       //usecs
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`define AC_EraseTime_Block_50_5        1100000 //1.1secs
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`define AC_Set_LockBit_50_5            12      //usecs
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`define AC_Clear_LockBit_50_5          1100000 //1.1 sec
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 //Latency times are NOT multiplied by TimerPeriod_
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`define AC_Program_Suspend_50_5        6000    //usecs
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`define AC_Erase_Suspend_50_5          12000   //usecs
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//3.3V Vcc, 5V Vpp
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`define AC_ProgramTime_Byte_33_5       10      //usecs 9.3us
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`define AC_EraseTime_Block_33_5        1200000 //1.2secs
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`define AC_Set_LockBit_33_5            14      //usecs 13.3us
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`define AC_Clear_LockBit_33_5          1200000 //1.2 sec
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 //Latency times are NOT multiplied by TimerPeriod_
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`define AC_Program_Suspend_33_5        7000    //usecs
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`define AC_Erase_Suspend_33_5          12000   //usecs
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//3.3V Vcc, 3.3V Vpp
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`define AC_ProgramTime_Byte_33_33      17      //usecs
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`define AC_EraseTime_Block_33_33       1800000 //1.8secs
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`define AC_Set_LockBit_33_33           21      //usecs
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`define AC_Clear_LockBit_33_33         1800000 //1.8 sec
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 //Latency times are NOT multiplied by TimerPeriod_
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`define AC_Program_Suspend_33_33       7000    //usecs
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`define AC_Erase_Suspend_33_33         20000   //usecs

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